KR960002694A - Method of manufacturing polycrystalline silicon thin film transistor - Google Patents

Method of manufacturing polycrystalline silicon thin film transistor Download PDF

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Publication number
KR960002694A
KR960002694A KR1019940014063A KR19940014063A KR960002694A KR 960002694 A KR960002694 A KR 960002694A KR 1019940014063 A KR1019940014063 A KR 1019940014063A KR 19940014063 A KR19940014063 A KR 19940014063A KR 960002694 A KR960002694 A KR 960002694A
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KR
South Korea
Prior art keywords
thin film
forming
polysilicon
polycrystalline silicon
silicon thin
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Application number
KR1019940014063A
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Korean (ko)
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KR0129817B1 (en
Inventor
송윤호
유병곤
남기수
Original Assignee
양승택
재단법인 한국전자통신 연구소
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Priority to KR1019940014063A priority Critical patent/KR0129817B1/en
Publication of KR960002694A publication Critical patent/KR960002694A/en
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Publication of KR0129817B1 publication Critical patent/KR0129817B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth

Abstract

본 발명은 다결정실리콘 박막트랜지스터의 제조방법에 관한 것으로서, 종래에 다결정실리콘의 결정립 결함이 많고 열처리시간이 길어 제조생산성이 낮은 문제점을 해결하기 위하여 본 발명에서는 투명 절연기판(10)상에 비정질실리콘 박막(20')은 증착하는 공정(a)과, 이 비정질실리콘 박막(20')을 비활성기체 또는 활성기체중의 적어도 하나의 기체 또는 이 기체들중 적어도 2종류 이상의 혼합기체로 이루어진 상압이상 및 고압전기로에서 고상결정화시켜 다결정실리콘 박막(20)을 형성하는 공정(b)과, 이 다결정실리콘 박막(20)을 리소그래피와 식각을 이용하여 다결정실리콘 활성영역(20)을 형성하는 공정(c)과, 이 위에 게이트실리콘 산화막(30) 및 게이트 다결정실리콘(40)을 순차로 형성한 후 불순물 이온주입을 하여 소오스와 드레인(50)을 형성하는 공정(d)과, 상기 소오스와 드레인(50)상에 금속막을 증착하여 금속전극(70)을 형성하는 공정(e)을 제공함으로써 다결정실리콘의 결정립계 결함을 감소시켜 고성능의 박막트랜지스터를 제작할 수 있을뿐만 아니라, 제조공정 시간도 줄일 수 있다.The present invention relates to a method for manufacturing a polysilicon thin film transistor, in the present invention in order to solve the problem of a large number of grain defects of the polysilicon and a long heat treatment time in the present invention low amorphous silicon thin film on the transparent insulating substrate (10). 20 'is a step (a) of depositing, and the amorphous silicon thin film 20' is a normal-pressure or higher and high-pressure electricity consisting of at least one gas of an inert gas or active gas or a mixture of at least two kinds of these gases. (B) forming the polycrystalline silicon thin film 20 by solidifying the polycrystalline silicon, and forming the polysilicon active region 20 by lithography and etching the polycrystalline silicon thin film 20, and (D) forming a source and a drain 50 by sequentially forming the gate silicon oxide film 30 and the gate polycrystalline silicon 40 thereon and performing impurity ion implantation thereon And by providing a step (e) of depositing a metal film on the source and drain 50 to form a metal electrode 70, it is possible to reduce the grain boundary defects of polysilicon to produce a high performance thin film transistor, Process time can also be reduced.

Description

다결정 실리콘 박막트랜지스터 제조방법Method for manufacturing polycrystalline silicon thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 제조방법을 나타내는 공정도.2 is a process chart showing the manufacturing method of the present invention.

Claims (3)

투명 절연기판 또는 절연막이 형성되어 있는 실리콘 웨이퍼(10)상에 저압화학기상증착법이나 플라즈마 화학기상 증착법으로 약 300∼1,500Å의 비정질실리콘 박막(20')을 중착하는 공정(a)과, 상기 비정질실리콘 박막(20')을 비활성 기체와 활성기체중 적어도 하나의 기체 또는 상기 기체중에 적어도 2종류 이상의 혼합기체로 이루어진 상압이상 및 100atm 이하의 고압분위기에서 고상결정화시켜 다결정실리콘박막(20)을 형성하는 공정(b)과, 상기 다결정실리콘 박막(20)을 리소그래피와 식각을 이용하여 다결정실리콘 활성영역(20)을 형성하는 공정(c)과, 상기 다결정실리콘 활성영역(20) 위에 소정 두께의 게이트 실리콘 산화막(30)을 형성하고, 이 게이트 실리콘산화막(30)위에 다결정 실리콘을 소정 두께로 증착한 후 리소그래피와 식각을 이용하여 게이트 다결정 실리콘(40)을 형성하며, 이 위에 불순물을 이온주입하여 소오스와 드레인(50)을 형성하는 공정(d)과, 이 공정(d) 위에 화학기상증착법을 이용하여 소정 두께의 실리콘산화막(60)을 증착한 후 리소그래피와 식각으로 전극 접촉구멍을 만들고 상기 실리콘산화막(60)위에 금속막을 증착한 후 리소그래피와 식각을 이용하여 금속전극(70)을 형성하는 공정(e)을 포함하는 다결정실리콘 박막트랜지스터의 제조방법.(A) depositing about 300 to 1,500 microns of amorphous silicon thin film 20 'by a low pressure chemical vapor deposition method or a plasma chemical vapor deposition method on a silicon wafer 10 having a transparent insulating substrate or an insulating film formed thereon; and Forming the polysilicon thin film 20 by solidifying the amorphous silicon thin film 20 'in at least one gas of an inert gas and an active gas or at least two kinds of mixed gases in the gas and at a high pressure of 100 atm or less. Step (b), forming the polysilicon active region 20 by lithography and etching the polysilicon thin film 20, and (c) a gate silicon having a predetermined thickness on the polysilicon active region 20. An oxide film 30 is formed, and polycrystalline silicon is deposited on the gate silicon oxide film 30 to a predetermined thickness, and then the gate polycrystal is formed using lithography and etching. Forming a source of silicon, and forming a source and a drain 50 by ion implanting impurities thereon, and by using a chemical vapor deposition method, the silicon oxide film 60 having a predetermined thickness is formed. Forming a contact electrode by lithography and etching and depositing a metal film on the silicon oxide film 60, and then forming a metal electrode 70 using lithography and etching (e). Manufacturing method. 제1항에 있어서, 상기 비활성기체는 헬륨, 아르곤 또는 질소로 이루어지고, 상기 활성기체는 수소 또는 산소로 이루어진 것을 특징으로 하는 다결정 실리콘 박막트랜지스터의 제조방법.The method of claim 1, wherein the inert gas is made of helium, argon or nitrogen, and the active gas is made of hydrogen or oxygen. 제1항에 있어서, 상기 비정질실리콘 박막(20')은 상기 다결정 실리콘 박막(20) 형성시에 약 600℃이하의 전기로에서 고상결정화화는 것을 특징으로 하는 다결정 실리콘 박막트랜지스터의 제조방법.The method of claim 1, wherein the amorphous silicon thin film (20 ') is a solid phase crystallization in an electric furnace of about 600 ℃ or less when forming the polycrystalline silicon thin film (20). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940014063A 1994-06-21 1994-06-21 Fabrication method of poly-si tft KR0129817B1 (en)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940014063A KR0129817B1 (en) 1994-06-21 1994-06-21 Fabrication method of poly-si tft

Publications (2)

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KR960002694A true KR960002694A (en) 1996-01-26
KR0129817B1 KR0129817B1 (en) 1998-04-06

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100567273B1 (en) * 1998-08-27 2006-05-25 엘지.필립스 엘시디 주식회사 Thin film transistor and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100567273B1 (en) * 1998-08-27 2006-05-25 엘지.필립스 엘시디 주식회사 Thin film transistor and its manufacturing method

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Publication number Publication date
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