KR950025953A - Method of forming device isolation film of semiconductor device - Google Patents

Method of forming device isolation film of semiconductor device Download PDF

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Publication number
KR950025953A
KR950025953A KR1019940001953A KR19940001953A KR950025953A KR 950025953 A KR950025953 A KR 950025953A KR 1019940001953 A KR1019940001953 A KR 1019940001953A KR 19940001953 A KR19940001953 A KR 19940001953A KR 950025953 A KR950025953 A KR 950025953A
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KR
South Korea
Prior art keywords
device isolation
film
photoresist pattern
isolation film
photoresist
Prior art date
Application number
KR1019940001953A
Other languages
Korean (ko)
Inventor
함영목
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940001953A priority Critical patent/KR950025953A/en
Publication of KR950025953A publication Critical patent/KR950025953A/en

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Abstract

본 발명은 반도체소자의 소자분리막 형성방법에 관한 것으로, LOCOS 방법으로 형성된 소자분리막의 상부에 감광막을 도포하고 저농도의 현상용액을 사용하여 상기 감광막을 일정두께 식각하여 감광막패턴을 형성하고 상기 소자분리막을 일정두께 노출시킨 다음, 상기 감광막패턴을 상온의 열공정으로 경화시키고 상기 감광막패턴을 식각장벽으로 사용하여 노출된 소자분리막을 건식식각으로 식각하고 상기 감광막패턴을 제거함으로써, 평탄화된 소자분리막을 형성하여 후속공정을 용이하게하고 반도체소자의 수율을 향상시키는 기술이다.The present invention relates to a method of forming a device isolation film of a semiconductor device, by applying a photoresist film on top of the device isolation film formed by the LOCOS method and etching the photoresist film to a predetermined thickness using a low concentration developer solution to form a photoresist pattern and the device isolation film After exposing the film to a predetermined thickness, the photoresist pattern was cured by a thermal process at room temperature, and the exposed device isolation layer was etched by dry etching using the photoresist pattern as an etch barrier and the photoresist pattern was removed to form a planarized device isolation layer. It is a technique for facilitating subsequent processes and improving the yield of semiconductor devices.

Description

반도체소자의 소자분리막 형성방법.A device isolation film forming method of a semiconductor device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래기술에 의한 반도체소자의 소자분리막을 도시한 단면도,1 is a cross-sectional view showing a device isolation film of a semiconductor device according to the prior art,

제2A도 내지 제2C도는 본 발명에의한 반도체소자의 소자분리막 형성공정을 도시한 단면도.2A to 2C are cross-sectional views showing a device isolation film forming process of a semiconductor device according to the present invention.

Claims (3)

반도체기판 상부에 LOCOS 방법으로 소자분리막을 형성하고 그 상부에 감광막을 일정두께 도포하는 공정과, 상기 감광막을 일정두께 습식식각하여 감광막패턴을 형성함으로써 상기 소자분리막을 일정두께 노출시키는 공정과, 상기 감광막패턴을 130℃이상의 온도에서 열공정으로 경화시킨후에 상기 감광막패턴을 식각장벽으로 건식식각하여 상기 노출된 소자분리막을 제거하고 상기 감광막패턴을 제거하는 공정을 포함하는 반도체소자의 소자분리막 형성방법.Forming a device isolation film on the semiconductor substrate by a LOCOS method and applying a predetermined thickness to the photoresist film; exposing the device isolation film to a predetermined thickness by wet etching the photosensitive film to form a photoresist pattern; And drying the photoresist pattern with an etch barrier after the pattern is cured by a thermal process at a temperature of 130 ° C. or higher to remove the exposed device isolation layer and to remove the photoresist pattern. 제1항에 있어서, 상기 습식방법은 저농도의 현상용액을 사용하는 것을 특징으로하는 반도체소자의 소자분리막 형성방법.The method of claim 1, wherein the wet method uses a low concentration developer solution. 제1항에 있어서, 상기 건식식각은 가능한 짧은 시간에 오픈된 소자분리막을 식각하여 플라나 에치,(planaretch)와 같이 오픈된 부분만을 식각하는 것을 특징으로 하는 반도체소자의 소자분리막 형성방법.The method of claim 1, wherein the dry etching is performed to etch the device isolation film opened in the shortest possible time to etch only the open portion such as a planar etch. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940001953A 1994-02-03 1994-02-03 Method of forming device isolation film of semiconductor device KR950025953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940001953A KR950025953A (en) 1994-02-03 1994-02-03 Method of forming device isolation film of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940001953A KR950025953A (en) 1994-02-03 1994-02-03 Method of forming device isolation film of semiconductor device

Publications (1)

Publication Number Publication Date
KR950025953A true KR950025953A (en) 1995-09-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940001953A KR950025953A (en) 1994-02-03 1994-02-03 Method of forming device isolation film of semiconductor device

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KR (1) KR950025953A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6799987B1 (en) 1999-06-03 2004-10-05 Lg.Philips Lcd Co., Ltd. Wire connecting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6799987B1 (en) 1999-06-03 2004-10-05 Lg.Philips Lcd Co., Ltd. Wire connecting device

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