KR950001925A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
- Publication number
- KR950001925A KR950001925A KR1019930011364A KR930011364A KR950001925A KR 950001925 A KR950001925 A KR 950001925A KR 1019930011364 A KR1019930011364 A KR 1019930011364A KR 930011364 A KR930011364 A KR 930011364A KR 950001925 A KR950001925 A KR 950001925A
- Authority
- KR
- South Korea
- Prior art keywords
- resist
- low step
- primary
- globally
- steps
- Prior art date
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- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
본 발명은 반도체 제조공정에서 단차가 발생된 웨이퍼 상부에 평탄화된 레지스트를 도포하기 위하여 광역적으로 낮은 실리콘기판 상부에 1차 레지스트패턴을 형성하고 다시 2차 레지스트를 도포하는 기술이다.The present invention is a technique for forming a first resist pattern on the globally low silicon substrate in order to apply the planarized resist on top of the wafer where the step is generated in the semiconductor manufacturing process, and then again apply a second resist.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1A도 내지 제1E도는 본 발명의 실시예에 의해 광역적으로 단차가 발생된 지역에 1차 레지스트패턴을 형성한 다음, 2차 레지스트를 전체적으로 도포하여 표면을 평탄하게 형성한 단면도.1A to 1E are cross-sectional views in which a first resist pattern is formed in a region where a step difference is generated globally according to an embodiment of the present invention, and then the second resist is applied as a whole to form a flat surface.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930011364A KR950001925A (en) | 1993-06-22 | 1993-06-22 | Semiconductor device manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930011364A KR950001925A (en) | 1993-06-22 | 1993-06-22 | Semiconductor device manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950001925A true KR950001925A (en) | 1995-01-04 |
Family
ID=67134876
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930011364A KR950001925A (en) | 1993-06-22 | 1993-06-22 | Semiconductor device manufacturing method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950001925A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970008403A (en) * | 1995-07-10 | 1997-02-24 | 김주용 | Insulation Planarization Method |
-
1993
- 1993-06-22 KR KR1019930011364A patent/KR950001925A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970008403A (en) * | 1995-07-10 | 1997-02-24 | 김주용 | Insulation Planarization Method |
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