KR950024580A

KR950024580A - Decoding error exposure prevention device

Info

Publication number: KR950024580A
Application number: KR1019940000261A
Authority: KR
Inventors: 박상국
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1994-01-08
Filing date: 1994-01-08
Publication date: 1995-08-21
Also published as: KR0152030B1

Abstract

본 발명은 부호화된 영상데이타를 다시 복호화할때 에러가 발생되면 에러가 발생된 부분의 데이타를 그전 프레임의 데이타로 대체시켜 재생 또는 수신측에서 사용자가 에러가 발생했음을 못 느끼도록 한 복호화에러 노출방지장치에 관한 것이다.In the present invention, when an error occurs when decoding the encoded image data again, the data of the error portion is replaced with the data of the previous frame, thereby preventing the exposure error of decoding that prevents the user from feeling that an error has occurred on the playback or receiving side. Relates to a device.

이러한 본 발명은 가변장 복호화부에서 EOB의 갯수를 카운팅하여 에러발생여부를 체크하고, 에러노출 방지부는 가변장 복호화부의 에러신호에 따라 영상데이타의 전송을 제어하여 에러가 발생된 부분의 영상데이타를 모두 제로데이타로 만들어 출력함으로써 강제인터모드로 전환시킨다. 복호화-역변환부는 재구성할 때 에러발생부분의 데이타를 그전 프레임의 영상데이타로 대체하여 출력한다. 따라서, 사용자가 수신측에서 에러가 발생했음을 못 느끼도록 하는 효과가 있다.The present invention checks whether an error occurs by counting the number of EOBs in the variable length decoding unit, and the error exposure prevention unit controls the transmission of the image data according to the error signal of the variable length decoding unit to determine the image data of the portion where the error occurs. All are set to zero data and the output is converted to forced inter mode. The decoding-inverse transform unit replaces the data of the error occurrence part with the image data of the previous frame and outputs the data. Therefore, there is an effect of preventing the user from feeling that an error has occurred on the receiving side.

Description

Decoding error exposure prevention device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 디지탈 수신장치의 블럭구성도,2 is a block diagram of a digital receiver of the present invention;

제3도는 본 발명에서 정의한 영상데이타의 처리단위예를 나타낸 화면상태도,3 is a screen state diagram showing an example of a processing unit of image data defined in the present invention;

제4도는 에러노출 방지부의 상세구성을 보인 블럭도.4 is a block diagram showing the detailed configuration of the error exposure prevention unit.

Claims

A digital receiving apparatus for decoding image data encoded in a block unit of a predetermined size by a transmitting apparatus, comprising: a variable length decoding unit configured to variably decode the received image data and output the same, and to check whether a decoding error has occurred and to output an error signal; ; An error exposure prevention unit for controlling the transmission of the image data according to the error signal of the variable length decoding unit and converting the image data of the portion in which the error occurs to zero data into a forced inter mode; Decoding and inverse DCT corresponding to the encoding of the transmission phase value on the image data applied from the error exposure prevention unit, and the error occurrence data includes a decoding-inverse transform unit for reconstructing the image data of the previous frame. Error exposure prevention device.

The decoding error exposure apparatus of claim 1, wherein the variable length decoding unit is configured to determine whether an error occurs by counting the number of EOB codes included at the end of a block in the image data decoded in units of blocks of a predetermined size. Prevention device.

The apparatus of claim 1, wherein the error exposure prevention unit comprises: a memory unit for storing data of 1 MMB of the variable length decoding lower rotor input through the data control unit and outputting the stored data to the data control unit; A timing controller which generates various signals necessary for controlling the write / read operation of the memory unit according to the error signal applied from the variable length decoder, and outputs them to the memory unit and the data control unit; Decoding error exposure prevention device comprising the data control unit for controlling the data input from the variable length decoding unit and the data output to the decoding-inverse conversion unit by interfacing the data with the memory unit in accordance with the error control signal output from the timing control unit .

The memory device of claim 3, wherein the memory unit comprises: two RAMs configured to alternately write / read image data of at least 1 MMB according to an address signal applied from a timing controller; First switching means for alternately transferring the image data transmitted to the data controller by switching according to a write enable signal applied from a timing controller at the input of the RAMs; Decoding error exposure prevention device characterized in that it comprises a second switching means for switching in accordance with the read enable signal applied from the timing control unit at the output terminal of the wraps to output the image data read from the two RAM to the data control unit in order. .

4. The apparatus of claim 3, wherein the memory unit operates in response to a write enable signal and a read enable signal applied from the timing controller, and alternately stores 1 MMB or more of image data transmitted from the data controller and outputs the data to the data controller. Decryption error exposure prevention device, characterized in that consisting of.

4. The data controller of claim 3, wherein the data controller is configured to process the image data and the head data included in the 1MMB data being processed as zero data when the error control signal is input from the timing controller to indicate that there is almost no motion. Decryption error exposure prevention device, characterized in that forced to switch.

※ Note: The disclosure is based on the initial application.