KR950010375A - Automatic Oscillation Control Device and Method - Google Patents

Automatic Oscillation Control Device and Method Download PDF

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Publication number
KR950010375A
KR950010375A KR1019930018174A KR930018174A KR950010375A KR 950010375 A KR950010375 A KR 950010375A KR 1019930018174 A KR1019930018174 A KR 1019930018174A KR 930018174 A KR930018174 A KR 930018174A KR 950010375 A KR950010375 A KR 950010375A
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KR
South Korea
Prior art keywords
oscillator
frequency
oscillation
input
synchronization signal
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Application number
KR1019930018174A
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Korean (ko)
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KR960004470B1 (en
Inventor
김용희
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김광호
삼성전자 주식회사
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Priority to KR1019930018174A priority Critical patent/KR960004470B1/en
Publication of KR950010375A publication Critical patent/KR950010375A/en
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Publication of KR960004470B1 publication Critical patent/KR960004470B1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronizing For Television (AREA)

Abstract

이 발명은 자동 발진 제어장칭 및 방법에 관한 것으로서, 멀티 모드 모니터의 수평 혹은 수직동기신호의 주파수에 대한 발진기의 발진주파수의 위상을 맞추기 위해 마이크로 컴퓨터를 이용한 것이다.The present invention relates to an automatic oscillation control device and method, which uses a microcomputer to match the phase of the oscillator frequency with respect to the frequency of a horizontal or vertical synchronous signal of a multi-mode monitor.

마이크로 컴퓨터는 비데오 카드로부터 입력되는 동기신호의 주파수와 발진기의 발진주파수를 카운트하여 비교하고, 발진기의 주파수를 높게해야할지 낮게해야할지가 판단되어지므로 그에 따른 데이타를 디지탈/아날로그 별환기에 출력하면, 디지탈/아날로그 변환기에서 변환된 전압은 발진기의 발진조장단자로 인가되어 발진기의 출력 주파수를 조정하여 출력하게 된다. 그리고, 마이크로 컴퓨터는 발진기의 발진주파수가 동기신호의 주파수와 같아질때까지 동기신호 처리부의 동기신호가 발진기의 기준동기신호단자에 입력되는 것을 차단한다. 따라서, 이 발명은 입력되는 동기신호의 주파수가 높거나 또는 낮게 입력되는 멀티 모드 모니터에 적용된다.The microcomputer counts and compares the frequency of the synchronous signal input from the video card and the oscillation frequency of the oscillator, and determines whether the frequency of the oscillator should be increased or decreased. Therefore, if the data is output to the digital / analog converter, The voltage converted by the analog converter is applied to the oscillation regulator terminal of the oscillator to adjust and output the output frequency of the oscillator. The microcomputer blocks the synchronization signal of the synchronization signal processing unit from being input to the reference synchronization signal terminal of the oscillator until the oscillation frequency of the oscillator is equal to the frequency of the synchronization signal. Therefore, the present invention is applied to a multi-mode monitor in which the frequency of the input synchronization signal is high or low.

Description

자동 발진 제어장치 및 방법Automatic Oscillation Control Device and Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1a, b도는 종래 기술에 따른 발진 제어장치를 나타내는 블럭도.1A and 1B are block diagrams showing an oscillation control device according to the prior art.

제2도는 이 발명에 따른 자동 발진 제어장치의 일실시예를 나타내는 블럭도.2 is a block diagram showing an embodiment of an automatic oscillation control apparatus according to the present invention.

제3a, b도는 이 발명에 따른 자동 발진 제어방법의 일실시예를 나타내는 순서도이다.3a and b are flowcharts showing one embodiment of the automatic oscillation control method according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 주파수/전압 변환기 2, 3 : 비교기1: frequency / voltage converter 2, 3: comparator

10 : 동기신호 처리부 20 : 마이크로 컴퓨터10: synchronization signal processing unit 20: microcomputer

30 : 발진기 40 : 디지탈/아날로그 변환기30: oscillator 40: digital / analog converter

50 : 버퍼 Q1~Q3 : 트랜지스터50: buffer Q1 to Q3: transistor

R1~R6, R11~R19 : 저항 VR1~VR4 : 가변저항R1 ~ R6, R11 ~ R19: Resistor VR1 ~ VR4: Variable Resistor

SW1, SW2 : 스위치SW1, SW2: switch

Claims (3)

복합, 분리 및 비데오 동기신호를 입력받아 수평동기신호와 수직동기신호로 분리하여 버퍼용 제1트랜지스터와 커플링용 콘덴서를 거쳐 발진기에 출력하는 동기신호 처리부와, 상기 발진기의 발진주파수를 조정하기 위한 아날로그 신호를 발진기의 발진조정단자에 제공하는 디지탈/아날로그 변환기와, 상기 동기신호 처리부의 출력신호를 기준동기입력단자로 입력하고 발진조정단자로 입력되는 전류값에 따라 발진출력단자로 출력할 주파수의 위상과 주파수값을 조정하여 출력하는 발진기로 구성된 자동 발진 제어 장치에 있어서, 상기 동기신호 처리부의 동기 신호를 제1입력단자로 입력하고 발진기의 출력 발진주파수를 제2입력단자로 입력하여 두 입력신호를 카운트하고 비교하여 그 차에 따른 데이타를 상기 디지탈/아날로그 변환기에 제공하는 마이크로 컴퓨터와; 상기 마이크로 컴퓨터의 제어단자로부터 제어신호를 입력받아 동기신호의 주파수와 발진기의 발진주파수가 같지 않을때 상기 동기신호 처리부의 동기신호가 발진기의 기준동기입력단자에 인가되지 않도록하고, 동기신호의 주파수와 발진기의 발진주파수가 같을때 동기신호 처리부의 동기신호가 발진기의 기준동기입력단자에 인가되도록 상기 제1트랜지스터와 콘덴서사이의 접점에 연결되어 스위칭작용을 하는 스위칭부와; 상기 발진의 발진출력단자에 출력하는 발진주파수를 상기 마이크롤 컴퓨터의 제2입력단자에 제공하기 위한 버퍼로 구성된 자동 발진 제어장치.A synchronization signal processing unit for receiving the composite, separation, and video synchronization signals into horizontal and vertical synchronization signals, and outputting them to the oscillator through a buffer first transistor and a coupling capacitor; and an analog for adjusting the oscillation frequency of the oscillator. A digital / analog converter for providing a signal to the oscillation adjusting terminal of the oscillator, and the phase of the frequency to be input to the oscillation output terminal according to the current value input to the output signal of the synchronous signal processing unit as a reference synchronous input terminal. In the automatic oscillation control device comprising an oscillator for adjusting and outputting the frequency value and the frequency value, inputting the synchronous signal of the synchronous signal processing unit to the first input terminal and the output oscillation frequency of the oscillator to the second input terminal to input two input signals. To count and compare and provide data according to the difference to the digital to analog converter. Micro computer; When a control signal is input from the control terminal of the microcomputer, when the frequency of the synchronization signal and the oscillation frequency of the oscillator are not the same, the synchronization signal of the synchronization signal processor is not applied to the reference synchronization input terminal of the oscillator. A switching unit connected to a contact between the first transistor and the condenser so as to apply a synchronous signal to the reference synchronous input terminal of the oscillator when the oscillation frequency of the oscillator is the same; And a buffer configured to provide an oscillation frequency output to the oscillation output terminal of the oscillation to a second input terminal of the microphone roll computer. 제1항에 있어서, 상기 스위칭부는, 베이스는 상기 마이크로 컴퓨터의 제어단자에 연결되어 있고, 콜렉터는 접지되어 있으며, 이미터는 이미터 전류 제한용 저항을 거쳐 상기 제1트랜지스터와 콘덴서사이의 접점에 연결되어 있는 제2트랜지스터로 된 것을 특징으로 하는 자동 발진 제어장치.The switching unit of claim 1, wherein the base unit is connected to a control terminal of the microcomputer, the collector is grounded, and the emitter is connected to a contact between the first transistor and the capacitor through a resistor for limiting the emitter current. Automatic oscillation control device characterized in that the second transistor. 비데오 카드로부터 입력되는 동기신호와 주파수와 발진기의 발진주파수를 카운트한 시간이 100ms가 되었는지 판별하여 100ms가 되면 카운터를 중지하고 100ms동안 카운트할 값을 제1 및 제2카운트 버퍼 레지스터에 기록하는 단계와; 상기 단계에서 동기신호의 주파수가 기록된 제1카운터 버퍼 레지스터와 발진기의 발진주파수가 기록된 제2카운터 버퍼 레지스터의 값보다 크다고 판별되면 디지탈/아날로그 변환기에 큰값의 데이타를 출력하고, 제1카운터 버퍼 레지스터의 값이 제2카운터 버퍼 레지스터의 값보다 작다고 판별되면 디지탈/아날로그 변환기에 작은값의 데이타를 출력하는 단계로 이루어지는 것을 특징으로 하는 자동 발진 제어방법.Determining whether the counting time of the synchronization signal and frequency inputted from the video card and the oscillation frequency of the oscillator have reached 100 ms, and stopping the counter at 100 ms, and recording a value to be counted for 100 ms in the first and second count buffer registers; ; In this step, if it is determined that the frequency of the synchronization signal is greater than the value of the first counter buffer register and the oscillator oscillation frequency recorded in the second counter buffer register, and outputs a large value data to the digital / analog converter, the first counter buffer And outputting data of a small value to the digital / analog converter if it is determined that the value of the register is smaller than the value of the second counter buffer register. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930018174A 1993-09-10 1993-09-10 Apparatus and method for controlling oscillation KR960004470B1 (en)

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KR960004470B1 KR960004470B1 (en) 1996-04-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100230752B1 (en) * 1997-05-10 1999-11-15 구자홍 Samll paper transmitting and receiving facsimile
KR100285741B1 (en) * 1997-12-24 2001-04-02 윤종용 Mathod for operating preview function of received image in a image mailling apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100230752B1 (en) * 1997-05-10 1999-11-15 구자홍 Samll paper transmitting and receiving facsimile
KR100285741B1 (en) * 1997-12-24 2001-04-02 윤종용 Mathod for operating preview function of received image in a image mailling apparatus

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Publication number Publication date
KR960004470B1 (en) 1996-04-06

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