KR960038613A - Self-testing circuit of video signal - Google Patents

Self-testing circuit of video signal Download PDF

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Publication number
KR960038613A
KR960038613A KR1019950010303A KR19950010303A KR960038613A KR 960038613 A KR960038613 A KR 960038613A KR 1019950010303 A KR1019950010303 A KR 1019950010303A KR 19950010303 A KR19950010303 A KR 19950010303A KR 960038613 A KR960038613 A KR 960038613A
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KR
South Korea
Prior art keywords
signal
output
video
processor
video signal
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Application number
KR1019950010303A
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Korean (ko)
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KR0155086B1 (en
Inventor
전병조
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019950010303A priority Critical patent/KR0155086B1/en
Publication of KR960038613A publication Critical patent/KR960038613A/en
Application granted granted Critical
Publication of KR0155086B1 publication Critical patent/KR0155086B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

본 발명은 모니터에 관한 것으로서, 특히 외부에서 입력되는 비디오신호가 화면에 디스플레이되도록 콤퓨터에서 출력되는 비디오신호가 뮤팅되는 비디오신호의 자체 테스팅회로에 관한 것이다. 이와같은 본 발명은 콘넥터(10)를 통해 비디오신호가 입력되면, 동기신호(Hs)에 따라 저전위 상태에 제어신호를 출력하는 마이크로프로세서(20)와, 마이크로프로세서(20)의 출력신호에 의해 스위칭되어 고압(AFC)이 뮤팅되도록 처리하는 고압처리부(30)와, 고압처리부(30)의 출력신호와 입력되는 동기신호(Hs)에 의해 클램핑신호(CL)가 뮤팅되도록 처리하는 클램핑신호 처리부(40)와, 클램핑신호 처리부(40)의 출력신호에 의해 비디오프로세서(50)에서 출력되는 비디오신호(R)(G)(B)의 출력을 차단시키는 스위칭부(60)로 구성된다.The present invention relates to a monitor, and more particularly, to a self-testing circuit of a video signal in which a video signal output from a computer is muted so that a video signal input from an external device is displayed on a screen. Such an output signal of the present invention when the video signal input through the connector 10, the synchronization signal the microprocessor 20, the microprocessor 20 outputs a control signal to the low-potential state in accordance with (H s) The clamping signal processor for processing the clamping signal CL to be muted by the high-pressure processor 30 for processing to be muted and the high voltage (AFC) muted, and the output signal and the synchronization signal (Hs) input of the high-pressure processor (30). 40, and a switching unit 60 for blocking the output of the video signal (R) (G) (B) output from the video processor 50 by the output signal of the clamping signal processing unit (40).

Description

비디오신호의 자체 테스팅회로Self-testing circuit of video signal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 비디오신호의 자체 테스팅회로의 구성을 보인 도면.2 is a diagram showing a configuration of a self-testing circuit of a video signal according to the present invention.

Claims (2)

콘넥터(10)을 통해 비디오신호가 입력되면 고압 및 클램핑신호 및 비디오프로세서의 비디오신호가 뮤팅되도록 처리하는 모니터에 있어서, 상기 콘넥터(10)를 통해 비디오신호가 입력되면, 동기신호(Hs)에 따라 저전위 상태의 제어신호를 출력하는 마이크로프로세서(20)와, 상기 마이크로프로세서(20)의 출력신호에 의해 스위칭되어 고압(AFC)이 뮤팅되도록 처리하는 고압처리부(30)와, 상기 고압처리부(30)의 출력신호와 입력되는 동기신호(Hs)에 의해 클램핑신호(CL)가 뮤팅되도록 처리하는 클램핑신호 처리부(40)와, 상기 클램핑신호 처리부(40)의 출력신호에 의해 비디오프로세서(50)에서 출력되는 비디오신호(R)(G)(B)의 출력을 차단시키는 스위칭부(60)로 구성됨을 특징으로 하는 비디오신호의 자체 테스팅회로.In If Once through the connector 10, the video signal is input to a high pressure and a clamping signal and in the monitoring of the process so that the muting the video signals of the video processor, the video signal is input through the connector 10, a synchronous signal (H s) According to the microprocessor 20 for outputting a control signal of the low potential state, the high-pressure processor 30 for processing to be muted by the output signal of the microprocessor 20, the high-pressure (AFC), and the high-pressure processor ( The clamping signal processor 40 processes the clamping signal CL to be muted by the output signal 30 and the input synchronization signal H s , and the video processor 50 by the output signal of the clamping signal processor 40. Self-testing circuit of the video signal, characterized in that it is composed of a switching unit 60 for blocking the output of the video signal (R) (G) (B) output from. 제1항에 있어서, 상기 스위칭부(60)는 상기 클램핑신호 처리부(40)의 출력신호에 의해 턴오프상태로 스위칭되어 비디오프로세서(50)에서 출력되는 비디오신호(R)(G)(B)의 출력이 차단되도록 제어하는 다이오드(D61)(D63)로 구성됨을 특징으로 하는 비디오신호의 자체 테스팅회로.The video signal (R) (G) (B) of claim 1, wherein the switching unit (60) is switched off by the output signal of the clamping signal processing unit (40) and output from the video processor (50). Self-testing circuit of the video signal, characterized in that consisting of a diode (D61) (D63) for controlling the output of the cut off.
KR1019950010303A 1995-04-28 1995-04-28 Self testing circuit of video signal KR0155086B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950010303A KR0155086B1 (en) 1995-04-28 1995-04-28 Self testing circuit of video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950010303A KR0155086B1 (en) 1995-04-28 1995-04-28 Self testing circuit of video signal

Publications (2)

Publication Number Publication Date
KR960038613A true KR960038613A (en) 1996-11-21
KR0155086B1 KR0155086B1 (en) 1998-11-16

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950010303A KR0155086B1 (en) 1995-04-28 1995-04-28 Self testing circuit of video signal

Country Status (1)

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KR (1) KR0155086B1 (en)

Also Published As

Publication number Publication date
KR0155086B1 (en) 1998-11-16

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