KR950010120A

KR950010120A - Index Guide Type Field Effect Transistor Manufacturing Method

Info

Publication number: KR950010120A
Application number: KR1019930018889A
Authority: KR
Inventors: 최성천
Original assignee: 이헌조; 주식회사 금성사
Priority date: 1993-09-17
Filing date: 1993-09-17
Publication date: 1995-04-26
Also published as: KR970011159B1

Abstract

본 발명은 인텍스 가이드형 전계효과 트랜지스터 제조방법에 관한 것으로, 종래의 전계효과 반도체 레이저는 종축방향(y축)으로는 활성층의 굴절율이 높아 인덱스 가이딩(index guiding)에 의해 생성된 빛이 활성층 내부에 접속되지만 횡축방향(x측)으로는 굴절율이 일정하게 빛을 집속시킬 수 없게 되어 있다.The present invention relates to a method for manufacturing an index guided field effect transistor. In the conventional field effect semiconductor laser, since the refractive index of the active layer is high in the longitudinal axis (y-axis), light generated by index guiding is inside the active layer. It is connected to, but the refractive index is not able to focus light uniformly in the horizontal axis direction (x side).

따라서, 반도체 레이저의 내부효율이 떨어지고, 방출되는 레이저빔이 횡축방향으로 퍼지게 되어 반도체 레이저의 빔패턴이 좋지 않는 문제점이 있었다.Therefore, the internal efficiency of the semiconductor laser is lowered, and the emitted laser beam is spread in the horizontal axis direction, so that the beam pattern of the semiconductor laser is not good.

본 발명은 이러한 문제점을 해결하기 위하여 기판상의 전류제한층을 등방성 식각 또는 이방성 식각으로 식각하여 반도체 레이저의 횡축방향(x축)으로도 굴절율차에 의한 인덱스 가이딩 효과를 줌으로써 반도체 레이저의 효율을 높이고, 방사되는 반도체레이저의 빔패턴을 좋게 할 수 있도록 하는 것이다.In order to solve this problem, the current limiting layer on the substrate is etched by isotropic etching or anisotropic etching to increase the efficiency of the semiconductor laser by providing an index guiding effect due to the refractive index difference in the horizontal axis direction (x-axis) of the semiconductor laser. Therefore, the beam pattern of the emitted semiconductor laser can be improved.

Description

Manufacturing method of index guided field effect transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 등방성 식각에 따른 본 발명 인텍스 가이드형 전계효과 트랜지스터의 단면 구조도,2 is a cross-sectional structural view of the index guide field effect transistor of the present invention according to isotropic etching;

제3도의 (가) 내지 (다)는 제3도에 대한 제조공정도,(A) to (c) of FIG. 3 is a manufacturing process diagram of FIG.

제4도는 이방성 식각에 따른 본 발명 인덱스 가이드형 전계효과 트랜지스터의 단면 구조도.4 is a cross-sectional structure diagram of an index guided field effect transistor of the present invention according to anisotropic etching.

Claims

Forming a current limiting layer on the substrate and then etching the current limiting layer of the portion to be the hardness of the current, sequentially forming a first cladding layer, an active layer, and a second cladding layer on the current limiting layer; Forming a first electrode under the substrate, forming a second cladding layer on both sides of the second cladding layer, and forming a gate electrode on the second cladding layer where the current limiting layer is etched. An index guided field effect transistor manufacturing method comprising:

The method of claim 1, further comprising forming a buffer layer between the substrate and the current limiting layer.

The method of claim 1, further comprising forming a buffer layer between the current limiting layer and the first cladding layer.

The method of claim 1, wherein the current limiting layer etching step uses an isotropic etching method.

The method of claim 4, wherein an etchant including sulfuric acid (H ₂ SO ₄ ) is used as the isotropic etchant.

The method of claim 1, wherein the current limiting layer etching step uses an anisotropic etching method.

7. The method of claim 6, wherein an etchant containing ammonia (NH ₄ OH) is used as the anisotropic etchant.

The method of claim 1, wherein the active layer is formed of one of a quantum well, a multi-quantum well, an SCH, and a GRIN-SCH structure.

※ Note: The disclosure is based on the initial application.