KR950007078A - 전기도금법에 의한 고집적회로 미세패턴의 구리충전방법 - Google Patents

전기도금법에 의한 고집적회로 미세패턴의 구리충전방법 Download PDF

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Publication number
KR950007078A
KR950007078A KR1019930016096A KR930016096A KR950007078A KR 950007078 A KR950007078 A KR 950007078A KR 1019930016096 A KR1019930016096 A KR 1019930016096A KR 930016096 A KR930016096 A KR 930016096A KR 950007078 A KR950007078 A KR 950007078A
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KR
South Korea
Prior art keywords
copper
thin film
electroplating
electrolyte
micropattern
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Application number
KR1019930016096A
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English (en)
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KR960016482B1 (ko
Inventor
주승기
황규호
Original Assignee
이기준
서울대학교 공과대학 교육연구재단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 이기준, 서울대학교 공과대학 교육연구재단 filed Critical 이기준
Priority to KR1019930016096A priority Critical patent/KR960016482B1/ko
Publication of KR950007078A publication Critical patent/KR950007078A/ko
Application granted granted Critical
Publication of KR960016482B1 publication Critical patent/KR960016482B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052Wet cleaning only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

본 발명은 전기도금법에 의해 구리금속선을 형성하는 방법에 관한 것으로 전해액과 음극에서 전기화학반응을 이용하여 기판의 기하학적 모양에 큰 영향을 받지 않고 실리콘위에만 선택적으로 평탄한 박막을 형성하며, 좁고 깊어진 서브마이크론의 접촉창이나 다층배선의 바이어를 구리로 선택적 충전하는 방법에 관한 것이다.

Description

전기도금법에 의한 고집적회로 미세패턴의 구리충전방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관련된 다층 배선구조로 구리가 선택적으로 충전된 형상을 도시하는 단면도.
제2도는 구리도금장치의 구조를 나타내는 개략도.
제3도는 제2도의 음극기판을 나타내는 상세도.

Claims (3)

  1. 전기도금법에 의한 고집적회로 미세패턴의 선택적 구리충전방법에 있어서, 미세접촉장 구조를 갖는 실리콘 웨이퍼뒷면에 알루미늄 박막을 형성하는 단계; 도금장치의 구조에 따라 알루미늄 박막층위에 절연체를 도포하는 단계; 도금부위인 접촉창의 자연산화막을 제거하기 위해서 50 : l의 불산에 1분간 산세척한 후 이온교환수 세척을 거쳐 질소로 건조시키는 단계; 실리콘 기판인 음극과 구리양극 사이에 정전류를 가해 전해액내의 구리이온이 기판표면에 환원되면서 구리박막을 형성하는 단계; 및 상기 구리박막층 부위를 이온교환수 세척을 거쳐 질소로 건조하는 단계로 구성되는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.
  2. 제1항에 있어서, 전해액에 젤라틴을 첨가하는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.
  3. 제1항에 또는 2항에 있어서, 상기 전기도금은 상온에서 이루어지며, 전해액교반상태에서 정전류도금을 행하는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930016096A 1993-08-19 1993-08-19 전기도금법에 의한 고집적회로 미세패턴의 구리충전방법 KR960016482B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930016096A KR960016482B1 (ko) 1993-08-19 1993-08-19 전기도금법에 의한 고집적회로 미세패턴의 구리충전방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930016096A KR960016482B1 (ko) 1993-08-19 1993-08-19 전기도금법에 의한 고집적회로 미세패턴의 구리충전방법

Publications (2)

Publication Number Publication Date
KR950007078A true KR950007078A (ko) 1995-03-21
KR960016482B1 KR960016482B1 (ko) 1996-12-12

Family

ID=19361564

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930016096A KR960016482B1 (ko) 1993-08-19 1993-08-19 전기도금법에 의한 고집적회로 미세패턴의 구리충전방법

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KR (1) KR960016482B1 (ko)

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Publication number Publication date
KR960016482B1 (ko) 1996-12-12

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