KR950003206A - 실리콘 소자용 유리 판넬의 제조방법 - Google Patents

실리콘 소자용 유리 판넬의 제조방법 Download PDF

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KR950003206A
KR950003206A KR1019940016032A KR19940016032A KR950003206A KR 950003206 A KR950003206 A KR 950003206A KR 1019940016032 A KR1019940016032 A KR 1019940016032A KR 19940016032 A KR19940016032 A KR 19940016032A KR 950003206 A KR950003206 A KR 950003206A
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glass panel
silicon device
glass
film
silicon
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KR1019940016032A
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폴 펠너 프란시스
아서 사체닉 폴
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알프레드 엘. 미첼슨
코닝 인코오포레이티드
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Publication of KR950003206A publication Critical patent/KR950003206A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02595—Microstructure polycrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Liquid Crystal (AREA)
  • Surface Treatment Of Glass (AREA)
  • Thin Film Transistor (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

560℃보다 높은 변형점을 갖는 유리기판 위에 비결정질 또는 혼합상의 실리콘막 중 적어도 하나를 형성하는 단계와 상기 막 유리를 실리콘막이 다결정 실리콘으로 전환되고 유리가 압축되기에 충분한 시간동안 적어도 550℃의 온도에서 열처리하는 단계로 이루어지는 것을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법에 관한 것이다.

Description

실리콘 소자용 유리 판넬의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 판넬의 일측면도이다.

Claims (10)

  1. 560℃의 변형점을 가지는 유리기판상에 적어도 하나의 비결정질 또는 혼합상의 실리콘 막을 형성시키는 단계 및 상기 실리콘 막을 다결정 실리콘으로 전환시키고 유리를 압축시키기에 충분한 시간동안 적어도 550℃의 온도에서 상기 박막유리를 열처리 시키는 것을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  2. 제1항에 있어서, 상기 막의 두께가 50-200nm 범위인 것을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  3. 제1항에 있어서, 나트륨 이온의 이동을 방지하는 베리어층 및 보호 실리카층을 포함하는 막들이 스택으로 연속 침적됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  4. 제1항, 제2항 또는 제3항에 있어서, 스택의 막 또는 막들이 300~560℃ 온도범위에서 PECVD(Plasma Enhanced Chemical Vapor Deposition)에 의해 침적됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  5. 제1항, 제2항, 제3항 또는 제4항에 있어서, 상기 막 또는 막들이 불소로 도프(doped)됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  6. 제1항 내지 제5항 중 어느 한 항에 있어서, 이온, 특히 나트륨 이온의 이동을 방지하는 상기 베리어층이 상기 막과 상기 유리의 적어도 하나의 중간매체로 침적되고, 임의적으로 온-라인으로 적용됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  7. 제1항에 있어서, 실리카 보호층이 상기의 적어도 하나의 막 위에 침적됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  8. 제6항에 있어서, 상기 베리어층 및/또는 보호층이 실리카로 이루어지는 것을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  9. 제1항 내지 제8항중 어느 한 항에 있어서, 상기 열처리에 적용된 온도가 유리의 변형점 이하로 10℃ 이상 낮지 않은 온도 또는 200-1000nm 범위의 결정을 성장시키기에 충분한 온도임을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
  10. 제1항 내지 제9항 중 어느 한항에 있어서, 상기 실리콘 소자가 상기 유리의 압축기판 또는 비압축 기판상에 적어도 하나의 막을 포함하는 LCD소자이고, 상기 압축 및 막 결정화가 통합 공정으로 수행됨을 특징으로 하는 실리콘 소자용 유리판넬의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940016032A 1993-07-06 1994-07-05 실리콘 소자용 유리 판넬의 제조방법 KR950003206A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8/086,661 1993-07-06
US08/086,661 US5372860A (en) 1993-07-06 1993-07-06 Silicon device production

Publications (1)

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KR950003206A true KR950003206A (ko) 1995-02-16

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Country Link
US (1) US5372860A (ko)
EP (1) EP0633604A1 (ko)
JP (1) JPH07140454A (ko)
KR (1) KR950003206A (ko)
CA (1) CA2123189A1 (ko)
IL (1) IL110194A (ko)
TW (1) TW349080B (ko)

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JPH07109573A (ja) * 1993-10-12 1995-04-25 Semiconductor Energy Lab Co Ltd ガラス基板および加熱処理方法
JP3645380B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法、情報端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、ビデオカメラ、投射型表示装置
JP3645378B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645379B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
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US8501594B2 (en) * 2003-10-10 2013-08-06 Applied Materials, Inc. Methods for forming silicon germanium layers
US7078302B2 (en) * 2004-02-23 2006-07-18 Applied Materials, Inc. Gate electrode dopant activation method for semiconductor manufacturing including a laser anneal
US7682940B2 (en) 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
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JP5090451B2 (ja) 2006-07-31 2012-12-05 アプライド マテリアルズ インコーポレイテッド 炭素含有シリコンエピタキシャル層の形成方法
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Also Published As

Publication number Publication date
US5372860A (en) 1994-12-13
JPH07140454A (ja) 1995-06-02
IL110194A (en) 1997-03-18
TW349080B (en) 1999-01-01
IL110194A0 (en) 1994-10-21
EP0633604A1 (en) 1995-01-11
CA2123189A1 (en) 1995-01-07

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