KR940020518A - 반도체 패키지의 다이 어태치 방법 - Google Patents

반도체 패키지의 다이 어태치 방법 Download PDF

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Publication number
KR940020518A
KR940020518A KR1019930001298A KR930001298A KR940020518A KR 940020518 A KR940020518 A KR 940020518A KR 1019930001298 A KR1019930001298 A KR 1019930001298A KR 930001298 A KR930001298 A KR 930001298A KR 940020518 A KR940020518 A KR 940020518A
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South Korea
Prior art keywords
die
semiconductor package
die attach
pad
attach method
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KR1019930001298A
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English (en)
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KR100243556B1 (ko
Inventor
박노경
김민섭
최희국
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김광호
삼성전자 주식회사
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Priority to KR1019930001298A priority Critical patent/KR100243556B1/ko
Publication of KR940020518A publication Critical patent/KR940020518A/ko
Application granted granted Critical
Publication of KR100243556B1 publication Critical patent/KR100243556B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

반도체 패키지의 다이 어태치 방법에 관한 것으로서, 다이 어태치 공정시 다이표면의 이물질이 자연히 제거되도록하기 위하여, 다이가 실장되는 패드 또는 리이드의 실장면이 아래로 노출되도록 설치한 후, 상하좌우로 자유로이 운동가능하고 소정의 각도로 회전되는 이송장치가 다이를 흡착 이송시켜 정렬하고 상기 다이의 하면 또는 상면을 상기 실장면 상에 실장하였다.
따라서 다이표면의 이물질이 자연히 제거되므로 표면 이물질에 의한 다이 표면의 스크래치 발생 및 반도체 패키지의 크랙등과 같은 불량 발생을 방지할 수 있다. 다이패드상에 다이가 실장되는 통상의 반도체 패키지이외에 리이드 온 칩등과 같은 방법을 사용하는 다양한 반도체 패키지에 적용 가능하다.

Description

반도체 패키지의 다이 어태치 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 이 발명에 따른 반도체 패키지의 다이 어태치 공정의 일실시예를 설명하기 위한 개략도,
제4도는 이 발명에 따른 반도체 패키지의 다이 어태치 공정의 다른 실시예를 설명하기 위한 개략도이다

Claims (5)

  1. 반도체 패키지의 다이어태치 방법에 있어서, 다이가 실장되는 패드가 아래쪽으로 노출되도록 리이드 프레임을 설치하며, 다이의 실장면이 상기 패드와 대응되도록하여 다이를 실장하는 반도체 패키지의 다이 어태치 방법.
  2. 제1항에 있어서, 상기 리이드 프레임에 다이패드가 구비되어 있는 반도체 패키지의 다이 어태치 방법.
  3. 제1항에 있어서, 상기 다이가 실장되는 접착수단은 접착제 및 폴리 이미드 테이프로 구성되는 군에서 임의로 선택되는 하나의 수단인 반도체 패키지의 다이 어태치 방법.
  4. 제1항에 있어서, 상기 다이의 실장면이 상면 및 하면으로 이루어지는 군에서 임의로 선택되는 하나의 면인 반도체 패키지의 다이어태치 방법.
  5. 제1항에 있어서, 상기 리이드 프레임의 리이드들이 상기 다이상에 접착되는 반도체 패키지의 다이 어태치 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930001298A 1993-01-30 1993-01-30 반도체 패키지의 다이 어태치 방법 KR100243556B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930001298A KR100243556B1 (ko) 1993-01-30 1993-01-30 반도체 패키지의 다이 어태치 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930001298A KR100243556B1 (ko) 1993-01-30 1993-01-30 반도체 패키지의 다이 어태치 방법

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KR940020518A true KR940020518A (ko) 1994-09-16
KR100243556B1 KR100243556B1 (ko) 2000-02-01

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KR1019930001298A KR100243556B1 (ko) 1993-01-30 1993-01-30 반도체 패키지의 다이 어태치 방법

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100570513B1 (ko) * 1999-08-13 2006-04-13 삼성전자주식회사 반도체 패키지 제조용 반도체칩 어태치 시스템

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2832743B2 (ja) * 1990-06-28 1998-12-09 東芝メカトロニクス株式会社 インナーリードボンディング装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100570513B1 (ko) * 1999-08-13 2006-04-13 삼성전자주식회사 반도체 패키지 제조용 반도체칩 어태치 시스템

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