KR940020468A - 기판부착방법 - Google Patents

기판부착방법 Download PDF

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Publication number
KR940020468A
KR940020468A KR1019940003056A KR19940003056A KR940020468A KR 940020468 A KR940020468 A KR 940020468A KR 1019940003056 A KR1019940003056 A KR 1019940003056A KR 19940003056 A KR19940003056 A KR 19940003056A KR 940020468 A KR940020468 A KR 940020468A
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KR
South Korea
Prior art keywords
substrate
substrates
surface adsorption
pressure
attachment
Prior art date
Application number
KR1019940003056A
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English (en)
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KR100298632B1 (ko
Inventor
요시히로 미야자와
야수노리 오쿠보
Original Assignee
오오가 노리오
소니 가부시끼가이샤
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Application filed by 오오가 노리오, 소니 가부시끼가이샤 filed Critical 오오가 노리오
Publication of KR940020468A publication Critical patent/KR940020468A/ko
Application granted granted Critical
Publication of KR100298632B1 publication Critical patent/KR100298632B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/159—Strain gauges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere

Abstract

(목적) 기판의 부착시의 신축 및 부착후의 신축이 작은 기판부착방법을 제공한다.
(구성) 표면의 흡착력에 의해 기판(1) (4)끼리를 부착시켜서 부착기판을 형성하는 기판부착방법에 있어서 양기판(1) (4)간(7)의 압력 또는 양기판간(7)의 가스종류를 예를들면 대기압 이하 혹을 H2로 하는등 선택하여 부착을 행하는 기판부착방법.

Description

기판부착방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 실시예 1의 기판끼리의 흡착개시전의 상태를 나타내는 도면이다.
제2도는 실시예 1의 기판끼리의 부착전의 상태를 나타내는 도면이다.
제3도는 실시예 1의 기판끼리의 흡착부착시의 상태를 나타내는 도면이다.

Claims (5)

  1. 표면의 흡착력에 의해 기판끼리를 부착시켜서 부착기판을 형성하는 기판부착방법에 있어서, 양기판간의 압력 또는 양기판간의 가스종류를 선택하여 부착을 행하는 것을 특징으로 하는 기판부착방법.
  2. 표면의 흡착력에 의해 기판끼리를 부착시켜서 부착기판을 형성하는 기판 부착방법에 있어서, 표면흡착을 개시하기전의 기판간의 압력이 대기압이하인 것을 특징으로 하는 기판부착방법.
  3. 제2항에 있어서, 표면흡착을 개시하기전의 기판간의 압력이 0.2∼0.5기압인 것을 특징으로 하는 기판부착방법.
  4. 표면의 흡착력에 의해 기판끼리를 부착시켜서 부착기판을 형성하는 기판부착방법에 있어서, 표면흡착을 개시하기전의 기판간을 공기보다도 점성이 작은 가스로 충전하는 것을 특징으로 하는 기판부착방법.
  5. 제4항에 있어서, 표면흡착을 개시하기전의 기판간의 압력이 대기압이하인 것을 특징으로 하는 기판부착방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940003056A 1993-02-28 1994-02-21 기판부착방법 KR100298632B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP06298093A JP3321882B2 (ja) 1993-02-28 1993-02-28 基板はり合わせ方法
JP93-062980 1993-02-28

Publications (2)

Publication Number Publication Date
KR940020468A true KR940020468A (ko) 1994-09-16
KR100298632B1 KR100298632B1 (ko) 2001-11-30

Family

ID=13216022

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940003056A KR100298632B1 (ko) 1993-02-28 1994-02-21 기판부착방법

Country Status (3)

Country Link
US (1) US5769991A (ko)
JP (1) JP3321882B2 (ko)
KR (1) KR100298632B1 (ko)

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JP3720515B2 (ja) * 1997-03-13 2005-11-30 キヤノン株式会社 基板処理装置及びその方法並びに基板の製造方法
JPH1174164A (ja) 1997-08-27 1999-03-16 Canon Inc 基板処理装置、基板支持装置及び基板処理方法並びに基板の製造方法
US6106657A (en) * 1998-05-19 2000-08-22 First Light Technology, Inc. System and method for dispensing a resin between substrates of a bonded storage disk
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FR2935537B1 (fr) * 2008-08-28 2010-10-22 Soitec Silicon On Insulator Procede d'initiation d'adhesion moleculaire
FR2943177B1 (fr) 2009-03-12 2011-05-06 Soitec Silicon On Insulator Procede de fabrication d'une structure multicouche avec report de couche circuit
FR2947380B1 (fr) 2009-06-26 2012-12-14 Soitec Silicon Insulator Technologies Procede de collage par adhesion moleculaire.
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FR2963157B1 (fr) * 2010-07-22 2013-04-26 Soitec Silicon On Insulator Procede et appareil de collage par adhesion moleculaire de deux plaques
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Also Published As

Publication number Publication date
JPH06252015A (ja) 1994-09-09
US5769991A (en) 1998-06-23
KR100298632B1 (ko) 2001-11-30
JP3321882B2 (ja) 2002-09-09

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