KR940016853A - Manufacturing method of bottom gate thin film transistor - Google Patents

Manufacturing method of bottom gate thin film transistor Download PDF

Info

Publication number
KR940016853A
KR940016853A KR1019920027041A KR920027041A KR940016853A KR 940016853 A KR940016853 A KR 940016853A KR 1019920027041 A KR1019920027041 A KR 1019920027041A KR 920027041 A KR920027041 A KR 920027041A KR 940016853 A KR940016853 A KR 940016853A
Authority
KR
South Korea
Prior art keywords
thin film
film transistor
manufacturing
gate thin
bottom gate
Prior art date
Application number
KR1019920027041A
Other languages
Korean (ko)
Inventor
김승준
이동덕
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019920027041A priority Critical patent/KR940016853A/en
Publication of KR940016853A publication Critical patent/KR940016853A/en

Links

Landscapes

  • Thin Film Transistor (AREA)

Abstract

본 발명은 고집적반도체소자의 저부게이트 박막트랜지스터 제조방법에 관한 것으로, 게이트 전극 상부 모서리 부근에서 게이트 산화막 이 전기장에 파괴되는 것을 방지하기 위하여, 게이트 전극용 폴리실리콘층 패턴공정후 플라즈마를 이용한 블란켓 에치백공정으로 게이트 전극의 상부 모서리를 라운드시키는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for fabricating a low gate thin film transistor of a highly integrated semiconductor device. It is a technique of rounding the upper edge of the gate electrode by a tooth back process.

Description

저부게이트 박막트랜지스터 제조방법Manufacturing method of bottom gate thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 종래기술에 의해 저부게이트 박막트랜지스터를 제조한 단면도, 제 2 도는 본 발명에 의해 저부게이트 박막트랜지스터를 제조한 단면도.1 is a cross-sectional view of manufacturing a bottom gate thin film transistor according to the prior art, and FIG. 2 is a cross-sectional view of manufacturing a bottom gate thin film transistor according to the present invention.

Claims (1)

절연층 상부에 게이트 전극용 폴리실리콘층 패턴을 형성하고, 그 상부에 게이트 산화막과 소오스/드레인용 폴리실리콘층을 형성하여 저부게이트 박막트랜지스터를 제조하는 방법에 있어서, 게이트 전극 상부 모서리 부근에서 게이트 산화막이 전기장에 파괴되는 것을 방지하기 위하여, 게이트 전극용 폴리실리콘층 패턴공정후 플라즈마를 이용한 블란켓 에치백공정으로 게이트 전극의 상부 모서리를 라운드시키는 것을 특징으로 하는 저부게이트 박막트랜지스터 제조방법.A method of manufacturing a bottom gate thin film transistor by forming a polysilicon layer pattern for a gate electrode on an insulating layer and forming a gate oxide film and a polysilicon layer for a source / drain thereon, wherein the gate oxide film is formed near an upper edge of the gate electrode. A method of manufacturing a bottom gate thin film transistor, characterized in that the upper edge of the gate electrode is rounded by a blanket etch back process using plasma after the polysilicon layer pattern process for the gate electrode to prevent the electric field from being destroyed. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920027041A 1992-12-31 1992-12-31 Manufacturing method of bottom gate thin film transistor KR940016853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920027041A KR940016853A (en) 1992-12-31 1992-12-31 Manufacturing method of bottom gate thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920027041A KR940016853A (en) 1992-12-31 1992-12-31 Manufacturing method of bottom gate thin film transistor

Publications (1)

Publication Number Publication Date
KR940016853A true KR940016853A (en) 1994-07-25

Family

ID=67220033

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920027041A KR940016853A (en) 1992-12-31 1992-12-31 Manufacturing method of bottom gate thin film transistor

Country Status (1)

Country Link
KR (1) KR940016853A (en)

Similar Documents

Publication Publication Date Title
KR950021347A (en) Manufacturing Method of Semiconductor Device
KR960012564A (en) Thin film transistor and method of forming the same
KR850005163A (en) Manufacturing Method of Field Effect Transistor
KR960009075A (en) Thin film transistor and its manufacturing method
KR940016853A (en) Manufacturing method of bottom gate thin film transistor
KR920015641A (en) Method for manufacturing semiconductor device with field effect transistor
KR960035905A (en) Method for manufacturing thin film transistor with drain offset structure
KR940016920A (en) Manufacturing method of bottom gate thin film transistor
KR940016619A (en) Gate electrode formation method of semiconductor device
KR940010308A (en) Thin film transistor and method of manufacturing the same
KR950012645A (en) Method of manufacturing thin film transistor of semiconductor device
KR970054481A (en) Thin film transistor manufacturing method
KR940010387A (en) Semiconductor device manufacturing method
KR940003086A (en) Method of manufacturing thin film transistor of semiconductor device
KR970054509A (en) Method of manufacturing thin film transistor
KR960005895A (en) Most transistor manufacturing method
KR970052785A (en) Semiconductor device manufacturing method
KR980005881A (en) Method of manufacturing semiconductor device
KR950015658A (en) Semiconductor device manufacturing method
KR960019603A (en) Manufacturing Method of Thin Film Transistor
KR920010827A (en) Device isolation method of semiconductor device
KR970054512A (en) Method of manufacturing thin film transistor
KR960026973A (en) Method of manufacturing thin film transistor
KR970053030A (en) Field Effect Transistor Manufacturing Method
KR950009975A (en) Thin Film Transistor Manufacturing Method

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E601 Decision to refuse application