KR940016846A - SRAM cell manufacturing method with improved cell rate - Google Patents

SRAM cell manufacturing method with improved cell rate Download PDF

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Publication number
KR940016846A
KR940016846A KR1019920027333A KR920027333A KR940016846A KR 940016846 A KR940016846 A KR 940016846A KR 1019920027333 A KR1019920027333 A KR 1019920027333A KR 920027333 A KR920027333 A KR 920027333A KR 940016846 A KR940016846 A KR 940016846A
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KR
South Korea
Prior art keywords
film
oxide film
pad polysilicon
nitride film
manufacturing
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Application number
KR1019920027333A
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Korean (ko)
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KR100256227B1 (en
Inventor
장현수
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019920027333A priority Critical patent/KR100256227B1/en
Publication of KR940016846A publication Critical patent/KR940016846A/en
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Publication of KR100256227B1 publication Critical patent/KR100256227B1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Local Oxidation Of Silicon (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 기판(7) 상에 산화막(9), 패드 폴리실리콘막(10), 질화막(11)을 차례로 증착하는 제 1 단계, 상기 제 1 단계후에 예정된 크기의 소자분리 절연막을 형성하기 위하여 마스크 패턴하여 상기 질화막(11), 패드 폴리실리콘막(10), 산화막(9)을 차례로 선택 식각하고 불순물을 주입하여 필드 스톱 소자 불순물 주입부(8)을 형성한 다음에 산화공정을 진행하여 필드 산화막(13)을 형성하는 제 2 단계, 상기 제 2 단계후에 상기 질화막(11), 패드 폴리실리콘막(10)을 식각한 다음에 감광막(12) 증착하는 제 3 단계, 및 상기 제 3 단계 후에 상기 감광막(12)을 사용하여 새부리(bird's beak)쪽의 상기 필드산화막(13)을 선택 식각하는 제 4 단계를 포함하는 것을 특징으로 하는 셀비율이 향상된 에스램(SRAM) 셀 제조 방법에 관한 것이다.The present invention provides a first step of sequentially depositing an oxide film 9, a pad polysilicon film 10, and a nitride film 11 on a semiconductor substrate 7, to form a device isolation insulating film of a predetermined size after the first step. After mask patterning, the nitride film 11, the pad polysilicon film 10, and the oxide film 9 are selectively etched and implanted with impurities to form a field stop device impurity implantation part 8, and then an oxidation process is performed. After the second step of forming the oxide film 13, the third step of etching the nitride film 11, the pad polysilicon film 10 after the second step and then depositing the photosensitive film 12, and after the third step And a fourth step of selectively etching the field oxide layer 13 on the bird's beak side using the photosensitive layer 12. .

Description

셀비율이 향상된 에스램(SRAM) 셀 제조 방법SRAM cell manufacturing method with improved cell rate

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 3 도는 본 발명에 따른 SRAM 셀 평면도, 제 4 도는 제 3 도의 A-A'선을 따른 제조 공정도, 제 5 도는 본 발명의 SRAM 셀에 대한 작용 상태도.3 is a plan view of an SRAM cell according to the present invention, FIG. 4 is a manufacturing process diagram along the line A-A 'of FIG. 3, and FIG. 5 is an operational state diagram for the SRAM cell of the present invention.

Claims (2)

셀비율이 향상된 에스램(SRAM) 셀 제조 방법에 있어서, 반도체 기판(7) 상에 산화막(9), 패드 폴리실리콘막(10), 질화막(11)을 차례로 증착하는 제 1 단계, 상기 제 1 단계 후에 예정된 크기의 소자분리 절연막을 형성하기 위하여 마스크 패턴하여 상기 질화막(11), 패드 폴리실리콘막(10), 산화막(9)을 차례로 선택 식각하고 불순물을 주입하여 필드 스톱 소자 불순물 주입부(8)을 형성한 다음에 산화공정을 진행하여 필드산화막(13)을 형성하는 제 2 단계, 상기 제 2 단계 후에 상기 질화막(11), 패드 폴리실리콘막(10)을 식각한 다음에 감광막(12) 증착하는 제 3 단계, 상기 제 3 단계 후에 상기 감광막(12)을 사용하여 세부리(bird's beak)쪽의 상기 필드산화막(13)을 선택 식각하는 제 4 단계를 포함하는 것을 특징으로 하는 셀비율이 향상된 에스램(SRAM) 셀 제조 방법.In the method of manufacturing an SRAM cell having an improved cell ratio, a first step of sequentially depositing an oxide film 9, a pad polysilicon film 10, and a nitride film 11 on a semiconductor substrate 7 is performed. After the step, in order to form a device isolation insulating film having a predetermined size, a mask pattern is formed to selectively etch the nitride film 11, the pad polysilicon film 10, and the oxide film 9, and then implant impurities to inject the field stop device impurity implantation portion 8. ) And then the oxidation process is performed to form the field oxide film 13, and after the second step, the nitride film 11 and the pad polysilicon film 10 are etched and then the photosensitive film 12 And a fourth step of selectively etching the field oxide film 13 on the bird's beak side using the photosensitive film 12 after the third step of deposition. Improved SRAM Cell Manufacturing Method. 제 1 항에 있어서, 상기 제 4 단계에서 식각되어지는 필스산화막(13)은 드라이브 트랜지스터(T3, T4)에 형성되어지는 것을 특징으로 하는 셀비율이 향상된 에스램(SRAM) 셀 제조 방법.2. The method of claim 1, wherein the fill oxide film (13) to be etched in the fourth step is formed in the drive transistors (T3, T4). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920027333A 1992-12-31 1992-12-31 Method of fabricating sram cell with improved cell ratio KR100256227B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920027333A KR100256227B1 (en) 1992-12-31 1992-12-31 Method of fabricating sram cell with improved cell ratio

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920027333A KR100256227B1 (en) 1992-12-31 1992-12-31 Method of fabricating sram cell with improved cell ratio

Publications (2)

Publication Number Publication Date
KR940016846A true KR940016846A (en) 1994-07-25
KR100256227B1 KR100256227B1 (en) 2000-05-15

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Application Number Title Priority Date Filing Date
KR1019920027333A KR100256227B1 (en) 1992-12-31 1992-12-31 Method of fabricating sram cell with improved cell ratio

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KR100256227B1 (en) 2000-05-15

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