KR940008013A - Method of forming gate insulating film of semiconductor device - Google Patents

Method of forming gate insulating film of semiconductor device Download PDF

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Publication number
KR940008013A
KR940008013A KR1019920017190A KR920017190A KR940008013A KR 940008013 A KR940008013 A KR 940008013A KR 1019920017190 A KR1019920017190 A KR 1019920017190A KR 920017190 A KR920017190 A KR 920017190A KR 940008013 A KR940008013 A KR 940008013A
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KR
South Korea
Prior art keywords
insulating film
gate insulating
semiconductor device
forming
gas
Prior art date
Application number
KR1019920017190A
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Korean (ko)
Other versions
KR950009937B1 (en
Inventor
이병훈
박진성
이우성
정동진
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920017190A priority Critical patent/KR950009937B1/en
Publication of KR940008013A publication Critical patent/KR940008013A/en
Application granted granted Critical
Publication of KR950009937B1 publication Critical patent/KR950009937B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 MOS 소자의 게이트절연막 형성방법에 관한 것으로, 반도체소자의 게이트 절연막을 형성하는 방법에 있어서, N2O가스와 상기 N2O가스유량의 1~3%에 해당하는 소량의 성장촉매가스를 함께 흘려주어 로내에서 산화막을 성장시키는 것을 특징으로 하는 반도체소자의 게이트절연막 형성방법을 제공한다.The present invention relates to a method of forming a gate insulating film of a MOS device, the method of forming a gate insulating film of a semiconductor device, a small amount of growth catalyst gas corresponding to 1 to 3% of the N 2 O gas and the N 2 O gas flow rate The present invention provides a method of forming a gate insulating film of a semiconductor device, characterized in that the oxide film is grown in a furnace by flowing together.

본 발명에 의하면, 단시간내에 신뢰성 높은 고품질의 게이트산화막의 제조가 가능하게 된다.According to the present invention, a highly reliable high quality gate oxide film can be produced in a short time.

Description

반도체소자의 게이트절연막 형성방법Method of forming gate insulating film of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 실시예에 의한 게이트산화막의 형성공정과정을 나타낸 것이다.2 shows a process of forming a gate oxide film according to an embodiment of the present invention.

Claims (2)

반도체소자의 게이트절연막을 형성하는 방법에 있어서, N20가스와 상기 N2O가스유량의 1~3%에 해당하는 소량의 성장촉매가스를 함께 흘려주어 로내에서 산화막을 성장시키는 것을 특징으로 하는 반도체소자의 게이트절연막 형성방법.A method of forming a gate insulating film of a semiconductor device, N 2 0 given gas and the N 2 O with a small amount of a growth catalyst gas corresponding to 1-3% of the gas flow flowing along, comprising a step of growing an oxide layer from the furnace A method of forming a gate insulating film of a semiconductor device. 제1항에 있어서, 상기 성자촉매가스로 O2, O2와 H2의 혼합가스 또는 H2O를 사용하는 것을 특징으로 하는 반도체소자의 게이트절연막 형성방법.The method of claim 1, wherein a mixed gas of O 2 , O 2 and H 2 , or H 2 O is used as the saint catalyst gas. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920017190A 1992-09-21 1992-09-21 Gate insulate film forming method of semiconductor device KR950009937B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920017190A KR950009937B1 (en) 1992-09-21 1992-09-21 Gate insulate film forming method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920017190A KR950009937B1 (en) 1992-09-21 1992-09-21 Gate insulate film forming method of semiconductor device

Publications (2)

Publication Number Publication Date
KR940008013A true KR940008013A (en) 1994-04-28
KR950009937B1 KR950009937B1 (en) 1995-09-01

Family

ID=19339873

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920017190A KR950009937B1 (en) 1992-09-21 1992-09-21 Gate insulate film forming method of semiconductor device

Country Status (1)

Country Link
KR (1) KR950009937B1 (en)

Also Published As

Publication number Publication date
KR950009937B1 (en) 1995-09-01

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