KR970052828A - Low dielectric constant thin film manufacturing method using SF_6 gas - Google Patents

Low dielectric constant thin film manufacturing method using SF_6 gas Download PDF

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Publication number
KR970052828A
KR970052828A KR1019950053654A KR19950053654A KR970052828A KR 970052828 A KR970052828 A KR 970052828A KR 1019950053654 A KR1019950053654 A KR 1019950053654A KR 19950053654 A KR19950053654 A KR 19950053654A KR 970052828 A KR970052828 A KR 970052828A
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KR
South Korea
Prior art keywords
gas
thin film
dielectric constant
low dielectric
constant thin
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Application number
KR1019950053654A
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Korean (ko)
Other versions
KR0160916B1 (en
Inventor
유병곤
장원익
강승열
김광호
백종태
Original Assignee
양승택
한국전자통신연구원
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 양승택, 한국전자통신연구원 filed Critical 양승택
Priority to KR1019950053654A priority Critical patent/KR0160916B1/en
Priority to JP8251706A priority patent/JPH09181073A/en
Publication of KR970052828A publication Critical patent/KR970052828A/en
Application granted granted Critical
Publication of KR0160916B1 publication Critical patent/KR0160916B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76837Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 저유전율 박막 제조방법에 관한것으로, 불소계 원료개스를 사용하여 저유전율을 갖는 SiOF 저유전율 박막을 제조하는 방법에 관한 것이다. 상기 본 발명은 RPCVD 장치의 반응로에 반도체기판을 실장하고 불소의 원료개스로서 SF6+ N2O 혼합 개스 또는 SF6+ O2혼합 개스를 주입하고 산화 실리콘(SiO)의 원료개스 로서 SiH2개스 또는 TEOS(OC2H5)4를 주입하여 반도체기판상에 SiOF 저유전율 박막을 형성함을 특징으로 한다.The present invention relates to a method of manufacturing a low dielectric constant thin film, and a method of manufacturing a SiOF low dielectric constant thin film having a low dielectric constant using a fluorine-based raw material gas. According to the present invention, a semiconductor substrate is mounted in a reactor of an RPCVD apparatus, and SF 6 + N 2 O mixed gas or SF 6 + O 2 mixed gas is injected as a fluorine raw material gas, and SiH 2 is used as a raw material gas of silicon oxide (SiO). Gas or TEOS (OC 2 H 5 ) 4 is injected to form a SiOF low dielectric constant thin film on a semiconductor substrate.

Description

SF6개스를 사용한 저유전율 박막 제조방법Low dielectric constant thin film manufacturing method using SF6 gas

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 저유전율 박막제조에 사용된 RPCVD장치의 개략도.1 is a schematic diagram of an RPCVD apparatus used for manufacturing a low dielectric constant thin film.

Claims (3)

RPCVD 장치의 반응로에 반도체기판을 실장하고 불소의 원료개스로서 SF6개스를 주입하는 동시에 산화 실리콘(SiO) 의 원료개스로서 SiH2개스 또는 TEOS(OC2H5)4를 주입 하여 SiOF 박막을 제조하는 것을 특징으로 하는 저유전율 박막의 제조방법.The SiOF thin film was formed by mounting a semiconductor substrate in a reactor of an RPCVD apparatus and injecting SF 6 gas as a fluorine source gas and SiH 2 gas or TEOS (OC 2 H 5 ) 4 as a silicon oxide (SiO) source gas. Method for producing a low dielectric constant thin film, characterized in that the manufacturing. 제1항에 있어서, 상기 불소개스는 N2O 또는 O2를 사용하여 희석시킨 상태로 반응로에 주입하는 것을 특징으로 하는 저유전율 박막 제조방법.The method of claim 1, wherein the fluorine gas is injected into the reactor in a diluted state using N 2 O or O 2 . 제1항에 있어서, 상기 반응로에 주입되는 SF6개스의 유량을 30sc㎝ 으로 한 것을 특징으로 하는 저유전율 박막 제조방법.The low dielectric constant thin film manufacturing method according to claim 1, wherein the flow rate of SF 6 gas injected into the reactor is 30 sccm. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950053654A 1995-12-21 1995-12-21 Method of manufacturing low dielectric late thin using sf6 gas KR0160916B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950053654A KR0160916B1 (en) 1995-12-21 1995-12-21 Method of manufacturing low dielectric late thin using sf6 gas
JP8251706A JPH09181073A (en) 1995-12-21 1996-09-24 Formation of low-permittivity thin film using sf6 gas

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950053654A KR0160916B1 (en) 1995-12-21 1995-12-21 Method of manufacturing low dielectric late thin using sf6 gas

Publications (2)

Publication Number Publication Date
KR970052828A true KR970052828A (en) 1997-07-29
KR0160916B1 KR0160916B1 (en) 1999-02-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950053654A KR0160916B1 (en) 1995-12-21 1995-12-21 Method of manufacturing low dielectric late thin using sf6 gas

Country Status (2)

Country Link
JP (1) JPH09181073A (en)
KR (1) KR0160916B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030037092A (en) * 2001-11-02 2003-05-12 주성엔지니어링(주) semiconductor manufacturing apparatus
WO2011063552A1 (en) * 2009-11-27 2011-06-03 C Sun Mfg, Ltd. Method for forming via interconnects for 3-d wafer/chip stacking
KR102096379B1 (en) 2018-08-28 2020-04-03 주식회사 디에스시동탄 Lumbar support assembly

Also Published As

Publication number Publication date
JPH09181073A (en) 1997-07-11
KR0160916B1 (en) 1999-02-01

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