KR930024521A

KR930024521A - How to Access Peripherals in the Electronic Exchange

Info

Publication number: KR930024521A
Application number: KR1019920008428A
Authority: KR
Inventors: 조찬순
Original assignee: 정장호; 금성정보통신 주식회사
Filing date: 1992-05-19
Publication date: 1993-12-22

Abstract

본 발명은 전자교환기에서 프로세서와 TD-버스를 통하여 인터페이스한 주변기기로의 액세스 방법에 관한 것으로, 주변기기가 전자교환기 프로세서측에서 상당히 먼 거리를 두고 접속되어 있는 경우 주변장치측에서 프로세서로 전송하는 준비신호가 지연되어 클럭의 소정주기내에 도달하지 못하게 되어 프로세서에서 전송하는 데이타중 우선 순위의 데이타를 몇 비트씩 수신하지 못하여 전자교환기 시스템이 오동작할 우려가 있었다.이에 본 발명에서는 CPU에서 발생하는 데이타를 저장하고 직렬변환하는 시프트 레지스터와, 수신기 사이에 쓰기신호 발생부를 구비하여 주변장치로 부터의 준비신호(RDY)가 수신기로 입력되면 쓰기신호발생부에서는 준비신호파형과 동일한 형태의 쓰기신호를 발생한다. 이 쓰기신호와 함께 시프트레지스터에서 직렬변환된 데이타(TXD)를 송신기를 통하여 액세스하고자 하는 주변장치로 송신함으로써, 주변장치에서는 프로세서에서 전송하는 데이타를 빠뜨림이 없이 수신하여 프로세서의 신뢰성을 향상시키고 전자교환기시스템의 오동작 가능성을 배제하였다.The present invention relates to a method for accessing a peripheral device interfaced with a processor through a TD-bus in an electronic exchange device. When the peripheral device is connected at a considerable distance from the electronic exchange processor side, a ready signal for transmission from the peripheral device side to the processor is provided. Delay could not be reached within a predetermined period of the clock, so that the electronic exchange system could malfunction because it could not receive the data of priority among the data transmitted from the processor by a few bits. Therefore, in the present invention, the data generated by the CPU is stored. And a write signal generator between the receiver and the serial converter and the serial converter. Occurs. By sending the data (TXD) serialized in the shift register to the peripheral device to be accessed through the transmitter together with the write signal, the peripheral device receives the data transmitted from the processor without missing out, improving the reliability of the processor and The possibility of malfunction of the exchange system is excluded.

Description

How to Access Peripherals in the Electronic Exchange

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 4도는 제3도에 따른 TD-버스를 통한 액세스 타이밍도.4 is an access timing diagram via the TD-bus according to FIG.

Claims

In the peripheral device access method of the electronic switch, a write signal generator (29) is provided between the receiver (22) on the processor side and the sypresistor (21) to transmit data to the peripheral device from the processor side. Ready signal generated Receives the synchronization signal Similar write signal Is generated and transmitted to the peripheral device through the transmitter 18 and the TD bus together with the serially converted data (TXD) in the prepresistor 21, and the peripheral device when receiving data from the peripheral device at the processor side. Ready signal in synchronization with the feedback clock RCVCLK And when the data is transmitted, the processor synchronously receives the data in synchronization with the fed back clock (RCVCLK) to prevent the malfunction of the electronic switching system by receiving the transmitted data without loss.

※ Note: The disclosure is based on the initial application.