KR930017313A - Parallel Parity Generation and Detection Circuit and Method - Google Patents

Parallel Parity Generation and Detection Circuit and Method Download PDF

Info

Publication number
KR930017313A
KR930017313A KR1019920000093A KR920000093A KR930017313A KR 930017313 A KR930017313 A KR 930017313A KR 1019920000093 A KR1019920000093 A KR 1019920000093A KR 920000093 A KR920000093 A KR 920000093A KR 930017313 A KR930017313 A KR 930017313A
Authority
KR
South Korea
Prior art keywords
parity
data
signal
parity generation
detection circuit
Prior art date
Application number
KR1019920000093A
Other languages
Korean (ko)
Inventor
이희윤
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019920000093A priority Critical patent/KR930017313A/en
Publication of KR930017313A publication Critical patent/KR930017313A/en

Links

Landscapes

  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

데이타 전송 장치에 병렬 패리티 발생 및 검출방식에 있어서, 상기 전송 데이타를 다중화하여 입력하고, 상기 다중화 입력된 데이타를 각각 3분주하며, 상기 각 3분주된 값으로 부터 패리티를 발생하고, 상기 패리티 발생값으로 부터 패리티 비트를 검출하도록 되어 있다.In a parallel parity generation and detection method in a data transmission apparatus, the transmission data are multiplexed and inputted, the multiplexed input data is divided three times, and parity is generated from each of the three divided values, and the parity generation value is generated. Parity bits are detected from.

Description

병렬 패리티 발생 및 검출회로 및 방식Parallel Parity Generation and Detection Circuit and Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 회로도.2 is a circuit diagram according to the present invention.

Claims (2)

데이타 전송 장치에 병렬 패리티 발생 및 검출방식에 있어서, 상기 전송 데이타를 다중화하여 입력하고, 상기 다중화 입력된 데이타를 각각 3분주하며, 상기 각 3분주된 값으로 부터 패리티를 발생하고, 상기 패리티 발생 값으로 부터 패리티 비트를 검출함을 특징으로 하는 병렬 패리티 발생 검출방식.In a parallel parity generation and detection method in a data transmission apparatus, multiplexing and transmitting the transmitted data, dividing the multiplexed input data by three, generating parity from each of the three divided values, and generating the parity value Parity generation detection method, characterized in that for detecting the parity bit from. 데이타 전송장치의 병렬 패리티 발생 및 검출회로에 있어서, 상기 데이타를 오우버 헤드 비트신호 및 클럭과 같이 다중화하여 입력하는 제1 수단과, 상기 제1 수단을 통한 신호를 각각 3분주하여 각 데이타의 패리티를 발생하는 제2 수단과, 결정신호에 따라 인에이블되고 전송 패리티 신호와 상기 제2 수단의 패리티 값에 따라 패리티를 검출하는 제3 수단으로 구성됨을 특징으로 하는 병렬 패리티 발생 검출회로.A parallel parity generation and detection circuit of a data transmission apparatus, comprising: first means for multiplexing and inputting said data, such as an over head bit signal and a clock, and parity of each data by dividing a signal through said first means into three portions, respectively; And second means for generating a signal; and third means for enabling parity according to a determination signal and detecting parity according to a transmission parity signal and a parity value of the second means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920000093A 1992-01-07 1992-01-07 Parallel Parity Generation and Detection Circuit and Method KR930017313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920000093A KR930017313A (en) 1992-01-07 1992-01-07 Parallel Parity Generation and Detection Circuit and Method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920000093A KR930017313A (en) 1992-01-07 1992-01-07 Parallel Parity Generation and Detection Circuit and Method

Publications (1)

Publication Number Publication Date
KR930017313A true KR930017313A (en) 1993-08-30

Family

ID=65515445

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920000093A KR930017313A (en) 1992-01-07 1992-01-07 Parallel Parity Generation and Detection Circuit and Method

Country Status (1)

Country Link
KR (1) KR930017313A (en)

Similar Documents

Publication Publication Date Title
KR900005281A (en) Data word series transmitter and receiver
KR930017313A (en) Parallel Parity Generation and Detection Circuit and Method
KR970017477A (en) Stereo digital audio coding device
JPS5550799A (en) Band zone separately synchronizing alignment system
KR960002018A (en) Data processing device
KR920017394A (en) Synchronous Payload Mapper for TUG21 Serial Interface
KR940003251A (en) Incorrect wiring prevention circuit
KR900005301A (en) Synchronous Serial / Parallel Data Conversion Circuit
KR950033810A (en) Partial Product Row Generation Circuit in Modified Booth Multiplier
KR950033809A (en) Partial Product Row Generation Circuit in Modified Booth Multiplier
KR910010322A (en) Security Module Circuit Using RSA Algorithm
TW353253B (en) Method for the generation of an output clock signal, which can be used for controlling a data output as a function of one of a plurality of input clock signals
KR890011160A (en) Power Control System of Unmanned Relay System
KR950015102A (en) Serial I / O Interface Circuit
KR960706243A (en) Multiplexing and Demultiplexing Units (MULTIPLEXING / DEMULTIPLEXING UNIT)
KR960001978A (en) Barrel shifter circuit
JPS55123723A (en) Chinese character input device
KR870010706A (en) Service Information Transmission Method in Transmission by CMI Code
KR910012908A (en) Operation processing controller
KR910013752A (en) NRZ / CMI (II) Code Inverter
KR940012139A (en) Bus relay circuit of long distance interface device
KR890016795A (en) Data Detection Circuit of Digital Transmission System
KR940017476A (en) Line Delay Compensation Circuit of Digital Transmission System
KR940017371A (en) Data transmission and reception method and device using infrared ray
KR950022340A (en) Data multiplexer

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
AMND Amendment
E601 Decision to refuse application
J2X1 Appeal (before the patent court)

Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL