KR930015065A - Manufacturing Method of Semiconductor Device - Google Patents

Abstract

No content

Description

Manufacturing Method of Semiconductor Device

As this is a public information case, the full text was not included.

1A to 1G are cross-sectional views illustrating a conventional method for forming a self aligned gate (SAG) according to a process sequence.

2A to 2F are cross-sectional views showing the SAG forming method according to the present invention in the order of process.

Claims (12)

A method of forming a polyside gate electrode, comprising: sequentially forming a gate oxide film, a polysilicon layer, a thin oxide film, and a nitride film on a semiconductor substrate and patterning the gate oxide pattern; Depositing and etching back a thin nitride film and a spacer oxide film over the entire surface of the resultant to form a spacer on the side of the gate electrode, and performing a gate polysilicon oxidation followed by ion implantation to form a source / drain region; Removing the thin oxide film and the nitride film on the polysilicon layer; Depositing a high melting point metal on the entire surface of the resultant; And forming the high melting point metal silicide only in the polysilicon layer by a heat treatment process and a selective etching method. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the thin oxide film formed between the polysilicon layer and the nitride film is 80 kPa to 120 kPa. The method of manufacturing a semiconductor device according to claim 1, wherein the nitride film has a thickness of 100 kPa to 500 kPa. 2. The method of claim 1, further comprising oxidizing gate polysilicon after the gate electrode patterning process and implanting impurities to form n ^- source / drain regions. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the thin nitride film between the spacer and the gate is 100 kPa or less. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the oxide film on the source / drain region formed by the gate polysilicon oxidation is 400 kPa to 600 kPa. The method of manufacturing a semiconductor device according to claim 1, wherein the removal of the nitride film on the polysilicon layer is stripped with a phosphoric acid solution. The method of manufacturing a semiconductor device according to claim 1, wherein the thin oxide film on the polysilicon layer is removed by diluted HF. The method of claim 1, wherein the high melting point metal is Ti. The method of manufacturing a semiconductor device according to claim 1, wherein the deposition thickness of Ti is 500 kPa to 700 kPa. The method of claim 1, wherein the heat treatment process for forming the silicide is performed for 20 seconds to 40 seconds in an N ₂ atmosphere at a temperature of 630 ° C to 675 ° C and 20 seconds to 40 ° C in an N ₂ atmosphere at 750 ° C to 950 ° C. 6. A method for manufacturing a semiconductor device, comprising six seconds of secondary annealing. The method of claim 1, wherein the selective etching method comprises using an etching solution of H ₂ SO ₄ + H ₂ O ₂ . ※ Note: The disclosure is based on the initial application.