KR930008614A - Communication system using dual port ram - Google Patents

Communication system using dual port ram Download PDF

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Publication number
KR930008614A
KR930008614A KR1019910018222A KR910018222A KR930008614A KR 930008614 A KR930008614 A KR 930008614A KR 1019910018222 A KR1019910018222 A KR 1019910018222A KR 910018222 A KR910018222 A KR 910018222A KR 930008614 A KR930008614 A KR 930008614A
Authority
KR
South Korea
Prior art keywords
dual port
port ram
output
decoder
communication system
Prior art date
Application number
KR1019910018222A
Other languages
Korean (ko)
Inventor
조문형
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019910018222A priority Critical patent/KR930008614A/en
Publication of KR930008614A publication Critical patent/KR930008614A/en

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  • Information Transfer Systems (AREA)

Abstract

본 발명은 듀얼포트램을 이용하여 서로다른 두 프로세서 사이에 데이타를 교환 및 통신할수 있도록 한 듀얼포트램을 이용한 통신시스템에 관한 것이다.The present invention relates to a communication system using a dual port RAM to exchange and communicate data between two different processors using the dual port RAM.

상기와 같은 본 발명은 듀얼포트램의 내부에 메모리와 액세스 상태를 나타내는 세모터(Semaphore)레지스터로 구성하여 내부레지스터값이 "1"이면 어느 프로세서라도 메모리 액세그 가능하며 "0" 이면 어느 하나의 프로세서가 엑세스하고 있는 상태를 나타내므로 레지스티값이 "1" 이 될때까지 기다리게 하여 두개의 프로세서가 충돌없이 액세스할수 있도록 하여 프로세서 사이의 데이타를 상호 교환 및 통신할수 있도록 한 효과가 있다.As described above, the present invention is composed of a semaphore register indicating a memory and an access state in the dual port RAM, so that any processor can access the memory if the internal register value is "1", and if any one is "0", Since it represents the state that the processor is accessing, it has the effect of waiting for the register value to be "1" so that the two processors can access without conflict and exchange data with each other.

Description

튜얼포트램을 이용한 통신시스템Communication system using dual port ram

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

첨부된 도면은 본 발명 듀얼포트램을 이용한 통신시스템의 구성도이다.The accompanying drawings are a block diagram of a communication system using the dual port RAM of the present invention.

Claims (1)

호스트콤퓨터(100) 및 타겟 마이크프로세서(200)로부터 출력되는 신호 및 어드레스를 디코딩하는 디코더(101)(201)와, 상기 디코더(101)의 출력신호를 앤드조합하여 듀얼포트램(300)에 출력하는 앤드케이트(102)(103)와, 상기 호스트콤퓨터(100)로부터 출력되는 데이타를 래치하는 래치부(104)와, 상기 래치부(104)의 출력데이타와 호스트콤퓨터(100)로부터 출력하는 어드레스를 비교하여 디코더(101)에 출력하는 비교부(105)와, 상기 디코더(201)의 출력신호를 오아링 및 인버팅하여 듀얼포트램(300)에 출력하는 오아게이트(202)(203) 및 인버터(204)를 포함하여 구성함을 특징으로 하는 튜얼포트램을 이용한 통신시스템.The decoder 101 and 201 for decoding the signal and the address output from the host computer 100 and the target microphone processor 200 and the output signal of the decoder 101 are combined and output to the dual port RAM 300. And the address 102 and 103, a latch unit 104 for latching data output from the host computer 100, output data of the latch unit 104, and an address output from the host computer 100. The comparison unit 105 for comparing and outputting the decoder 101 to the decoder 101, the oragate 202 (203) for outputting the output signal of the decoder 201 to the dual port RAM 300 and Communication system using a dual port ram characterized in that it comprises an inverter (204). ※ 참고사항 : 최초출윈 내용에 의하여 공개하는 것임.※ Note: It is to be disclosed based on the contents of the initial launch.
KR1019910018222A 1991-10-16 1991-10-16 Communication system using dual port ram KR930008614A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910018222A KR930008614A (en) 1991-10-16 1991-10-16 Communication system using dual port ram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910018222A KR930008614A (en) 1991-10-16 1991-10-16 Communication system using dual port ram

Publications (1)

Publication Number Publication Date
KR930008614A true KR930008614A (en) 1993-05-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910018222A KR930008614A (en) 1991-10-16 1991-10-16 Communication system using dual port ram

Country Status (1)

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KR (1) KR930008614A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100344217B1 (en) * 2000-07-04 2002-07-20 주식회사 케이이씨메카트로닉스 Commnication interface circuit using dual port memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100344217B1 (en) * 2000-07-04 2002-07-20 주식회사 케이이씨메카트로닉스 Commnication interface circuit using dual port memory

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