KR930005158A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR930005158A
KR930005158A KR1019910014810A KR910014810A KR930005158A KR 930005158 A KR930005158 A KR 930005158A KR 1019910014810 A KR1019910014810 A KR 1019910014810A KR 910014810 A KR910014810 A KR 910014810A KR 930005158 A KR930005158 A KR 930005158A
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South Korea
Prior art keywords
oxide film
trench
manufacturing
semiconductor device
lpcvd
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KR1019910014810A
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Korean (ko)
Inventor
김윤기
김병열
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김광호
삼성전자 주식회사
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Priority to KR1019910014810A priority Critical patent/KR930005158A/en
Publication of KR930005158A publication Critical patent/KR930005158A/en

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Abstract

내용 없음.No content.

Description

반도체 장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2D도는 본 발명에 의한 소자분리방법을 도시한 공정단면도.2A to 2D are process cross-sectional views showing a device isolation method according to the present invention.

Claims (10)

반도체기판 상의 전면에 LPCVD산화막을 형성시키는 공정, 계속해서 감광막을 도포하여 사진석판기술로 트랜치영역을 패터닝한 다음, 상기 트랜치영역의 LPCVD산화막을 건식식각법으로 제거시키는 공정, 상기 감광막 제거후, 상기 LPCVD산화막을 마스크로 하여 반도체기판 내에 트랜치를 형성시키는 공정, 상기 트랜치에 데미지 큐어산화막을 형성시키는 공정, 계속해서 상기 공정후 표면 전면에 불순물이 도핑(Doping)된 다결정실리콘을 침적시킨 후 상기 다결정실리콘층 전면을 이방성식식각하여 트랜치 측벽에 스페이서를 형성시키는 공정, 상기 다결정실리콘 스페이서를 희석산화(Dilution Oxidation)하여 희석산화막이 형성됨과 동시에 체적 팽창시킴으로써 트랜치를 채우는 공정을 구비하여서 이루어지는 것을 특징으로 하는 반도체장치의 소자분리방법.Forming an LPCVD oxide film on the entire surface of the semiconductor substrate, and subsequently applying a photoresist to pattern the trench region by photolithography, and then removing the LPCVD oxide film in the trench region by dry etching; after removing the photoresist, Forming a trench in a semiconductor substrate using an LPCVD oxide film as a mask; forming a damage cure oxide film in the trench; and subsequently depositing a polysilicon doped with impurities on the entire surface of the trench after the process; Forming a spacer on the trench sidewall by anisotropically etching the entire surface of the layer, and diluting and oxidizing the polysilicon spacer to form a dilute oxide film and simultaneously filling the trench by volume expansion. Device isolation method of device. 제1항에 있어서, 상기 트랜치 버퍼층인 LPCVD산화막을 1,000Å정도 이상으로 형성시키는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein an LPCVD oxide film serving as the trench buffer layer is formed at about 1,000 GPa or more. 제2항에 있어서, 상기 LPCVD산화막은 트랜치 식각시, 식가마스크로 사용되어지는 것을 특징으로 하는 반도체 장치의 제조방법.The method of claim 2, wherein the LPCVD oxide layer is used as a food mask during trench etching. 제2항에 있어서, 상기 LPCVD산화막은 트랜치 식각시, 동시에 1,000Å정도가 식각되어 활성영역위에 대략 500Å정도의 상기 LPCVD산화막이 잔존하게 되는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 2, wherein the LPCVD oxide film is etched at the same time as the trench is etched so that approximately 500 GPa of the LPCVD oxide film remains on the active region. 제1항에 있어서, 상기 다결정실리콘에 도핑된 도스의 농도가 1.0×1021-3정도인 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the concentration of the dose doped into the polysilicon is about 1.0 x 10 21 cm -3 . 제1항에 있어서, 상기 고농도로 도핑된 다결정실리콘 1,000Å정도 이상의 두께로 침적시키는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein said highly doped polysilicon is deposited to a thickness of about 1,000 GPa or more. 제1항에 있어서, 상기 희석산화는 로(Furnace)의 분리기가 질소(N2), 수소, 그리고 산(O2)분압이 0.5기압이하이며 고온에서 행하는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the dilution oxidation is performed by a furnace separator at a high temperature with a nitrogen (N 2 ), hydrogen, and acid (O 2 ) partial pressure of 0.5 atm or less. 제1항에 있어서, 상기 희석산화막은 다결정실리콘 자체의 회석산화 성장속도와 인도핑에 의한 희석산화성장 속도가 합해져서 형성되는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the diluting oxide film is formed by adding up the gray oxide growth rate of polycrystalline silicon itself and the diluting oxidation growth rate by guided. 제8항에 있어서, 상기 회석산화막의 산화성장속도는 패드산화막의 산화성장속도에 비해 5배이싱 큰 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 8, wherein the oxidative growth rate of the gray oxide film is five times larger than the oxidative growth rate of the pad oxide film. 제1항에 있어서, 상기 고농도 도핑된 다결정실리콘 스페이서의 희석산화시, 자체의 체적 팽창계수가 2배로 증가되는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein upon dilution oxidation of the heavily doped polysilicon spacer, its volume expansion coefficient is doubled. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910014810A 1991-08-26 1991-08-26 Manufacturing Method of Semiconductor Device KR930005158A (en)

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KR1019910014810A KR930005158A (en) 1991-08-26 1991-08-26 Manufacturing Method of Semiconductor Device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020051351A (en) * 2000-12-22 2002-06-29 박종섭 Method for isolating semiconductor devices
KR100967672B1 (en) * 2003-06-10 2010-07-08 매그나칩 반도체 유한회사 The method for forming shall trench isolation in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020051351A (en) * 2000-12-22 2002-06-29 박종섭 Method for isolating semiconductor devices
KR100967672B1 (en) * 2003-06-10 2010-07-08 매그나칩 반도체 유한회사 The method for forming shall trench isolation in semiconductor device

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