KR920020738A - Manufacturing method of CMOS - Google Patents

Manufacturing method of CMOS Download PDF

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Publication number
KR920020738A
KR920020738A KR1019910005775A KR910005775A KR920020738A KR 920020738 A KR920020738 A KR 920020738A KR 1019910005775 A KR1019910005775 A KR 1019910005775A KR 910005775 A KR910005775 A KR 910005775A KR 920020738 A KR920020738 A KR 920020738A
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KR
South Korea
Prior art keywords
forming
pmos
oxide film
cmos
source
Prior art date
Application number
KR1019910005775A
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Korean (ko)
Inventor
송한정
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910005775A priority Critical patent/KR920020738A/en
Publication of KR920020738A publication Critical patent/KR920020738A/en

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Abstract

내용 없음No content

Description

씨모스의 제조방법Manufacturing method of CMOS

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 씨모스의 공정 단면도.2 is a cross-sectional view of the present invention CMOS.

Claims (1)

피모스와 앤모스를 가진 씨모스 제조방법에 있어서, P형 기판(1)에 앤웰(2)과 게이트(4)를 형성하는 공정과, 액티브 영역에 스팀산화막(5)을 형성하고 피모스의 소오스 및 드레인 영역의 스팀산화막(5)을 제거하는 공정과, 상기 전표면에 보론이 도핑된 산화막(6)을 형성하고 에치하여 측벽을 형성하는 공정과, 어닐링하여 피모스의 측벽의 보론이 채널과 소오스 및 드레인 영역 사이에 확산되게 하는 공정과, 상기 피모스의 소오스 및 드레인영역에서 플라티늄(8)이 형성되게 하는 공정과, LTO+BPSG(9)를 형성하고 패터닝하여 콘텍을 형성한 후 메탈(10)을 형성하는 공정을 차례로 실시하여서 이루어짐을 특징으로 하는 씨모스의 제조방법.In the CMOS manufacturing method having PMOS and ANMOS, a process of forming an well 2 and a gate 4 in a P-type substrate 1, forming a steam oxide film 5 in an active region, and forming a PMOS source And removing the steam oxide film 5 in the drain region, forming and etching the oxide film 6 doped with boron on the entire surface thereof, and forming a sidewall by annealing the boron on the sidewall of the PMOS channel. Spreading between the source and drain regions; forming platinum in the source and drain regions of the PMOS; forming and patterning LTO + BPSG (9) to form a contact and then 10) A method for producing a CMOS, characterized in that it is carried out by sequentially performing the step of forming. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910005775A 1991-04-11 1991-04-11 Manufacturing method of CMOS KR920020738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910005775A KR920020738A (en) 1991-04-11 1991-04-11 Manufacturing method of CMOS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910005775A KR920020738A (en) 1991-04-11 1991-04-11 Manufacturing method of CMOS

Publications (1)

Publication Number Publication Date
KR920020738A true KR920020738A (en) 1992-11-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910005775A KR920020738A (en) 1991-04-11 1991-04-11 Manufacturing method of CMOS

Country Status (1)

Country Link
KR (1) KR920020738A (en)

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