KR920017171A - Method of forming buried layer of bipolar transistor - Google Patents

Method of forming buried layer of bipolar transistor Download PDF

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Publication number
KR920017171A
KR920017171A KR1019910002387A KR910002387A KR920017171A KR 920017171 A KR920017171 A KR 920017171A KR 1019910002387 A KR1019910002387 A KR 1019910002387A KR 910002387 A KR910002387 A KR 910002387A KR 920017171 A KR920017171 A KR 920017171A
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KR
South Korea
Prior art keywords
buried layer
bipolar transistor
low temperature
forming buried
oxide film
Prior art date
Application number
KR1019910002387A
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Korean (ko)
Inventor
박양수
Original Assignee
문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910002387A priority Critical patent/KR920017171A/en
Publication of KR920017171A publication Critical patent/KR920017171A/en

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Abstract

내용 없음No content

Description

바이폴라 트랜지스터의 배리드층 형성방법Method of forming buried layer of bipolar transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 (a)∼(b)는 본 발명에 따른 제조공정도이다.2 (a) to (b) are manufacturing process diagrams according to the present invention.

Claims (2)

바이폴라트랜지스터의 제조공정에 있어서, 배리드층 형성영역에 불순물을 이온 주입하고 저온 어닐링으로 저온산화막을 형성한 후 이온 주립된 불순물을 확산하여 배리드층을 형성한 다음 반도체 기판상의 남아있는 산화막을 제거하고 에픽택셜층을 성장시키는 것을 특징으로 하는 바이폴라 트랜지스터의 배리드층 형성방법.In the manufacturing process of the bipolar transistor, an ion is implanted into the buried layer forming region, a low temperature oxide film is formed by low temperature annealing, then ion implanted impurities are diffused to form a buried layer, and then the remaining oxide film on the semiconductor substrate is removed. And growing an epitaxial layer. 제1항에 있어서, 상기 저온어닐링은 800-900℃의 온도, 1:1인 N2:O2의 가스분위기에서 240분 동안 실행되는 것을 특징으로 하는 바이폴라 트랜지스터의 배리드층 형성방법.The method of claim 1, wherein the low temperature annealing is performed for 240 minutes in a gas atmosphere of N 2 : O 2 at a temperature of 800-900 ° C. and 1: 1. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910002387A 1991-02-13 1991-02-13 Method of forming buried layer of bipolar transistor KR920017171A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910002387A KR920017171A (en) 1991-02-13 1991-02-13 Method of forming buried layer of bipolar transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910002387A KR920017171A (en) 1991-02-13 1991-02-13 Method of forming buried layer of bipolar transistor

Publications (1)

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KR920017171A true KR920017171A (en) 1992-09-26

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KR1019910002387A KR920017171A (en) 1991-02-13 1991-02-13 Method of forming buried layer of bipolar transistor

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100454075B1 (en) * 2002-06-11 2004-10-26 동부전자 주식회사 Method of manufacturing bipolar transistor in semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100454075B1 (en) * 2002-06-11 2004-10-26 동부전자 주식회사 Method of manufacturing bipolar transistor in semiconductor device

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