KR950021113A - Gate electrode formation method of semiconductor device - Google Patents

Gate electrode formation method of semiconductor device Download PDF

Info

Publication number
KR950021113A
KR950021113A KR1019930030830A KR930030830A KR950021113A KR 950021113 A KR950021113 A KR 950021113A KR 1019930030830 A KR1019930030830 A KR 1019930030830A KR 930030830 A KR930030830 A KR 930030830A KR 950021113 A KR950021113 A KR 950021113A
Authority
KR
South Korea
Prior art keywords
film
forming
silicon film
oxide film
semiconductor device
Prior art date
Application number
KR1019930030830A
Other languages
Korean (ko)
Other versions
KR100256246B1 (en
Inventor
주문식
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930030830A priority Critical patent/KR100256246B1/en
Publication of KR950021113A publication Critical patent/KR950021113A/en
Application granted granted Critical
Publication of KR100256246B1 publication Critical patent/KR100256246B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Abstract

본 발명은 실리사이드 구조를 갖는 반도체 소자의 게이트 전극 형성 방법에 있어서, 반도체 기판(1)상에 게이트 산화막(2)를 형성하는 단계, 상기 게이트 산화막(2)상에 비정질실리콘막(3)을 증착하는 단계, 상기 비정질 실리콘막(3)에 산소이온을 주입(4)하는 단계, 상기 비정질 실리콘막(3)에 불순물 도핑(Doping) 및 열처리하여 다결정 실리콘막(3')을 형성하는 단계, 상기 다결정 실리콘막(3')상에 실리사이드막(5)을 형성하는 단계, 마스크 및 식각 공정을 통해 상기 실리사이드막(5), 다결정 실리콘막(3'), 게이트 산화막(2)의 소정부위를 차례로 식각하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성 방법에 관한 것으로, 소자의 접촉저항을 향상시키고자 하는 목적으로 텅스텐 실리사이드 박막을 형성할시 게이트 산화막 내부로의 불순물이 확산되는 것을 방지하여 산화막의 특성을 향상시켜 신뢰성 향상 및 수율증가를 가져오는 효과가 있다.The present invention provides a method for forming a gate electrode of a semiconductor device having a silicide structure, the method comprising: forming a gate oxide film (2) on a semiconductor substrate (1), depositing an amorphous silicon film (3) on the gate oxide film (2) Implanting oxygen ions into the amorphous silicon film 3, doping and thermally treating the amorphous silicon film 3 to form a polycrystalline silicon film 3 ′, Forming a silicide film 5 on the polycrystalline silicon film 3 ', and then predetermined portions of the silicide film 5, the polycrystalline silicon film 3', and the gate oxide film 2 are sequentially formed through a mask and an etching process. A method of forming a gate electrode of a semiconductor device comprising the step of etching, the gate oxide film when forming a tungsten silicide thin film for the purpose of improving the contact resistance of the device By preventing the diffusion of impurities into the negative electrode, the characteristics of the oxide film are improved, thereby improving reliability and increasing yield.

Description

반도체 소자의 게이트 전극 형성 방법Gate electrode formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1a도 내지 제1d도는 본 발명에 따른 게이트 전극 형성 공정도.1a to 1d is a process diagram of the gate electrode formation according to the present invention.

Claims (1)

실리사이드 구조를 갖는 반도체 소자의 게이트 전극 형성 방법에 있어서, 반도체 기판(1)상에 게이트 산화막(2)를 형성하는 단계, 상기 게이트 산화막(2)상에 비정질실리콘막(3)을 증착하는 단계, 상기 비정질 실리콘막(3)에 산소이온을 주입(4)하는 단계, 상기 비정질 실리콘막(3)에 불순물 도핑(Doping) 및 열처리 하여 다결정 실리콘막(3')을 형성하는 단계, 상기 다결정 실리콘막(3')사아에 실리사이드막(5)을 형성하는 단계, 마스크 및 식각 공정을 통해 상기 실리사이드막(5), 다결정 시리리콘막(3'), 게이트 산화막(2)의 소정부위를 차례로 식각하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 게이트 전극 형성 방법.A method of forming a gate electrode of a semiconductor device having a silicide structure, the method comprising: forming a gate oxide film 2 on a semiconductor substrate 1, depositing an amorphous silicon film 3 on the gate oxide film 2, Implanting (4) oxygen ions into the amorphous silicon film (3), doping and heat-treating the amorphous silicon film (3) to form a polycrystalline silicon film (3 '), and the polycrystalline silicon film Forming a silicide film 5 on the (3 ') seed, and then etching a predetermined portion of the silicide film 5, the polycrystalline silicon silicon 3', and the gate oxide film 2 sequentially through a mask and an etching process A method for forming a gate electrode of a semiconductor device comprising the step of. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930030830A 1993-12-29 1993-12-29 Method of forming gate electrode in semiconductor device KR100256246B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930030830A KR100256246B1 (en) 1993-12-29 1993-12-29 Method of forming gate electrode in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930030830A KR100256246B1 (en) 1993-12-29 1993-12-29 Method of forming gate electrode in semiconductor device

Publications (2)

Publication Number Publication Date
KR950021113A true KR950021113A (en) 1995-07-26
KR100256246B1 KR100256246B1 (en) 2000-05-15

Family

ID=19373802

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930030830A KR100256246B1 (en) 1993-12-29 1993-12-29 Method of forming gate electrode in semiconductor device

Country Status (1)

Country Link
KR (1) KR100256246B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100362190B1 (en) * 1995-12-16 2003-03-06 주식회사 하이닉스반도체 Method for forming polycide electrode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100362190B1 (en) * 1995-12-16 2003-03-06 주식회사 하이닉스반도체 Method for forming polycide electrode

Also Published As

Publication number Publication date
KR100256246B1 (en) 2000-05-15

Similar Documents

Publication Publication Date Title
US5275872A (en) Polycrystalline silicon thin film transistor
US5476802A (en) Method for forming an insulated gate field effect transistor
KR890003028A (en) Manufacturing method of high resistance polycrystalline silicon
KR970024304A (en) Thin film transistor manufacturing method
GB2037073A (en) Method of producing a metal-semiconductor fieldeffect transistor
KR950021113A (en) Gate electrode formation method of semiconductor device
KR920007124A (en) Manufacturing Method of Poly-Emitter Bipolar Transistor
JP3257042B2 (en) Semiconductor device and method of manufacturing semiconductor device
JPS62290152A (en) Manufacture of semiconductor device
JPH0645598A (en) Semiconductor device and manufacture thereof
KR940016961A (en) MOS transistor and its manufacturing method
KR100357299B1 (en) Method for manufacturing thin film transistor
KR950021201A (en) Spacer Formation Method of Semiconductor Device
KR960009015A (en) Gate electrode formation method of semiconductor device
KR960039427A (en) Manufacturing method of MOS field effect transistor
JPH04283966A (en) Manufacture of mos semiconductor device
KR940012653A (en) Method of manufacturing thin film transistor
KR960026925A (en) Transistor manufacturing method of semiconductor device
KR960026435A (en) Transistor manufacturing method of semiconductor device
KR970052311A (en) Cobalt Silicide Formation Method of Semiconductor Device
KR970053071A (en) Manufacturing method of MOSFET
KR920016611A (en) Metal silicide protective layer manufacturing method
KR920007181A (en) Manufacturing Method of N-MOS LDD Transistor
KR960035875A (en) Gate electrode formation method of semiconductor device
KR910003786A (en) Gate electrode formation method

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20090121

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee