KR920011562A - LDD structure transistor manufacturing method - Google Patents

LDD structure transistor manufacturing method Download PDF

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Publication number
KR920011562A
KR920011562A KR1019900021628A KR900021628A KR920011562A KR 920011562 A KR920011562 A KR 920011562A KR 1019900021628 A KR1019900021628 A KR 1019900021628A KR 900021628 A KR900021628 A KR 900021628A KR 920011562 A KR920011562 A KR 920011562A
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KR
South Korea
Prior art keywords
gate
silicon nitride
nitride film
polysilicon
ldd structure
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Application number
KR1019900021628A
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Korean (ko)
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KR0178968B1 (en
Inventor
박병주
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문정환
금성일렉트론 주식회사
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Priority to KR1019900021628A priority Critical patent/KR0178968B1/en
Publication of KR920011562A publication Critical patent/KR920011562A/en
Application granted granted Critical
Publication of KR0178968B1 publication Critical patent/KR0178968B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음No content

Description

LDD구조의 트랜지스터 제조방법LDD structure transistor manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 공정 단면도.2 is a cross-sectional view of the process of the present invention.

Claims (2)

기판위에 웰과 필드 산화막 형성한 이후의 공정에 있어서, 얇은 도우프된 플리실리콘막과 게이트 마스크용 실리콘 질화막을 차례로 중착하고 포토/ 에치 공정을 거쳐 게이트 형성영역내의 상기 실리콘 질화막을 제거하는 단계, 상기 실리콘 질화막이 제고된 게이트 형성영역에만 선택적으로 게이트 폴리실리콘을 중착한 후 소오스/ 드레인 접합용 저농도 이온을 주입하는 단계, 전체적으로 폴리실리콘막을 중착하고 이를 에치하여 게이트 측벽 폴리실리콘막을 형성하는 단계, 소오스/드레인 접합용 고농도 이온을 주입하는 단계가 차례로 포함됨을 특징으로 하는 LDD구조의 트랜지스터 제조방법.In a process after forming a well and a field oxide film on a substrate, sequentially thinning a thin doped polysilicon film and a silicon nitride film for a gate mask and removing the silicon nitride film in the gate forming region through a photo / etch process; Selectively depositing gate polysilicon only in the gate formation region where the silicon nitride film is enhanced, and then implanting low-concentration ions for source / drain bonding; depositing and etching the polysilicon layer as a whole to form a gate sidewall polysilicon layer, A method of manufacturing a transistor of an LDD structure, comprising the steps of implanting high concentration ions for drain junction. 제1항에 있어서, 게이트 마스크용 실리콘 질화막의 두께는 이후 형성되는 게이트 폴리실리콘보다 조금 더 두껍게 증착하는 것을 특징으로 하는 LDD구조의 트랜지스터 제조방법.The method of claim 1, wherein the thickness of the silicon nitride film for the gate mask is deposited a little thicker than the gate polysilicon formed later. ※ 참고사항：최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021628A 1990-12-24 1990-12-24 Method of manufacturing ldd structure transistor KR0178968B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900021628A KR0178968B1 (en) 1990-12-24 1990-12-24 Method of manufacturing ldd structure transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021628A KR0178968B1 (en) 1990-12-24 1990-12-24 Method of manufacturing ldd structure transistor

Publications (2)

Publication Number Publication Date
KR920011562A true KR920011562A (en) 1992-07-24
KR0178968B1 KR0178968B1 (en) 1999-03-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900021628A KR0178968B1 (en) 1990-12-24 1990-12-24 Method of manufacturing ldd structure transistor

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101304987B1 (en) * 2012-05-07 2013-09-06 삼호콘크리트(주) Assembly type precast manhole

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KR0178968B1 (en) 1999-03-20

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