KR920010824A - Device isolation method of semiconductor device - Google Patents

Device isolation method of semiconductor device Download PDF

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Publication number
KR920010824A
KR920010824A KR1019900018357A KR900018357A KR920010824A KR 920010824 A KR920010824 A KR 920010824A KR 1019900018357 A KR1019900018357 A KR 1019900018357A KR 900018357 A KR900018357 A KR 900018357A KR 920010824 A KR920010824 A KR 920010824A
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KR
South Korea
Prior art keywords
oxide film
nitride film
cvd oxide
film
forming
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KR1019900018357A
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Korean (ko)
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KR0166815B1 (en
Inventor
정문모
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문정환
금성일렉트론 주식회사
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Priority to KR1019900018357A priority Critical patent/KR0166815B1/en
Publication of KR920010824A publication Critical patent/KR920010824A/en
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Publication of KR0166815B1 publication Critical patent/KR0166815B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

내용 없음No content

Description

반도체 장치의 소자격리방법Device isolation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도 (a)-(f)는 본 발명에 따른 반도체 장치의 소자격리를 설명하기 위한 제조공정도이다.(A)-(f) is a manufacturing process drawing for demonstrating element isolation of the semiconductor device which concerns on this invention.

Claims (3)

실리콘기판상에 나이트라이데이션에 의한 질화막, 제1CVD산화막, LPCVD질화막을 차례로 형성하는 공정과, 소자형성영역의 이외의 부분의 상기 LPCVD질화막, 상기 제1CVD산화막, 상기 질화막 포토에칭 공정으로 제거한 후 노출된 필드부분을 소정두께로 식각하는 공정과, 전면에 폴리실리콘층과 제2CVD산화막을 차례로 도포하는 공정과, RIE공정에 의하여 상기 질화막, 제1CVD산화막, LPCVD질화막의 측면에 스페이서를 형성한 후 상기 필드부분에 채널스톱을 위한 불순물을 주입하는 공정과, 상기 필드부분에 필드산화를 행하여 필드산화막을 형성한 후 평탄화공정에 의하여 소자형성영역을 노출시키는 공정으로 이루어진 반도체 장치의 소자격리방법.A process of forming a nitride film, a first CVD oxide film, and an LPCVD nitride film by nitridation on a silicon substrate, and then removing the LPCVD nitride film, the first CVD oxide film, and the nitride film photoetching process in portions other than the element formation region and exposing them. Etching the formed field portion to a predetermined thickness, sequentially applying a polysilicon layer and a second CVD oxide film on the entire surface, and forming a spacer on the sides of the nitride film, the first CVD oxide film, and the LPCVD nitride film by a RIE process. And a step of implanting impurities for channel stop in the field portion, and forming a field oxide film by performing field oxidation on the field portion and exposing the element formation region by a planarization process. 제1항에 있어서, 상기 폴리실리콘층의 두께는 바람직하게는 2000Å이며, 상기 제2CVD산화막의 두께는 바람직하게는 500Å인 것을 특징으로 하는 반도체 장치의 소자격리방법The method of claim 1, wherein the thickness of the polysilicon layer is preferably 2000 kPa, and the thickness of the second CVD oxide film is preferably 500 kPa. 제1항에 있어서, 상기 LPCVD질화막은 상기 제1CVD산화막 보다 두껍게 형성되는 것을 특징으로 하는 반도체 장치의 소자격리방법.The device isolation method of claim 1, wherein the LPCVD nitride film is formed thicker than the first CVD oxide film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900018357A 1990-11-13 1990-11-13 Method of manufacturing a semiconductor device provided with an isolation region KR0166815B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900018357A KR0166815B1 (en) 1990-11-13 1990-11-13 Method of manufacturing a semiconductor device provided with an isolation region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900018357A KR0166815B1 (en) 1990-11-13 1990-11-13 Method of manufacturing a semiconductor device provided with an isolation region

Publications (2)

Publication Number Publication Date
KR920010824A true KR920010824A (en) 1992-06-27
KR0166815B1 KR0166815B1 (en) 1999-02-01

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Application Number Title Priority Date Filing Date
KR1019900018357A KR0166815B1 (en) 1990-11-13 1990-11-13 Method of manufacturing a semiconductor device provided with an isolation region

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Publication number Publication date
KR0166815B1 (en) 1999-02-01

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