KR910005482A - Mes fet의 제조방법 - Google Patents

Mes fet의 제조방법

Info

Publication number
KR910005482A
KR910005482A KR1019900012284A KR900012284A KR910005482A KR 910005482 A KR910005482 A KR 910005482A KR 1019900012284 A KR1019900012284 A KR 1019900012284A KR 900012284 A KR900012284 A KR 900012284A KR 910005482 A KR910005482 A KR 910005482A
Authority
KR
South Korea
Prior art keywords
mes fet
fet manufacturing
manufacturing
mes
fet
Prior art date
Application number
KR1019900012284A
Other languages
English (en)
Other versions
KR940006710B1 (ko
Inventor
소이치 이마무라
스가도루
Original Assignee
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바 filed Critical 가부시키가이샤 도시바
Publication of KR910005482A publication Critical patent/KR910005482A/ko
Application granted granted Critical
Publication of KR940006710B1 publication Critical patent/KR940006710B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2654Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
    • H01L21/26546Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds of electrically active species
    • H01L21/26553Through-implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863Lateral single gate transistors
    • H01L29/66871Processes wherein the final gate is made after the formation of the source and drain regions in the active layer, e.g. dummy-gate processes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
KR1019900012284A 1989-08-11 1990-08-10 Mes fet의 제조방법 KR940006710B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1208507A JPH0372634A (ja) 1989-08-11 1989-08-11 Mes fetの製造方法
JP1-208507 1989-08-11

Publications (2)

Publication Number Publication Date
KR910005482A true KR910005482A (ko) 1991-03-30
KR940006710B1 KR940006710B1 (ko) 1994-07-25

Family

ID=16557304

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900012284A KR940006710B1 (ko) 1989-08-11 1990-08-10 Mes fet의 제조방법

Country Status (3)

Country Link
EP (1) EP0412502A1 (ko)
JP (1) JPH0372634A (ko)
KR (1) KR940006710B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100350309B1 (ko) * 1999-03-05 2002-08-24 주식회사 파워넷 녹음부 및 재생부 분리형 보이스 메모장치 및 그 녹음 및 재생방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2694920B1 (fr) * 1992-08-20 1994-10-28 Oreal Dispositif pour conserver séparés l'un de l'autre au moins deux produits et pour effectuer leur mélange à un instant souhaité.
KR20010106874A (ko) * 2000-05-23 2001-12-07 정일구 순간 혼합 뚜껑

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2631873C2 (de) * 1976-07-15 1986-07-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung eines Halbleiterbauelements mit einem Schottky-Kontakt auf einem zu einem anderen Bereich justierten Gatebereich und mit kleinem Serienwiderstand
US4344980A (en) * 1981-03-25 1982-08-17 The United States Of America As Represented By The Secretary Of The Navy Superior ohmic contacts to III-V semiconductor by virtue of double donor impurity
US4505023A (en) * 1982-09-29 1985-03-19 The United States Of America As Represented By The Secretary Of The Navy Method of making a planar INP insulated gate field transistor by a virtual self-aligned process
EP0112657B1 (en) * 1982-11-29 1990-06-20 Fujitsu Limited Field effect transistor and process for fabricating it
JPS6010787A (ja) * 1983-06-30 1985-01-19 Sanyo Electric Co Ltd シヨツトキ−障壁型fetの製造方法
JPS6032364A (ja) * 1983-08-01 1985-02-19 Toshiba Corp 半導体装置の製造方法
JPS6086866A (ja) * 1983-10-19 1985-05-16 Matsushita Electronics Corp 電界効果トランジスタおよびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100350309B1 (ko) * 1999-03-05 2002-08-24 주식회사 파워넷 녹음부 및 재생부 분리형 보이스 메모장치 및 그 녹음 및 재생방법

Also Published As

Publication number Publication date
JPH0372634A (ja) 1991-03-27
EP0412502A1 (en) 1991-02-13
KR940006710B1 (ko) 1994-07-25

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Legal Events

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A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20040709

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee