KR910003398A - Digital Radar Retime Memory Switching Circuit - Google Patents
Digital Radar Retime Memory Switching Circuit Download PDFInfo
- Publication number
- KR910003398A KR910003398A KR1019890010885A KR890010885A KR910003398A KR 910003398 A KR910003398 A KR 910003398A KR 1019890010885 A KR1019890010885 A KR 1019890010885A KR 890010885 A KR890010885 A KR 890010885A KR 910003398 A KR910003398 A KR 910003398A
- Authority
- KR
- South Korea
- Prior art keywords
- retime
- memories
- switching circuit
- digital radar
- memory switching
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
내용 없음.No content.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 제1도의 타이밍 챠트,2 is a timing chart of FIG.
제3도는 본 발명의 디지탈 레이다 구성도,3 is a digital radar configuration diagram of the present invention,
제4도는 제3도의 타이밍 챠트.4 is a timing chart of FIG.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890010885A KR0127133B1 (en) | 1989-07-31 | 1989-07-31 | Retimed memory switching circuit for digital radar |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890010885A KR0127133B1 (en) | 1989-07-31 | 1989-07-31 | Retimed memory switching circuit for digital radar |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910003398A true KR910003398A (en) | 1991-02-27 |
KR0127133B1 KR0127133B1 (en) | 1998-10-01 |
Family
ID=19288589
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890010885A KR0127133B1 (en) | 1989-07-31 | 1989-07-31 | Retimed memory switching circuit for digital radar |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0127133B1 (en) |
-
1989
- 1989-07-31 KR KR1019890010885A patent/KR0127133B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0127133B1 (en) | 1998-10-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20010307 Year of fee payment: 5 |
|
LAPS | Lapse due to unpaid annual fee |