KR900002812B1 - Frequency distinguishig circuit for horizanfal synchronizing signal - Google Patents

Frequency distinguishig circuit for horizanfal synchronizing signal Download PDF

Info

Publication number
KR900002812B1
KR900002812B1 KR1019860002180A KR860002180A KR900002812B1 KR 900002812 B1 KR900002812 B1 KR 900002812B1 KR 1019860002180 A KR1019860002180 A KR 1019860002180A KR 860002180 A KR860002180 A KR 860002180A KR 900002812 B1 KR900002812 B1 KR 900002812B1
Authority
KR
South Korea
Prior art keywords
signal
frequency
output
circuit
operational amplifier
Prior art date
Application number
KR1019860002180A
Other languages
Korean (ko)
Other versions
KR870009578A (en
Inventor
권호열
Original Assignee
주식회사 금성사
구자학
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사, 구자학 filed Critical 주식회사 금성사
Priority to KR1019860002180A priority Critical patent/KR900002812B1/en
Publication of KR870009578A publication Critical patent/KR870009578A/en
Application granted granted Critical
Publication of KR900002812B1 publication Critical patent/KR900002812B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)
  • Synchronizing For Television (AREA)

Abstract

The circuit generates control signal for switching the inner circuit of TV having multi scan function according to the horizontal synchronous frequency of picture signal. The circuit includes a modulater (1) modulating the horizontal synchronous signal, a switch (2) driven by the output signal of the modulator (1), a detector (3) charging or discharging the power according to the switch, a comparator (4) comparing the reference voltage and output voltage of the detector (3), and a multivibrator (5) transmitting voltage with high or low level according to the output signal of the comparator (4).

Description

수평동기신호의 주파수 판별회로Frequency discrimination circuit of horizontal synchronous signal

제 1 도는 본 발명의 판별호로도.1 is a discrimination diagram of the present invention.

제 2 도는 제 1 도 각부의 파형도2 is a waveform diagram of each part of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 신호정형부 2 : 스위칭부1: signal shaping part 2: switching part

3 : 검출부 4 : 비교부3 detection unit 4 comparison unit

5 : 멀티바이브레이터5: Multivibrator

본 발명은 저해상도를 갖는 수평주파수 15KHZ의 영상신호와 고해상도를 갖는 수평주파수 31KHZ의 영상신호를 함께 처리하는 멀티스캔 기능을 가진 텔레비젼 수상기 또는 모니터등에 있어서 입력되는 영상신호의 수평동기 주파수에 따라 내부회로의 동작을 자동으로 절환시킬 수 있는 제어신호를 만드는 수평동기신호의 주파수 판별회로에 관한 것이다.The present invention relates to an internal circuit according to a horizontal synchronization frequency of a video signal input in a television receiver or a monitor having a multi-scan function for processing a video signal having a low resolution horizontal frequency of 15KHZ and a video signal having a high resolution horizontal frequency of 31KHZ together. It relates to a frequency discriminating circuit of a horizontal synchronous signal for making a control signal that can automatically switch the operation.

종래의 멀티스캔 기능을 가진 텔레비젼 수상기 또는 모니터등은 수평동기신호의 주파수를 판별하는 회로가 구성되어 있지 않으므로 사용자는 영상신호의 수평동기 주파수를 미리 조사하고, 그 조사 결과에 따라 멀티스캔 기능의 절환스위치를 수동으로 절한시켜야 되는 결함이 있었다.Since a television receiver or a monitor having a multi-scan function does not have a circuit for discriminating the frequency of a horizontal synchronous signal, the user checks the horizontal synchronous frequency of a video signal in advance and switches the multi-scan function according to the result of the investigation. There was a fault that caused the switch to be manually switched off.

본 발명은 이와같은 종래의 결함을 감안하여, 입력되는 영상신호의 수평동기신호 주파수를 판별하여 31KHZ이면 고전위를 출력하고, 15KHZ이면 저전위를 출력하여 멀티스캔 기능의 절환스위치를 자동으로 절환할 수 있게 창안한 것으로, 이들 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.In view of such a conventional deficiency, the present invention can determine the horizontal synchronous signal frequency of an input video signal and output a high potential at 31 KHZ and a low potential at 15 KHZ to automatically switch the switching switch of the multi-scan function. Invented so as to be described in detail with reference to the accompanying drawings as follows.

제 1 도는 본 발명의 판별회로도로서, 이에 도시한 바와같이 수평동기신호 입력단자(Hi)를 비반전입력단자(+)에 저항(R1)(R2)이 접속된 연산증폭기(OP1)의 반전입력단자(-)에 접속하여 신호정형부(1)를 구성하고, 연산증폭기(OP1)의 출력측은 자힝(R3)을 통해 트랜지스터(TR1)의 베이스에 접속하여 스위칭부(2)를 구성하며 트랜지스터(TR1)의 콜렉터저항(R4) 및 콘덴서(C1)에 접속하여 검출부(3)를 구성함과 아울러 그 접속점을 반전입력단자(-)에 저항 (R5)(R6)이 접속된 연산증폭기(OP2)의 비반전입력단자(+)에 접속하여 비교부(4)를 구성하며, 연산증폭기(OP2)의 출력측은 멀티바이브레이터(5)의 입력층(1N)에 접속하여 구성한 것으로, 도면의 설명중 미설명부호 R7및 C2는 멀티바이브레이터(5)의 시정수를 선정하는 저항 및 콘덴서이고, Vcc는 전원단자이다.FIG. 1 is a discrimination circuit diagram of the present invention. As shown therein, an operational amplifier OP 1 having a horizontal synchronization signal input terminal Hi connected to a non-inverting input terminal + with a resistor R 1 (R 2 ) connected thereto. Is connected to the inverting input terminal (-) of the signal shaping unit 1 , and the output side of the operational amplifier OP 1 is connected to the base of the transistor TR 1 through the magnetizing R 3 to the switching unit 2 The detector 3 is connected to the collector resistor R 4 and the capacitor C 1 of the transistor TR 1 , and the connection point is connected to the resistor R 5 (R) at the inverting input terminal (-). 6 ) is connected to the non-inverting input terminal (+) of the operational amplifier OP 2 connected to form a comparator 4, and the output side of the operational amplifier OP 2 is the input layer 1N of the multivibrator 5. In the drawings, reference numerals R 7 and C 2 denote resistors and capacitors for selecting time constants of the multivibrator 5, and Vcc is a power supply terminal. All.

이와같이 구성된 본 발명의 작용효과를 상세히 설명하면 다음과 같다.If described in detail the effects of the present invention configured as described above.

전원단자(Vcc)에 전원이 인가되면 그 전원은 저항 (R1)(R2)에 의해 분할되어 연산증폭기(OP1)의 비반전 입력단자(+)에 기준전압을 인가함과 동시에 저항 (R5)(R6)에 의해 분할되어 연산증폭기(OP2)의 반전입력단자(-)에 기준전압을 인가하게 된다.When power is applied to the power supply terminal Vcc, the power is divided by resistors R 1 and R 2 to apply a reference voltage to the non-inverting input terminal (+) of the operational amplifier OP 1 and at the same time, R 5 ) is divided by R 6 to apply a reference voltage to the inverting input terminal (−) of the operational amplifier OP 2 .

이와같은 상태에서 제 2 도의 (a)에서 도시한 바와같이 시간 (t0)에 수평동기신호 입력단자(Hi)로 저해상도의 주파수인 15KHZ의 수평동기신호가 입력되고, 이때, 저항(R1)(R2)에 의해 분할되어 연산증폭기(OP1)의 비반전입력단자(+)에 인가되는 기준전압이 V1이라 가정하면, 연산증폭기(OP1)의 출력측에는 제 2 도의 (b)에 도시한 바와같이 H(여기서, H는 수평동기 기간임)의 주기를 가지는 펄스신호가 출력되고, 그 출력된 펄스신호는 스위칭부(2)의 저항(R3)을 통해 트랜지스터(TR1)의 베이스에 인가되어 그를 온, 오프시키게 되므로 검출부(3)의 콘덴서(C1)에는 제 2 도의 (c)에 도시한 바와같이 트랜지스터(TR1)가 오프될 때 전원단자(VCC)의 전원이 저항(R4)을 통해 충전되고, 트랜지스터(TR1)가 온될 때 콘덴서(C1)에 충전된 전위가 트랜지스터(TR1)를 통해 순식간에 방전되면서 비교부(4)의 연산증폭기)(OP2) 비반전입력단자(+)에 인가된다.In such a state to the second degree (a) one hours (t 0) the horizontal synchronizing signal input terminal (Hi) to as shown in the horizontal synchronizing signal of a low resolution frequency 15KHZ is input, at this time, the resistance (R 1) a (R 2) is divided by the operational amplifier (OP 1), the non-inverting input terminal (+) when the reference voltage is assumed that V 1 is applied to the operational amplifier output, the second degree (b) of (OP 1) of As shown, a pulse signal having a period of H (where H is a horizontal synchronous period) is output, and the output pulse signal of the transistor TR 1 is connected to the resistor R 3 of the switching unit 2. Since it is applied to the base to turn it on and off, the capacitor C 1 of the detector 3 has a power supply of the power supply terminal V CC when the transistor TR 1 is turned off, as shown in FIG. The potential charged through the resistor R4, and charged in the capacitor C 1 when the transistor TR 1 is turned on, passes through the transistor TR 1 . While being discharged in an instant, it is applied to the non-inverting input terminal (+) OP 2 of the comparator 4.

여기서, 저항 (R5)(R6)에 의해 분할되어 연산증폭기(OP2)의 반전입력단자(-)에 인가되는 기준전압(V2)을 상기와 같이 15KHZ의 수평동기신호가 입력될 때 연산증폭기(OP2)의 비반전입력단자(+)에 인가되는 최대 전압보다 약간 낮게 설정하면, 연산증폭기(OP2)의 출력후에는 제 2 도의 (d)에 도시한 바와같이 펄스신호가 출력되어 멀티바이브레이터(5)의 입력단자(IN)에 인가되므로 멀티바이브레이터(5)의 출력단자(

Figure kpo00001
)에는 시간 (t1)에 제 2 도의 (e)에 도시한 바와같이 저 전위가 출력되고, 여기서, 저항(R7) 및 콘덴서(C2)의 시정수가 1H 이상이 되게 그 값을 설정하면, 멀티바이브레이터(5)의 출력단자(
Figure kpo00002
)에 고전위가 출력되기 전에 그의 입력단자(IN)로 펄스신호가 입력되므로 멀티바이브레이터(5)의 출력단자(
Figure kpo00003
)에는 계속 저전위가 출력된다.Here, when the horizontal synchronization signal of 15 KHZ is inputted to the reference voltage V 2 divided by the resistor R 5 (R 6 ) and applied to the inverting input terminal (−) of the operational amplifier OP 2 as described above. When a bit is set lower than the maximum voltage applied to the non-inverting input terminal (+) of the operational amplifier (OP 2), after the output of the operational amplifier (OP 2) is a pulse signal output as shown in the second degree (d) Is applied to the input terminal IN of the multivibrator 5 so that the output terminal of the multivibrator 5
Figure kpo00001
) Is output at time t 1 as shown in (e) of FIG. 2, where the value is set such that the time constants of resistor R 7 and capacitor C 2 are 1H or more. , The output terminal of the multivibrator 5
Figure kpo00002
Since the pulse signal is input to its input terminal IN before the high potential is output to the output terminal of the multivibrator 5
Figure kpo00003
) Keeps outputting low potential.

그리고 제 2 도의 (a)에 도시한 바와같이 시간 (t2)에 고해상도의 주파수인 31KHZ의 수평동기신호가 입력되면 연산증폭기(OP1)의 출력측에는 제 2 도의 (b)에 도시한 바와같이 ½H의 주기로 펄스신호가 출력되어 트랜지스터(TR1)는 ½H의 주기로 온, 오프를 반복하므로 제 2 도의 (c)에 도시한 바와같이 콘덴서(C1)에 충전 및 방전되면서 연산증폭기(OP2)의 비반전입력단자(+)에 인가되는 저압이 연산증폭기(OP2)의 반전입력단자(-)에 인가되는 기준전압(V2) 보다 낮게된다.As shown in (a) of FIG. 2 , when the horizontal synchronization signal of 31 KHZ, which is a high resolution frequency, is input at the time t 2 , the output side of the operational amplifier OP 1 is shown in FIG. Since the pulse signal is output in a cycle of ½H and the transistor TR 1 is repeatedly turned on and off in a cycle of ½H, the operational amplifier OP 2 is charged and discharged in the capacitor C 1 as shown in FIG. The low voltage applied to the non-inverting input terminal (+) of is lower than the reference voltage (V 2 ) applied to the inverting input terminal (−) of the operational amplifier OP 2 .

따라서 제 2 도의 (d)에 도시한 바와같이 연산증폭기(OP2)의 출력측에는 계속 저전위가 출력되므로 멀티바이브레이터(5)의 출력단자(

Figure kpo00004
)에는 제2도의 (e)에 도시한 바와같이 저항(R7) 및 콘덴서(C2)에 의해 설정된 일정시간 (t3)부터 계속 고전위를 출력하게 된다.Therefore, as shown in (d) of FIG. 2 , since the low potential is continuously output to the output side of the operational amplifier OP 2 , the output terminal of the multivibrator 5 (
Figure kpo00004
), The high potential is continuously output from the predetermined time t 3 set by the resistor R 7 and the capacitor C 2 as shown in FIG.

이상에서 설명한 바와같이 본 발명은 수평동기주파수가 저해상도인 15KHZ이면 저전위를 출력하고, 고해상도인 31KHZ이면 고전위를 출력하므로 멀티스캔 기능을 가진 텔레비젼 수상기 또는 모니터등의 수평동기 주파수에 따른 내부회로를 자동으로 제어할 수 있는 효과가 있다.As described above, the present invention outputs a low potential when the horizontal synchronization frequency is low resolution 15KHZ, and outputs a high potential when the high resolution 31KHZ is high. Therefore, an internal circuit according to the horizontal synchronization frequency of a television receiver or a monitor having a multi-scan function is provided. There is an effect that can be controlled automatically.

Claims (1)

수평동기신호를 반전, 정형하는 신호정형부(1)와, 상기 신호정형부(5)의 출력전압에 따라 온, 오프되는 스위칭부(2)와, 상기 스위칭부(2)의 동작에 따라 전원전압을 충전 및 방전하는 검출부(3)와, 상기 검출부(3)의 출력전압 및 기준전압을 비교하는 비교부(4)와, 상기 비교부(4)의 출력신호에 따라 고전위 및 저전위를 출력하는 멀티바이브레이터(5)로 구성함을 특징으로 하는 수평동기신호의 주파수 판별회로.A signal shaping part 1 for inverting and shaping a horizontal synchronous signal, a switching part 2 turned on and off according to the output voltage of the signal shaping part 5, and a power supply voltage according to the operation of the switching part 2; A detector 3 for charging and discharging, a comparator 4 for comparing the output voltage and the reference voltage of the detector 3, and a high potential and a low potential according to the output signal of the comparator 4 A frequency discrimination circuit of a horizontal synchronous signal, characterized by comprising a multivibrator (5).
KR1019860002180A 1986-03-24 1986-03-24 Frequency distinguishig circuit for horizanfal synchronizing signal KR900002812B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860002180A KR900002812B1 (en) 1986-03-24 1986-03-24 Frequency distinguishig circuit for horizanfal synchronizing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860002180A KR900002812B1 (en) 1986-03-24 1986-03-24 Frequency distinguishig circuit for horizanfal synchronizing signal

Publications (2)

Publication Number Publication Date
KR870009578A KR870009578A (en) 1987-10-27
KR900002812B1 true KR900002812B1 (en) 1990-04-30

Family

ID=19249043

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860002180A KR900002812B1 (en) 1986-03-24 1986-03-24 Frequency distinguishig circuit for horizanfal synchronizing signal

Country Status (1)

Country Link
KR (1) KR900002812B1 (en)

Also Published As

Publication number Publication date
KR870009578A (en) 1987-10-27

Similar Documents

Publication Publication Date Title
US3740456A (en) Electronic signal processing circuit
US3740461A (en) Detector circuits with self-referenced bias
KR900002812B1 (en) Frequency distinguishig circuit for horizanfal synchronizing signal
JPS5631283A (en) False synchronizing signal generating circuit
US3735038A (en) Means for superimposing a marker signal onto a composite video signal
US4135209A (en) Time-shared sample and hold circuit
US5331352A (en) Contrast control wherein reference pulse detection occurs every other line period and wherein clamping occurs in remaining line periods
US5889421A (en) Device for detecting the locking of an automatic gain control circuit
JPS61269595A (en) Video signal processing device
US3532811A (en) Circuit for separating sync signals from a composite video signal
KR890003223B1 (en) Teletext data signal detectable circuits
KR960012693B1 (en) Ntsc/pal signal discriminating circuit using color signal
US5977802A (en) Circuit for processing vertical synchronization signals including a polarity detection circuit
KR890001356Y1 (en) Integrated circuit of digital synchroning signal
KR0164527B1 (en) Circuit for controlling input-polarity of synchronization signals
KR0150357B1 (en) Circuit for distinguishing sync-frequency of image signal
JP3019315B2 (en) AFC lock discrimination circuit
KR0153667B1 (en) An apparatus for separating vertical synchronizing signals
KR920008523Y1 (en) Circuit for protecting mulfunction while choosing one of different horizontal synchronizing signals
KR890003754B1 (en) Automatic stopping circuit when signal have no input
KR960000316Y1 (en) Sync signal detection circuit using feed back loop
KR100521804B1 (en) Burst gate pulse generator circuit
EP0040275A1 (en) Comparison circuit adaptable for utilization in a television receiver or the like
KR910009043Y1 (en) Phase auto-control circuit of synchronous signal
JPS60248085A (en) Reference voltage generating circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030331

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee