KR890005836A - Manufacturing Method of Semiconductor Memory Device - Google Patents

Manufacturing Method of Semiconductor Memory Device Download PDF

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Publication number
KR890005836A
KR890005836A KR870010928A KR870010928A KR890005836A KR 890005836 A KR890005836 A KR 890005836A KR 870010928 A KR870010928 A KR 870010928A KR 870010928 A KR870010928 A KR 870010928A KR 890005836 A KR890005836 A KR 890005836A
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KR
South Korea
Prior art keywords
manufacturing
conductivity type
ion implantation
region
memory device
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Application number
KR870010928A
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Korean (ko)
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KR900006019B1 (en
Inventor
이규필
김기남
Original Assignee
강진구
삼성반도체통신 주식회사
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Priority to KR1019870010928A priority Critical patent/KR900006019B1/en
Publication of KR890005836A publication Critical patent/KR890005836A/en
Application granted granted Critical
Publication of KR900006019B1 publication Critical patent/KR900006019B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음No content

Description

반도체 메모리 장치의 제조방법Manufacturing Method of Semiconductor Memory Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본발명에 따른 도핑된 불순물들의 단면 분포도.2 is a cross-sectional view of the doped impurities according to the present invention.

Claims (2)

반도체 장치의 제조공정에 있어서, 제 1도전형의 반도체 기판 표면의 소정영역에 상기 제 1도전형과 반대가 되는 도전형으로 제 1 이온 주입을 하는 제 1공정과, 상기 영역에 제 1 이온주입보다 고에너지로 제 1도전형의 제 2 이온 주입을 하는 제 2공정과, 상기 영역에 제 1 이온 주입보다 고에너지이고 제 2 이온 주입과는 다른 에너지로 제 1도전형의 제 3 이온 주입을 하는 제 3공정과 상기 이온 주입된 영역을 활성화하는 제 4공정과, 상기 영역 상부에 유전물질층을 형성하는 제 5공정과, 상기 유전물질층 상에 다결정 실리콘층을 형성하는 제 6공정을 구비하여 상기 공정의 연속으로 이루어짐을 특징으로 하는 반도체 메모리 장치의 제조방법.1. A process of manufacturing a semiconductor device, comprising: a first step of implanting first ions into a predetermined region of a surface of a semiconductor substrate of a first conductivity type in a conductivity type opposite to that of the first conductivity type; A second step of implanting the second conductive ion of the first conductivity type at a higher energy, and a third ion implantation of the first conductive type at a higher energy than the first ion implantation in the region and different from the second ion implantation; And a fourth process of activating the ion implanted region, a fifth process of forming a dielectric material layer on the region, and a sixth process of forming a polycrystalline silicon layer on the dielectric material layer. And the process is performed continuously. 제 1 항에 있어서, 제 2 및 제 3공정에서 억셉터 이온 주입을 함을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein acceptor ion implantation is performed in the second and third processes. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870010928A 1987-09-30 1987-09-30 Method of manufacturing semiconductor device KR900006019B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870010928A KR900006019B1 (en) 1987-09-30 1987-09-30 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870010928A KR900006019B1 (en) 1987-09-30 1987-09-30 Method of manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
KR890005836A true KR890005836A (en) 1989-05-17
KR900006019B1 KR900006019B1 (en) 1990-08-20

Family

ID=19264893

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870010928A KR900006019B1 (en) 1987-09-30 1987-09-30 Method of manufacturing semiconductor device

Country Status (1)

Country Link
KR (1) KR900006019B1 (en)

Also Published As

Publication number Publication date
KR900006019B1 (en) 1990-08-20

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