KR890004454B1 - 논리회로 - Google Patents
논리회로 Download PDFInfo
- Publication number
- KR890004454B1 KR890004454B1 KR1019850001065A KR850001065A KR890004454B1 KR 890004454 B1 KR890004454 B1 KR 890004454B1 KR 1019850001065 A KR1019850001065 A KR 1019850001065A KR 850001065 A KR850001065 A KR 850001065A KR 890004454 B1 KR890004454 B1 KR 890004454B1
- Authority
- KR
- South Korea
- Prior art keywords
- gate
- transistor
- voltage
- driver
- bit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
- H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Static Random-Access Memory (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59-037460 | 1984-02-29 | ||
| JP59037460A JPS60182759A (ja) | 1984-02-29 | 1984-02-29 | 論理回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR850006789A KR850006789A (ko) | 1985-10-16 |
| KR890004454B1 true KR890004454B1 (ko) | 1989-11-04 |
Family
ID=12498133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019850001065A Expired KR890004454B1 (ko) | 1984-02-29 | 1985-02-21 | 논리회로 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4656611A (enExample) |
| EP (1) | EP0153860B1 (enExample) |
| JP (1) | JPS60182759A (enExample) |
| KR (1) | KR890004454B1 (enExample) |
| CA (1) | CA1246694A (enExample) |
| DE (1) | DE3580496D1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3569859D1 (en) * | 1985-12-24 | 1989-06-01 | Fujitsu Ltd | Logic circuit |
| US6127857A (en) * | 1997-07-02 | 2000-10-03 | Canon Kabushiki Kaisha | Output buffer or voltage hold for analog of multilevel processing |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5080734A (enExample) * | 1973-11-14 | 1975-07-01 | ||
| DE2657561B1 (de) * | 1976-12-18 | 1978-04-13 | Ibm Deutschland | Nachlade-Referenzschaltungsanordnung fuer einen Halbleiterspeicher |
| US4355377A (en) * | 1980-06-30 | 1982-10-19 | Inmos Corporation | Asynchronously equillibrated and pre-charged static ram |
-
1984
- 1984-02-29 JP JP59037460A patent/JPS60182759A/ja active Granted
-
1985
- 1985-02-21 KR KR1019850001065A patent/KR890004454B1/ko not_active Expired
- 1985-02-22 US US06/705,321 patent/US4656611A/en not_active Expired - Lifetime
- 1985-02-26 CA CA000475169A patent/CA1246694A/en not_active Expired
- 1985-02-27 EP EP85301311A patent/EP0153860B1/en not_active Expired - Lifetime
- 1985-02-27 DE DE8585301311T patent/DE3580496D1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0153860A3 (en) | 1987-09-30 |
| KR850006789A (ko) | 1985-10-16 |
| DE3580496D1 (de) | 1990-12-20 |
| CA1246694A (en) | 1988-12-13 |
| EP0153860B1 (en) | 1990-11-14 |
| US4656611A (en) | 1987-04-07 |
| EP0153860A2 (en) | 1985-09-04 |
| JPS60182759A (ja) | 1985-09-18 |
| JPH0428179B2 (enExample) | 1992-05-13 |
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|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
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| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
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St.27 status event code: A-3-3-R10-R17-oth-X000 |
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St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
St.27 status event code: A-2-2-Q10-Q13-nap-PG1605 |
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| E701 | Decision to grant or registration of patent right | ||
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