KR890002298Y1 - Letter-space of signal generation device for letter locating - Google Patents

Letter-space of signal generation device for letter locating Download PDF

Info

Publication number
KR890002298Y1
KR890002298Y1 KR2019850018087U KR850018087U KR890002298Y1 KR 890002298 Y1 KR890002298 Y1 KR 890002298Y1 KR 2019850018087 U KR2019850018087 U KR 2019850018087U KR 850018087 U KR850018087 U KR 850018087U KR 890002298 Y1 KR890002298 Y1 KR 890002298Y1
Authority
KR
South Korea
Prior art keywords
character
input
signal
letter
screen
Prior art date
Application number
KR2019850018087U
Other languages
Korean (ko)
Other versions
KR870010918U (en
Inventor
정종수
Original Assignee
주식회사 금성사
허신구
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사, 허신구 filed Critical 주식회사 금성사
Priority to KR2019850018087U priority Critical patent/KR890002298Y1/en
Publication of KR870010918U publication Critical patent/KR870010918U/en
Application granted granted Critical
Publication of KR890002298Y1 publication Critical patent/KR890002298Y1/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/32Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory with means for controlling the display position

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Studio Circuits (AREA)

Abstract

내용 없음.No content.

Description

문자표시 장치의 문자간격 신호 발생장치Character gap signal generator of character display device

제1도는 종래의 회로도.1 is a conventional circuit diagram.

제2a, b도는 종래의 메모리에 기억된 문자형태.2a and b are character forms stored in a conventional memory.

제3도는 종래의 화면에 표시된 문자형태.3 is a text form displayed on a conventional screen.

제4도는 본 고안의 회로도.4 is a circuit diagram of the present invention.

제5도는 본 고안에 의한 화면에 표시된 문자형태.5 is a character form displayed on the screen according to the present invention.

제6도는 본 고안 회로 각부분의 신호파형도.6 is a signal waveform diagram of each part of the circuit of the present invention.

본 고안은 음극선관(CRT)화면에 표시되는 문자가 화면의 좌측이나 우측끝 부분에서 화면외곽선과 간격을 두고 위치하고, 또 문자와 문자사이에 간격을 두고 위치하도록 문자 간격신호를 래치하였다가 출력하는 플립플롭을 문자발생기와 병렬/직렬변환기 사이에 연결하여된 문자간격 신호발생장치의 구성에 관한 것이다.The present invention latches and outputs a character gap signal so that the characters displayed on the cathode ray tube (CRT) screen are positioned at the left or right edge of the screen at a distance from the screen outline, and positioned at a distance between the characters. The present invention relates to a configuration of a character spacing signal generator in which flip-flops are connected between a character generator and a parallel / serial converter.

종래에는 제1도에 도시된 바와 같이 문자발생기(10)내에 제2a도, 또는 제2b도와 같은 형태의 문자(D7또는 D0)는 문자사이의 간격을 두기 위한 신호를 기억시켜 놓고 어드레스 입력단자(A0―An)로 입력되는 신호에 따라 병렬/직렬변환기(11)에 문자신호(D0―D7)를 가해서 병렬/직렬변환기(11)를 통해 소정의 문자신호를 출력하게 되어 있다. 그러나 이러한 종래의 장치는 문자발생기(10)내에 제2a도와 같은 형태로 문자가 기억되어 있다면 이 문자가 제3도와 같이 화면(12)의 좌측끝에 위치할 경우 좌측외곽선(13)에 닿게 되어 보기에 불편하게 되고, 또 제2b도와 같은 형태로 문자가 기억되어 있다면 이 문자가 제3도와 같이 화면(12)의 우측끝에 위치할 경우 우측외곽선(14)에 닿게 되어 보기에 불편하게 된다.Conventionally, as shown in FIG. 1, in the character generator 10, a letter D 7 or D 0 in the form of FIG. 2a or 2b stores a signal for space between characters and inputs an address. According to the signal input to the terminals A 0 -A n , a character signal D 0 -D 7 is applied to the parallel / serial converter 11 to output a predetermined character signal through the parallel / serial converter 11. have. However, in the conventional apparatus, if a character is stored in the character generator 10 in the form as shown in FIG. 2a, if the character is located at the left end of the screen 12 as shown in FIG. If the character is stored in the form as shown in FIG. 2B and the character is located at the right end of the screen 12 as shown in FIG. 3, the character touches the right outline 14 and becomes uncomfortable.

따라서 종래의 장치에 의하면 문자의 위치가 화면(12)의 중앙에 위치할때는 논리가 '로우'인 문자신호(D7또는 D0)에 의하여 문자사이의 간격이 유지되지만 화면(12)의 좌측 또는 우측끝에 위치할때는 문자가 화면(12)의 외곽선(13, 14)에 닿게 되어 구별하기에 불편하게 되는 문제점이 있었다.Therefore, according to the conventional apparatus, when the position of the character is located in the center of the screen 12, the distance between the characters is maintained by the character signal D 7 or D 0 whose logic is 'low', but the left side of the screen 12 or When the position is located at the right end, there is a problem that the character is inconvenient to distinguish because it touches the outline (13, 14) of the screen (12).

본 고안은 이와 같은 문제점을 해결하기 위하여 음극선관 화면의 외곽선과 간격신호에 의하여 표현되는 여백의 간격을 두고 문자가 화면에 표시되도록 함으로써 문자를 쉽게 구별할 수 있고, 화면전체에 표시되는 문자의 균형이 잡혀서 보기에 편리하도록 한 것이다.In order to solve this problem, the present invention can easily distinguish the characters by displaying the characters on the screen with a space between the outline of the cathode ray tube screen and the gap signal and the balance of the characters displayed on the whole screen. This is to make it convenient to see.

본 고안 장치의 구성은 제4도에 도시된 바와 같이, 문자발생기(1)의 출력단자(D0―D7)는 병렬/직렬변환기(2)의 입력단자(VD1―VD8)에 연결하되, 출력단자(D7)는 수평동기신호(H-Sync)가 클리어신호로 입력되는 D플립플롭(3)의 입력단자(D)에 연결하고, D플립플롭(3)의 출력단자(Q)는 병렬/직렬변환기(2)의 입력단자(VD0)에 연결하며, 클록단자(CK)는 반전기(4)와 1/9분주기(5)를 통해 클록(CCLK)이 입력되도록 하여서 된 것이다.As shown in FIG. 4, the device of the present invention has an output terminal D 0 -D 7 of the character generator 1 connected to an input terminal VD 1 -VD 8 of the parallel / serial converter 2. However, the output terminal D 7 is connected to the input terminal D of the D flip flop 3 to which the horizontal synchronization signal H-Sync is input as a clear signal, and the output terminal Q of the D flip flop 3. ) Is connected to the input terminal VD 0 of the parallel / serial converter 2, and the clock terminal CK allows the clock CCLK to be input through the inverter 4 and the 1/9 divider 5. It is.

이후 설명에서 편의상 문자발생기(1)의 출력단자(D0―D7)에서 나타나는 문자신호를 (D0―D7)으로 표시한다.In the following description, for the sake of convenience, the character signal appearing at the output terminals D 0 -D 7 of the character generator 1 is denoted by (D 0 -D 7 ).

본 고안의 작용효과는 제4도에 도시된 바와 같이, 문자발생기(1)내에 제2a도에 도시된 바와 같은 형태의 문자가 기억되어 있다면 최초에 제6c도와 같은 수평동기신호(H-sync)에 의하여 D플립플롭(3)이 제6d도와 같이 클리어되므로 플립플롭(3)의 출력(Q)은 제6f도와 같이 로우(논리 'O')가 된다.As shown in FIG. 4, the effect of the present invention is that if the character of the type as shown in FIG. 2a is stored in the character generator 1, a horizontal synchronous signal (H-sync) as shown in FIG. As a result, since the D flip-flop 3 is cleared as shown in FIG. 6d, the output Q of the flip-flop 3 becomes low (logical 'O') as shown in FIG. 6f.

따라서 제5a도의 좌측문자와 같이 화면(6)에서 첫번째 도트(DOT)에 해당되는 신호(VD0)가 강제적으로 발생되어 최초에 'O'이 되므로 첫칸은 항상 공간으로 남게 되어 외곽선(7)과 문자는 간격을 유지하게 되는 것이다.Therefore, the signal VD 0 corresponding to the first dot DOT is forcibly generated in the screen 6 as shown in the left character of FIG. Characters will be spaced.

이후에는 병렬/직렬변환기(2)는 제6b도와 같은 클록(CCLK)에 따라 문자발생기(1)로부터 공급되는 나머지 데이타인 제6g도와 같은 문자신호(D0―D7)를 저장하게 되며, 이는 종래의 회로와 같은 작용이 되므로 구체적인 설명은 생략된다.Subsequently, the parallel / serial converter 2 stores the character signals D 0 -D 7 as shown in FIG. 6g, which are the remaining data supplied from the character generator 1, according to the clock CCLK as shown in FIG. 6b. Since the same operation as the conventional circuit, a detailed description is omitted.

클록(CCLK)이 하이에서 로우로 변하게 되면 최후의 도트에 해당하는 문자신호(D7)가 D플립플롭(3)의 입력단자(D)에 가해지고, 플립플롭(3)은 클록이 입력되면 이를 래치하게 된다.When the clock CCLK changes from high to low, the character signal D 7 corresponding to the last dot is applied to the input terminal D of the D flip-flop 3, and the flip-flop 3 is clocked. When is input, it latches.

그런데 제2a도에서와 같이 문자신호(D7)는 문자사이의 간격을 두기 위한 로우(논리 'O')이다.However, as shown in FIG. 2A, the character signal D 7 is a row (logical 'O') for spacing the characters.

따라서 클록(CCLK)이 반전기(3)를 통해 D플립플롭(3)에 입력되면 출력(Q)은 "O"이 되어 병렬/직렬변환기(2)에 클록(CCLK)이 입력되었을때 "O"신호가 입력단자(VD0)에 입력되어 제5도에서와 같은 간격신호(D'7)가 발생되는 것이다.Therefore, when the clock CCLK is input to the D flip-flop 3 through the inverter 3, the output Q becomes "O", and when the clock CCLK is input to the parallel / serial converter 2, "O". The signal is input to the input terminal VD 0 to generate the interval signal D ' 7 as shown in FIG.

본 고안에서 클록은 서로 반전된 것이므로 병렬/직렬변환기(2)에 입력될때와 D플립플롭(3)에 입력될때에 시간차가 있으므로 이전에 표시되는 문자신호(D7)가 다음에 표시되는 문자를 위한 간격신호(D'7)로서 입력단자(VD0)에 공급될 수 있게 되는 것이다. 이와 같은 작용에 따른 신호의 파형도는 제6도에 도시된 바와 같다. 그리고 문자발생기(1)내에 기억된 문자의 형태가 제2b도와 같은 경우에는 문자발생기(1)의 출력단자(D0―D7)를 각각 병렬/직렬변환기(2)의 입력단자(VD8―VD1)에 연결하고, D플립플롭(3)의 입력단자(D)를 출력단자(D0)에 연결하면 위에서 설명된 바와 같이 간격신호(D'0)가 발생되어 화면 우측외곽선과 간격을 유지하여 상기한 바와 동일한 효과를 얻을 수 있는 것이다.Clock in this invention Since are inverted from each other, there is a time difference between the input to the parallel / serial converter 2 and the input to the D flip-flop 3, so that the previously displayed character signal D 7 is the interval signal for the next displayed character ( D ' 7 ) can be supplied to the input terminal (VD 0 ). The waveform diagram of the signal according to such an operation is as shown in FIG. If the type of the characters stored in the character generator 1 is the same as that of FIG. 2b, the output terminals D 0 -D 7 of the character generator 1 are respectively input to the input terminals VD 8 -of the parallel / serial converter 2. VD 1 ) and connecting the input terminal D of the D-flop flop 3 to the output terminal D 0 generates a gap signal D ' 0 as described above to adjust the gap between the right edge of the screen and the gap. It is possible to obtain the same effect as described above.

이와 같이 본 고안에 의하면 화면에 문자가 표시될때 화면 외곽선에 붙지 않아서 확실하게 문자를 구분할 수 있게 되는 것이다.As such, according to the present invention, when a character is displayed on the screen, the character does not stick to the screen outline so that the character can be clearly distinguished.

Claims (1)

문자발생기 출력을 병렬/직렬변환기 입력에 연결하여된 것에 있어서, 문자발생기(1)의 출력단자(D0―D7)는 병렬/직렬변환기(2)의 입력단자(VD1―VD8)에 연결하되, 출력단자(D7)는 수평동기신호(H-sync)가 클리어신호로 입력되는 D플립플롭(3)의 입력단자(D)에 연결하고, D플립플롭(3)의 출력단자(Q)는 병렬/직렬변환기(2)의 입력단자(VD0)에 연결하며, 클록단자(CK)는 반전기(4)를 통해 클록(CCLK)이 입력되도록 하여서 된 문자표시장치의 문자간격 신호발생장치.By connecting the character generator output to the parallel / serial converter input, the output terminals D 0 -D 7 of the character generator 1 are connected to the input terminals VD 1 -VD 8 of the parallel / serial converter 2. Output terminal (D 7 ) is connected to the input terminal (D) of the D flip-flop (3), the horizontal synchronous signal (H-sync) is input as a clear signal, and the output terminal (D) of the D flip-flop (3) Q) is connected to the input terminal VD 0 of the parallel / serial converter 2, and the clock terminal CK is a character interval signal of the character display device which is configured to allow the clock CCLK to be input through the inverter 4. Generator.
KR2019850018087U 1985-12-30 1985-12-30 Letter-space of signal generation device for letter locating KR890002298Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019850018087U KR890002298Y1 (en) 1985-12-30 1985-12-30 Letter-space of signal generation device for letter locating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019850018087U KR890002298Y1 (en) 1985-12-30 1985-12-30 Letter-space of signal generation device for letter locating

Publications (2)

Publication Number Publication Date
KR870010918U KR870010918U (en) 1987-07-15
KR890002298Y1 true KR890002298Y1 (en) 1989-04-15

Family

ID=19247707

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019850018087U KR890002298Y1 (en) 1985-12-30 1985-12-30 Letter-space of signal generation device for letter locating

Country Status (1)

Country Link
KR (1) KR890002298Y1 (en)

Also Published As

Publication number Publication date
KR870010918U (en) 1987-07-15

Similar Documents

Publication Publication Date Title
EP0157701A2 (en) Phase synchronization circuit
US4468662A (en) Display apparatus for displaying characters or graphics on a cathode ray tube
KR920000455B1 (en) Interface apparatus
US3648272A (en) Arrangement for proportioning actively or passively light-radiating surfaces
US4720803A (en) Display control apparatus for performing multicolor display by tiling display
EP0250713A3 (en) Character generator-based graphics apparatus
KR890002298Y1 (en) Letter-space of signal generation device for letter locating
EP0125768A2 (en) Method and apparatus for generating phase locked digital clock signals
KR880003262Y1 (en) Clock signal generator
JPH042958B2 (en)
KR920002108Y1 (en) Coordinate latching device on display of writepen for crt
KR910006338Y1 (en) Extended character display circuits by character generator
GB1159181A (en) Symbol Generator
KR840008158A (en) Synchronous Display
KR890007634Y1 (en) Clock production circuits for many fuction cathode ray tube
KR900006778Y1 (en) Divided circuit for crt control
KR880003605Y1 (en) Conversion circuit for a system clock
KR920004991Y1 (en) Control circuit of parallel synchronizing signal for flat display
KR880001442B1 (en) Video frequency reduction circiut
KR920006067B1 (en) A letter interpolation-circuit in osd apparatus
KR910005758Y1 (en) Over strike function generating device of laser printer
KR900004953B1 (en) Horizental and vertical syncronizing signal control circuit
KR900002793B1 (en) Video pattern selecting circuit for crt display of picture and character
JPH03136094A (en) Device for converting crt screen into different two-dimensional screen
KR860002145B1 (en) Picture cell array declining circuit of crt monitor

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19971229

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee