KR880006906A - Composite Synchronous Signal Separation and Digital Information of Composite Video Signal - Google Patents

Composite Synchronous Signal Separation and Digital Information of Composite Video Signal Download PDF

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Publication number
KR880006906A
KR880006906A KR860009555A KR860009555A KR880006906A KR 880006906 A KR880006906 A KR 880006906A KR 860009555 A KR860009555 A KR 860009555A KR 860009555 A KR860009555 A KR 860009555A KR 880006906 A KR880006906 A KR 880006906A
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KR
South Korea
Prior art keywords
circuit
signal
voltage
comparison
composite video
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Application number
KR860009555A
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Korean (ko)
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KR900004135B1 (en
Inventor
신명철
김영생
Original Assignee
강진구
삼성반도체통신주식회사
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Priority to KR1019860009555A priority Critical patent/KR900004135B1/en
Publication of KR880006906A publication Critical patent/KR880006906A/en
Application granted granted Critical
Publication of KR900004135B1 publication Critical patent/KR900004135B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Electronic Switches (AREA)
  • Synchronizing For Television (AREA)

Abstract

내용 없음No content

Description

합성동기신호 분리 및 합성비디오신호의 디지탈정보Composite Synchronous Signal Separation and Digital Information of Composite Video Signal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 집적회로의 블럭도.2 is a block diagram of an integrated circuit according to the present invention.

제3도는 본 발명에 따른 제2도의 구체회로도.3 is a detailed circuit diagram of FIG. 2 in accordance with the present invention.

제4도는 제3도의 구체회로도의 각부 파형도.4 is a waveform diagram of each part of the concrete circuit diagram of FIG.

Claims (1)

합성비디오신호에 포함된 디지탈정보신호 및 디지탈동기신호를 분리하는 집적회로에 있어서, 입력신호의 전력증폭을 위한 버퍼회로(1)와 입력된 신호의 고주파 부분을 제거하는 능동형 제1저주파필터(2)와 여파된 신호중 굴곡으로 나타나는 저주파의 동기신호 부분을 제거하는 샘플링회로(3)와, 상기 샘플링회로(3)에서 출력하는 전압으로 비교전압을 기억하는 기억회로(4)와, 상기 기억된 비교전압을 적절한 레벨의 전압으로 변환하고 샘플링 기간 동안 상기 비교전압을 유지하기 위한 고임피던스버퍼회로(5)가 상기 기억회로로부터 입력하는 상기 비교전압과 비디오신호의 데이터와 비교하는 비교회로(6)와 비교된 신호를 정당한 레벨의 데이터로 출력하는 제1드라이브회로(7)와, 디지탈동기신호 분리를 위해 합성비디오신호를 증폭하기 위한 증폭회로(8)와, 합성비디오신호 중 특정주파수인 동기신호를 선별하기 위한 공진회로(9)와, 공진회로 출력을 비교하기 위한 비교전압을 발생하는 비교전압 발생회로(10)와, 상기 비교전압에 따라 공진출력을 비교하는 비교기(11)와 비교된 출력을 적당한 레벨의 구형파로 출력하는 제2드라이브회로(12)와, 일정한 전압을 비교기(11)와 드라이브회로(7)(12)에 공급하는 정전압발생회로(13)와, 합성비디오신호중 수평동기신호만 통과시키는 제 2 저주파필터(14)와, 상기 수평동기신호에서만 오프동작을 하며 소정 레벨의 펄스를 출력하는 스위칭회로로된 합성동기 분리회로(15)로 구성됨으로 하는 회로.In an integrated circuit that separates a digital information signal and a digital synchronization signal included in a composite video signal, a buffer circuit for power amplification of an input signal and an active first low frequency filter for removing a high frequency portion of an input signal (2) ) And a sampling circuit (3) for removing a portion of the low frequency synchronization signal that appears as a bend among the filtered signals, a memory circuit (4) for storing a comparison voltage at a voltage output from the sampling circuit (3), and the stored comparison A comparison circuit 6 for comparing the comparison voltage input from the storage circuit with data of a video signal by a high impedance buffer circuit 5 for converting a voltage into a voltage of an appropriate level and maintaining the comparison voltage for a sampling period; A first drive circuit 7 for outputting the compared signal as a data of a legitimate level, and an amplifying circuit for amplifying a composite video signal for digital synchronization signal separation ( 8), a resonant circuit 9 for selecting a synchronous signal having a specific frequency among the composite video signals, a comparison voltage generating circuit 10 for generating a comparison voltage for comparing the output of the resonance circuit, and according to the comparison voltage The second drive circuit 12 outputting the output compared with the comparator 11 comparing the resonance output as a square wave of an appropriate level, and the constant voltage supplying a constant voltage to the comparator 11 and the drive circuits 7 and 12. A synthetic synchronous separation circuit comprising a generation circuit 13, a second low frequency filter 14 for passing only a horizontal synchronous signal of the composite video signal, and a switching circuit for outputting a pulse of a predetermined level by turning off only the horizontal synchronous signal ( A circuit composed of 15). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860009555A 1986-11-12 1986-11-12 Synchronize separating and video signal digital signal and digital synchronize separating ic KR900004135B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860009555A KR900004135B1 (en) 1986-11-12 1986-11-12 Synchronize separating and video signal digital signal and digital synchronize separating ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860009555A KR900004135B1 (en) 1986-11-12 1986-11-12 Synchronize separating and video signal digital signal and digital synchronize separating ic

Publications (2)

Publication Number Publication Date
KR880006906A true KR880006906A (en) 1988-07-25
KR900004135B1 KR900004135B1 (en) 1990-06-16

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Application Number Title Priority Date Filing Date
KR1019860009555A KR900004135B1 (en) 1986-11-12 1986-11-12 Synchronize separating and video signal digital signal and digital synchronize separating ic

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Publication number Publication date
KR900004135B1 (en) 1990-06-16

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