KR880006909A - Integrated circuit for digital information signal separation and digital synchronization signal separation included in composite video signal - Google Patents
Integrated circuit for digital information signal separation and digital synchronization signal separation included in composite video signal Download PDFInfo
- Publication number
- KR880006909A KR880006909A KR860009665A KR860009665A KR880006909A KR 880006909 A KR880006909 A KR 880006909A KR 860009665 A KR860009665 A KR 860009665A KR 860009665 A KR860009665 A KR 860009665A KR 880006909 A KR880006909 A KR 880006909A
- Authority
- KR
- South Korea
- Prior art keywords
- circuit
- voltage
- signal
- composite video
- video signal
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명의 집적회로의 블럭도.1 is a block diagram of an integrated circuit of the present invention.
제2도는 본 발명에 따른 제1도의 블럭도의 구체회로도.2 is a detailed circuit diagram of the block diagram of FIG. 1 according to the present invention;
제3도는 제2도의 구체회로도의 각부의 동작파형도.3 is an operational waveform diagram of each part of the concrete circuit diagram of FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 버퍼회로 2 : 저주파 필터1: Buffer circuit 2: Low frequency filter
3 : 샘플링회로 4 : 기억회로3: sampling circuit 4: memory circuit
5 : 임피던스 버퍼회로 6 : 비교회로5: impedance buffer circuit 6: comparison circuit
7 : 제1드라이브회로 8 : 증폭기7: first drive circuit 8: amplifier
9 : 공진회로 10 : 비교 전압 발생회로9 resonant circuit 10 comparison voltage generating circuit
11 : 비교기 12 : 제2드라이브회로11: comparator 12: second drive circuit
13 : 정전압 발생회로13: constant voltage generating circuit
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019860009665A KR890004062B1 (en) | 1986-11-15 | 1986-11-15 | Integral circuits for separating digital signals from complete video signals |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019860009665A KR890004062B1 (en) | 1986-11-15 | 1986-11-15 | Integral circuits for separating digital signals from complete video signals |
Publications (2)
Publication Number | Publication Date |
---|---|
KR880006909A true KR880006909A (en) | 1988-07-25 |
KR890004062B1 KR890004062B1 (en) | 1989-10-18 |
Family
ID=19253405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860009665A KR890004062B1 (en) | 1986-11-15 | 1986-11-15 | Integral circuits for separating digital signals from complete video signals |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR890004062B1 (en) |
-
1986
- 1986-11-15 KR KR1019860009665A patent/KR890004062B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR890004062B1 (en) | 1989-10-18 |
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Payment date: 20040331 Year of fee payment: 16 |
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