KR870010533A - 디지탈신호기의 전송장치 - Google Patents

디지탈신호기의 전송장치 Download PDF

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Publication number
KR870010533A
KR870010533A KR870003482A KR870003482A KR870010533A KR 870010533 A KR870010533 A KR 870010533A KR 870003482 A KR870003482 A KR 870003482A KR 870003482 A KR870003482 A KR 870003482A KR 870010533 A KR870010533 A KR 870010533A
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KR
South Korea
Prior art keywords
digital signal
input digital
signal
transition
state
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Application number
KR870003482A
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English (en)
Inventor
다케오 에구치
Original Assignee
오가 노리오
소니 가부시키가이샤
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Publication date
Application filed by 오가 노리오, 소니 가부시키가이샤 filed Critical 오가 노리오
Publication of KR870010533A publication Critical patent/KR870010533A/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10046Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
    • G11B20/10212Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter compensation for data shift, e.g. pulse-crowding effects
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Digital Magnetic Recording (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)

Abstract

내용 없음

Description

디지탈신호의 전송장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본원 발명의 실시예에 의한 디지탈 신호의 전송장치를 나타내는 개략적인 블록도.
제2도는 본원 발명의 실시예에 의한 디지탈 신호의 전송장치를 나타내는 상세회로도.
제3A도 내지 제3G도는 제2도의 회로의 동작을 설명하기 위한 타임차트.

Claims (3)

  1. 제1상태와 제2상태 상이에 천이를 가진 입력디지털신호를 수신하는 수단과,
    상기 입력디지탈신호의 상기 천이 상이의 주행길이를 검출하여, 검출신호를 발생하는 수단과,
    상기 검출신호에 의하여 상기 입력디지탈신호의 상기 천이의 위상을 제어하는 수단으로 이루어지는 것을 특징으로 하는 디지털 신호의 전송장치.
  2. 제1항에 있어서, 상기 입력디지탈신호의 천이의 위상을 제어하는 상기 수단은,
    상기 입력디지탈신호의 샘플링 클록신호에 동기하여 상기 입력디지탈신호를 레치하는 수단과,
    상기 제1상태의 상기 주행길이에 따라서 상기 입력디지탈신호의 위상에 상기 클록신호의 위상을 전진시키는 수단으로 이루어지는 디지털 신호의 전송장치.
  3. 제1상태와 제2상태 사이에 천이를 가진 입력디지탈신호를 수신하는 수단과,
    상기 입력신호의 상기 천이 사이의 주행길이를 검출하며, 검출신호를 발생하는 수단과,
    상기 입력디지탈신호의 극을 검출하는 수단과,
    왜곡보정데이터를 발생하는 수단과,
    보정왜곡신호를 발생하는 수단과,
    상기 입력디지탈신호에 상기 보정왜곡을 부가시키는 수단으로 이루어지는 디지털 신호의 전송장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR870003482A 1986-04-12 1987-04-11 디지탈신호기의 전송장치 KR870010533A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61084609A JP2540805B2 (ja) 1986-04-12 1986-04-12 ディジタル信号の伝送装置
JP84609 1986-04-12

Publications (1)

Publication Number Publication Date
KR870010533A true KR870010533A (ko) 1987-11-30

Family

ID=13835433

Family Applications (1)

Application Number Title Priority Date Filing Date
KR870003482A KR870010533A (ko) 1986-04-12 1987-04-11 디지탈신호기의 전송장치

Country Status (6)

Country Link
US (1) US4787094A (ko)
EP (1) EP0242166A3 (ko)
JP (1) JP2540805B2 (ko)
KR (1) KR870010533A (ko)
AU (1) AU597960B2 (ko)
CA (1) CA1286399C (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0771118B2 (ja) * 1989-12-27 1995-07-31 三菱電機株式会社 変調装置
US5214641A (en) * 1989-02-08 1993-05-25 Silicon Systems, Inc. Mixed analog digital secondary channel FSK modem
SE465494B (sv) * 1990-01-22 1991-09-16 Ericsson Telefon Ab L M Foerfarande att kompensera foer olineariteter i en slutfoerstaerkare
US4964107A (en) * 1990-03-14 1990-10-16 International Business Machines Corporation Relative timing precompensation of high-speed pulse signals for digital magnetic recoding
FR2692090B1 (fr) * 1992-06-04 1994-07-22 Cit Alcatel Procede d'allocation de frequences porteuses pour la transmission simultanee, notamment sur une liaison optique, d'une pluralite de signaux modules.
US5911115A (en) * 1995-03-31 1999-06-08 Intel Corporation Data transmission over amps networks
DE10045981B4 (de) * 2000-09-16 2006-11-23 Phoenix Contact Gmbh & Co. Kg Nachbarimpulsvariante Signalvorverzerrung
EP1747667A1 (en) * 2004-05-20 2007-01-31 Thomson Licensing Apparatus and method for canceling distortion
US7620121B1 (en) 2004-12-09 2009-11-17 Xilinx, Inc. DC balance compensation for AC-coupled circuits

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242015A (en) * 1975-09-29 1977-04-01 Fuji Xerox Co Ltd Run length code processing method for facsimile signal
JPS5261424A (en) * 1975-11-17 1977-05-20 Olympus Optical Co Ltd Encode system
JPS5357013A (en) * 1976-11-02 1978-05-24 Nec Corp Digital type magnetic recording system
JPS5422514U (ko) * 1977-07-15 1979-02-14
JPS56165910A (en) * 1980-05-24 1981-12-19 Sony Corp Recording method of binary signal
JPS593714A (ja) * 1982-06-30 1984-01-10 Comput Basic Mach Technol Res Assoc 磁気記録変調回路
US4498021A (en) * 1982-07-13 1985-02-05 Matsushita Electric Industrial Co., Ltd. Booster for transmitting digital signal
JPS5946050A (ja) * 1982-09-09 1984-03-15 Narumi China Corp 半導体用セラミツクパツケ−ジ
JPS5956208A (ja) * 1982-09-27 1984-03-31 Fujitsu Ltd 変調回路
JPS5977607A (ja) * 1982-10-27 1984-05-04 Hitachi Ltd 記録タイミング補正方式
JPS6047213A (ja) * 1983-08-26 1985-03-14 Nec Corp 記録タイミング補正方式
IT1206332B (it) * 1983-10-25 1989-04-14 Honeywell Inf Systems Apparato digitale per sistema di recupero di informazioni binarie registrate su supporti magnetici.
JPS61222072A (ja) * 1985-03-26 1986-10-02 Sharp Corp デイジタル磁気記録再生装置
JPH0619912B2 (ja) * 1985-06-18 1994-03-16 シャープ株式会社 デジタル磁気記録再生装置

Also Published As

Publication number Publication date
EP0242166A3 (en) 1988-12-14
JPS62239743A (ja) 1987-10-20
EP0242166A2 (en) 1987-10-21
JP2540805B2 (ja) 1996-10-09
CA1286399C (en) 1991-07-16
US4787094A (en) 1988-11-22
AU597960B2 (en) 1990-06-14
AU7137487A (en) 1987-10-15

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