KR840008532A - Method for manufacturing high frequency power device by selective silicon growth - Google Patents

Method for manufacturing high frequency power device by selective silicon growth Download PDF

Info

Publication number
KR840008532A
KR840008532A KR1019830001791A KR830001791A KR840008532A KR 840008532 A KR840008532 A KR 840008532A KR 1019830001791 A KR1019830001791 A KR 1019830001791A KR 830001791 A KR830001791 A KR 830001791A KR 840008532 A KR840008532 A KR 840008532A
Authority
KR
South Korea
Prior art keywords
type impurity
impurity layer
frequency power
power device
high frequency
Prior art date
Application number
KR1019830001791A
Other languages
Korean (ko)
Other versions
KR880000669B1 (en
Inventor
김도식
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019830001791A priority Critical patent/KR880000669B1/en
Publication of KR840008532A publication Critical patent/KR840008532A/en
Application granted granted Critical
Publication of KR880000669B1 publication Critical patent/KR880000669B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Pressure Sensors (AREA)

Abstract

내용 없음.No content.

Description

선택 실리콘 성장에 의한 고주파용 파우워 소자의 제조방법Method for manufacturing high frequency power device by selective silicon growth

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A∼제1M도는 종래의 고주파용 파우워 소자의 제조공정도1A to 1M are manufacturing process diagrams of a conventional high frequency power element.

제2도는 제1H도-제1J도의 설명도FIG. 2 is an explanatory diagram of FIGS. 1H-1J

제3A도∼제3I도는 본 발명에 따른 고주파용 파우워 소자의 제조공정도3A to 3I are manufacturing process diagrams of a high frequency power device according to the present invention.

Claims (1)

고농도 N형 실리콘(1) 기판상에 저농도 N형 불순물의 에피택셜층(2)을 성장시키고 고농도 P형 불순물층(4a,4b)를 확산시키며 저농도 N형 불순물층(5)을 형성시키고 고농도 N형 불순물층(6)을 확산시켜 제조하는 고주파용 파우워 개별소자의 제조방법에 있어서 상기 저농도 N형 불순물층(2)와 상기 고농도 P형 불순물층(4b)상에 저농도 N형 불순물층(5)를 선택성장시키고 상기 저농도 N형 불순물층(5)상에 고농도 N형 불순물층을 확산시켜 전극(7,8,9)을 인출함을 특징으로 하는 선택실리콘 성장에 의한 고주파용 파우워 소자의 제조방법.The epitaxial layer 2 of low concentration N-type impurities is grown on the high concentration N-type silicon 1 substrate, the high concentration P-type impurity layers 4a and 4b are diffused, and the low concentration N-type impurity layer 5 is formed, and the high concentration N-type impurity layer 5 is formed. In the manufacturing method of the high frequency power individual element manufactured by diffusing the type impurity layer 6, the low concentration N type impurity layer 5 on the low concentration N type impurity layer 2 and the high concentration P type impurity layer 4b. Of the high-frequency power device by selective silicon growth, characterized in that it selectively grows) and diffuses a high concentration N-type impurity layer on the low concentration N-type impurity layer (5) to draw electrodes (7, 8, 9). Manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019830001791A 1983-04-27 1983-04-27 High frequency power device manufacturing process by partial silicon growth KR880000669B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019830001791A KR880000669B1 (en) 1983-04-27 1983-04-27 High frequency power device manufacturing process by partial silicon growth

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019830001791A KR880000669B1 (en) 1983-04-27 1983-04-27 High frequency power device manufacturing process by partial silicon growth

Publications (2)

Publication Number Publication Date
KR840008532A true KR840008532A (en) 1984-12-15
KR880000669B1 KR880000669B1 (en) 1988-04-20

Family

ID=19228773

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019830001791A KR880000669B1 (en) 1983-04-27 1983-04-27 High frequency power device manufacturing process by partial silicon growth

Country Status (1)

Country Link
KR (1) KR880000669B1 (en)

Also Published As

Publication number Publication date
KR880000669B1 (en) 1988-04-20

Similar Documents

Publication Publication Date Title
KR890013746A (en) Bipolar transistor and method of manufacturing the same
KR900017110A (en) Manufacturing Method of Semiconductor Device
KR890016626A (en) Semiconductor device
KR970054357A (en) Semiconductor device and manufacturing method
KR920017269A (en) Fabrication method of bipolar transistor of Laterally Graded Emitter (LGE) structure using polysilicon refill method
KR840008532A (en) Method for manufacturing high frequency power device by selective silicon growth
JPS55165669A (en) Bipolar-mos device
JPS5771164A (en) Semiconductor device
KR870002666A (en) Manufacturing Method of Semiconductor Device
JPS5613761A (en) Preparation of semiconductor device
JPS56114367A (en) Semiconductor device
JPS55102263A (en) Semiconductor integrated circuit
KR840004307A (en) Longitudinal current chisel integrated master logic device coexisting with linear element and manufacturing method thereof
KR840009371A (en) Semiconductor device
KR870009485A (en) Integrated circuit manufacturing method
JPS57133670A (en) Structure of lateral transistor
KR900001030A (en) High voltage semiconductor device and manufacturing method thereof
JPS55145339A (en) Photo semiconductor device and its manufacture
KR880003431A (en) Manufacturing Method of I²L Device
JPS5533010A (en) Semiconductor integrated circuit
JPS5546584A (en) Complementary insulated gate field effect semiconductor device and method of fabricating the same
JPS5527617A (en) Semiconductor device manufacturing method
JPS6442123A (en) Manufacture of semiconductor device
KR920017270A (en) Fabrication method of bipolar transistor of Laterally Graded Emitter (LGE) structure using polycrystalline silicon side wall
KR890013792A (en) Semiconductor device and manufacturing method

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030307

Year of fee payment: 16

EXPY Expiration of term