KR840004307A - Longitudinal current chisel integrated master logic device coexisting with linear element and manufacturing method thereof - Google Patents

Longitudinal current chisel integrated master logic device coexisting with linear element and manufacturing method thereof Download PDF

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Publication number
KR840004307A
KR840004307A KR1019830001145A KR830001145A KR840004307A KR 840004307 A KR840004307 A KR 840004307A KR 1019830001145 A KR1019830001145 A KR 1019830001145A KR 830001145 A KR830001145 A KR 830001145A KR 840004307 A KR840004307 A KR 840004307A
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South Korea
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type
layer
impurity layer
type impurity
logic device
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KR1019830001145A
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Korean (ko)
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KR860000254B1 (en
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임순권
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강진구
삼성반도체통신 주식회사
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Priority to KR1019830001145A priority Critical patent/KR860000254B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

내용 없음No content

Description

선형소자와 공존하는 종방향 전류 주임형 집적주임논리 소자 및 그 제조방법Longitudinal current chisel integrated master logic device coexisting with linear element and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제9도는 본발명에 따른 단면공정도,9 is a cross-sectional process diagram according to the present invention,

제10도는 본 발명에 따라 제조된 선형소자와 공존하는 종방향 전류 주입형 집적주입 논리소자의 리시도.10 is a view of a longitudinal current injection integrated injection logic device coexisting with a linear device fabricated in accordance with the present invention.

Claims (3)

P형 기판상에 고능도 N형 매몰층과 상기 고능도 N형 매몰층상에 N형 에피택셜층과 P형 불순물층 및 N형 불순물층을 형성시키는 선형소자와 공존하는 집적주입 논리소자의 제조방법에 있어서 P형 기판(10)상에 고능도 N형 매몰층(11)을 확산하고 상기 고능도 N형 매몰층(11)상에 P형 인잭터 레일(12)과 N형 불순몰층(13)상에 N형 에피택셜층(14)를 성장시키고 상기 에피택셜층(14)상에 P형 불순물층(16)을 확산하며 상기 P형 불순물층(16)중 상기 N형 불순물층(13)의 상부에 고종도 N형 불순물층을 확산시킴을 특징으로 하는 선형소자와 공존하는 종방향 전류 주입형 집적 주입논리소자의 제조방법.A manufacturing method of an integrated injection logic device coexisting with a linear device for forming an N-type epitaxial layer, a P-type impurity layer, and an N-type impurity layer on a high-performance N-type buried layer on a P-type substrate Diffuses the high-performance N-type buried layer 11 on the P-type substrate 10 and the P-type injector rail 12 and the N-type impurity layer 13 on the high-performance N-type buried layer 11. The N-type epitaxial layer 14 is grown on the epitaxial layer 14, and the P-type impurity layer 16 is diffused on the epitaxial layer 14 and the N-type impurity layer 13 of the P-type impurity layer 16 is formed. A method for manufacturing a longitudinal current injection type integrated injection logic device coexisting with a linear device, characterized by diffusing a high-concentration N-type impurity layer thereon. 제1항에 있어서 N형 불순물층(13)을 이온 주입방식으로 형성시킴을 특징으로 하는 선형소자와 공존하는 종방향 전류주입형 집적주입 논리소자의 제조방법.The method of manufacturing a longitudinal current injection type integrated injection logic device according to claim 1, wherein the N-type impurity layer (13) is formed by an ion implantation method. P형 기판상에 고농도 N형 매몰층과 상기 고농도 N형 매몰층상에 N형 에피택셜층과 P형 불순물층 및 N형 불순물층을 형성시켜 제조하는 선형소자와 공존하는 집적주입 논리소자에 있어서 P형 기판(10)상에 고농도 N형 매몰층(11)을 확산시키고 상기 고농도 N형 매몰층 (11)상에 P형 에형인잭터레일 (12)을 확산시키고 N형 불순물층 (13)을 형성시키며 상기 P형 인잭터레일(12)과 N형 불순물층(13)상에 N형 에피택셜층(14)을 성장시키고 상기 에피택셜층(14)상에 P형 불순물층(16)을 확산하며 상기 P형 불순물층(16)중 상기 N형 불순물층(13)의 상부에 고농도 N형 불순물층을 확산시켜 매몰된 P형 인잭터레일(12)과 N형 에피택셜층(14) 및 P형 불순물층(16)으로 구성되는 종방향 전류주입형 PNP 트랜지스터가 구성됨을 특징으로 하는 선형소자와 공존하는 종방향 전류주입형 집적주입 논리소자.In an integrated injection logic device coexisting with a linear device fabricated by forming an N-type epitaxial layer, a P-type impurity layer and an N-type impurity layer on a high concentration N-type buried layer and a high concentration N-type buried layer on a P-type substrate, The high concentration N-type buried layer 11 is diffused on the type substrate 10, the P type etch injector rail 12 is diffused on the high concentration N-type buried layer 11, and the N type impurity layer 13 is formed. The N-type epitaxial layer 14 is grown on the P-type injector rail 12 and the N-type impurity layer 13, and the P-type impurity layer 16 is diffused on the epitaxial layer 14. The P-type injector rail 12, the N-type epitaxial layer 14, and the P-type embedded in the P-type impurity layer 16 are buried by diffusing a high concentration N-type impurity layer on the N-type impurity layer 13. Longitudinal current injection type coexist with linear element, characterized in that a longitudinal current injection type PNP transistor composed of impurity layer 16 is constructed Input logic element. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019830001145A 1983-03-22 1983-03-22 Length derection current integrated injection logic element and manufaturing method KR860000254B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019830001145A KR860000254B1 (en) 1983-03-22 1983-03-22 Length derection current integrated injection logic element and manufaturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019830001145A KR860000254B1 (en) 1983-03-22 1983-03-22 Length derection current integrated injection logic element and manufaturing method

Publications (2)

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KR840004307A true KR840004307A (en) 1984-10-10
KR860000254B1 KR860000254B1 (en) 1986-03-21

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