KR830003767A - Multi-processor control method - Google Patents

Multi-processor control method Download PDF

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Publication number
KR830003767A
KR830003767A KR1019800003135A KR800003135A KR830003767A KR 830003767 A KR830003767 A KR 830003767A KR 1019800003135 A KR1019800003135 A KR 1019800003135A KR 800003135 A KR800003135 A KR 800003135A KR 830003767 A KR830003767 A KR 830003767A
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KR
South Korea
Prior art keywords
processor
control method
processor control
clock signal
issued
Prior art date
Application number
KR1019800003135A
Other languages
Korean (ko)
Other versions
KR830002853B1 (en
Inventor
겐지 시오다
Original Assignee
요시야마 히로기찌
가부시기 가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 요시야마 히로기찌, 가부시기 가이샤 히다찌세이사꾸쇼 filed Critical 요시야마 히로기찌
Priority to KR1019800003135A priority Critical patent/KR830002853B1/en
Publication of KR830003767A publication Critical patent/KR830003767A/en
Application granted granted Critical
Publication of KR830002853B1 publication Critical patent/KR830002853B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

내용 없음No content

Description

멀티 프로세서(multi-processor)제어방식Multi-processor control method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 관계되는 멀티프로세서 시스템의 1예를 나타낸 개략 블럭도. 제2도는 본 발명을 실시한 I/O컨트로울러의 1예의 상세한 블럭도이다.1 is a schematic block diagram showing an example of a multiprocessor system according to the present invention; 2 is a detailed block diagram of an example of an I / O controller according to the present invention.

Claims (1)

공통의 클록신호에 의해 동작하는 복수의 프로세서를 가진 멀티프로세서 시스템에 있어서, 메인프로세서로서의 프로세서로부터 로칼 프로세서의 다른 프로세서에 대하여 입출력 명령을 발행할때, 후자의 프로세서로의 클록 신호의 공급을 일시적으로 정지하는 것을 특징으로하는 멀티 프로세서 제어방식.In a multiprocessor system having a plurality of processors operating by a common clock signal, when the I / O instruction is issued from the processor as the main processor to another processor of the local processor, the supply of the clock signal to the latter processor is temporarily stopped. Multi-processor control method characterized in that the stop. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019800003135A 1980-08-07 1980-08-07 Multi-processor control method KR830002853B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019800003135A KR830002853B1 (en) 1980-08-07 1980-08-07 Multi-processor control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019800003135A KR830002853B1 (en) 1980-08-07 1980-08-07 Multi-processor control method

Publications (2)

Publication Number Publication Date
KR830003767A true KR830003767A (en) 1983-06-22
KR830002853B1 KR830002853B1 (en) 1983-12-27

Family

ID=19217375

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019800003135A KR830002853B1 (en) 1980-08-07 1980-08-07 Multi-processor control method

Country Status (1)

Country Link
KR (1) KR830002853B1 (en)

Also Published As

Publication number Publication date
KR830002853B1 (en) 1983-12-27

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