KR20240140160A - 지지 기판 상에 박막을 전사하는 방법 - Google Patents

지지 기판 상에 박막을 전사하는 방법 Download PDF

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Publication number
KR20240140160A
KR20240140160A KR1020247029081A KR20247029081A KR20240140160A KR 20240140160 A KR20240140160 A KR 20240140160A KR 1020247029081 A KR1020247029081 A KR 1020247029081A KR 20247029081 A KR20247029081 A KR 20247029081A KR 20240140160 A KR20240140160 A KR 20240140160A
Authority
KR
South Korea
Prior art keywords
thin film
temperature
substrate
transferring
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
KR1020247029081A
Other languages
English (en)
Korean (ko)
Inventor
디디에 랑드뤼
모하메드 나디아 벤
올레그 코논추크
프레데릭 마젠
헬렌 그램페이스
Original Assignee
소이텍
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 소이텍 filed Critical 소이텍
Publication of KR20240140160A publication Critical patent/KR20240140160A/ko
Pending legal-status Critical Current

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Classifications

    • H01L21/76254
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • H10P10/12Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H01L21/187
    • H01L21/324
    • H01L21/68785
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • H10P54/50Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving
    • H10P54/52Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving by cleaving
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7624Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
KR1020247029081A 2022-01-31 2022-12-19 지지 기판 상에 박막을 전사하는 방법 Pending KR20240140160A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR2200842A FR3132384B1 (fr) 2022-01-31 2022-01-31 Procede de transfert d’une couche mince sur un substrat support
FRFR2200842 2022-01-31
PCT/EP2022/086726 WO2023143818A1 (fr) 2022-01-31 2022-12-19 Procede de transfert d'une couche mince sur un substrat support

Publications (1)

Publication Number Publication Date
KR20240140160A true KR20240140160A (ko) 2024-09-24

Family

ID=81325210

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020247029081A Pending KR20240140160A (ko) 2022-01-31 2022-12-19 지지 기판 상에 박막을 전사하는 방법

Country Status (8)

Country Link
US (1) US20250391704A1 (https=)
EP (1) EP4473553B1 (https=)
JP (1) JP2025504573A (https=)
KR (1) KR20240140160A (https=)
CN (1) CN118591862A (https=)
FR (1) FR3132384B1 (https=)
TW (1) TW202335092A (https=)
WO (1) WO2023143818A1 (https=)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6540827B1 (en) * 1998-02-17 2003-04-01 Trustees Of Columbia University In The City Of New York Slicing of single-crystal films using ion implantation
FR2839385B1 (fr) * 2002-05-02 2004-07-23 Soitec Silicon On Insulator Procede de decollement de couches de materiau

Also Published As

Publication number Publication date
US20250391704A1 (en) 2025-12-25
EP4473553C0 (fr) 2025-12-17
FR3132384A1 (fr) 2023-08-04
JP2025504573A (ja) 2025-02-12
FR3132384B1 (fr) 2024-01-12
CN118591862A (zh) 2024-09-03
WO2023143818A1 (fr) 2023-08-03
EP4473553B1 (fr) 2025-12-17
TW202335092A (zh) 2023-09-01
EP4473553A1 (fr) 2024-12-11

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P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

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D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000