JP2025504573A - 薄膜を支持基板上に転写するための方法 - Google Patents

薄膜を支持基板上に転写するための方法 Download PDF

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Publication number
JP2025504573A
JP2025504573A JP2024545103A JP2024545103A JP2025504573A JP 2025504573 A JP2025504573 A JP 2025504573A JP 2024545103 A JP2024545103 A JP 2024545103A JP 2024545103 A JP2024545103 A JP 2024545103A JP 2025504573 A JP2025504573 A JP 2025504573A
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JP
Japan
Prior art keywords
thin film
donor substrate
temperature
support substrate
transfer method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024545103A
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English (en)
Japanese (ja)
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JP2025504573A5 (https=
Inventor
ランドリュ ディディエ
ベン モハメッド ナディア
コノンチュク オレグ
マゼン フレデリック
グランペクス ヘレン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of JP2025504573A publication Critical patent/JP2025504573A/ja
Publication of JP2025504573A5 publication Critical patent/JP2025504573A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H10P54/50—Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving
    • H10P54/52—Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving by cleaving
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7624—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2024545103A 2022-01-31 2022-12-19 薄膜を支持基板上に転写するための方法 Pending JP2025504573A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR2200842 2022-01-31
FR2200842A FR3132384B1 (fr) 2022-01-31 2022-01-31 Procede de transfert d’une couche mince sur un substrat support
PCT/EP2022/086726 WO2023143818A1 (fr) 2022-01-31 2022-12-19 Procede de transfert d'une couche mince sur un substrat support

Publications (2)

Publication Number Publication Date
JP2025504573A true JP2025504573A (ja) 2025-02-12
JP2025504573A5 JP2025504573A5 (https=) 2025-10-01

Family

ID=81325210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024545103A Pending JP2025504573A (ja) 2022-01-31 2022-12-19 薄膜を支持基板上に転写するための方法

Country Status (8)

Country Link
US (1) US20250391704A1 (https=)
EP (1) EP4473553B1 (https=)
JP (1) JP2025504573A (https=)
KR (1) KR20240140160A (https=)
CN (1) CN118591862A (https=)
FR (1) FR3132384B1 (https=)
TW (1) TW202335092A (https=)
WO (1) WO2023143818A1 (https=)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6540827B1 (en) * 1998-02-17 2003-04-01 Trustees Of Columbia University In The City Of New York Slicing of single-crystal films using ion implantation
FR2839385B1 (fr) * 2002-05-02 2004-07-23 Soitec Silicon On Insulator Procede de decollement de couches de materiau

Also Published As

Publication number Publication date
US20250391704A1 (en) 2025-12-25
EP4473553C0 (fr) 2025-12-17
FR3132384A1 (fr) 2023-08-04
FR3132384B1 (fr) 2024-01-12
CN118591862A (zh) 2024-09-03
WO2023143818A1 (fr) 2023-08-03
EP4473553B1 (fr) 2025-12-17
TW202335092A (zh) 2023-09-01
KR20240140160A (ko) 2024-09-24
EP4473553A1 (fr) 2024-12-11

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