KR20230069406A - Producing method of mask integrated frame and mask integrated frame - Google Patents

Abstract

The present invention relates to a producing method of a frame-integrated mask and a frame-integrated mask. The producing method of a frame-integrated mask, according to the present invention, is used in an OLED pixel formation process and has a mask and a frame supporting the mask integrated therewith. The producing method of the frame-integrated mask comprises: a step (a) of preparing a mask support template having a mask metallic film and a template adhering thereto, wherein the mask metallic film has a first mask pattern, with a predetermined depth on a second surface facing a first surface adhering to the template, formed thereon; a step (b) of corresponding the second surface of the mask metallic film to the frame and adhering at least part of a dummy unit, except for a mask cell unit having the first mask pattern formed, to the frame; a step (c) of separating the template from the mask metallic film; and a step (d) of reducing a thickness of the mask cell unit on the first surface of the mask metallic film to expose the first mask pattern to the first surface. Accordingly, the present invention can implement ultra-high definition pixel of the micro-display.

Description

Manufacturing method of frame integrated mask and frame integrated mask {PRODUCING METHOD OF MASK INTEGRATED FRAME AND MASK INTEGRATED FRAME}

The present invention relates to a method for manufacturing a frame-integrated mask and a frame-integrated mask. More specifically, it relates to a method for manufacturing a frame-integrated mask, which is used when forming pixels on a silicon wafer, and which can precisely form an ultra-high resolution mask pattern, and a frame-integrated mask.

As a technology for forming pixels in the OLED manufacturing process, the FMM (Fine Metal Mask) method, which deposits organic materials on a desired location by attaching a thin metal shadow mask to the substrate, is mainly used.

In the existing OLED manufacturing process, after manufacturing a mask thin film, the mask is welded and fixed to the OLED pixel deposition frame for use, but there was a problem that the large area mask was not well aligned during the fixing process. In addition, in the process of welding fixing to the frame, the thickness of the mask film is too thin and the mask has a large area, so there is a problem that the mask is sagging or twisted by a load.

In the ultra-high-definition OLED manufacturing process, even a microscopic alignment error of several micrometers can lead to pixel deposition failure, so it is necessary to develop a technology that can prevent deformation such as sagging or twisting the mask and clarify alignment. am.

Meanwhile, recently, a micro display applied to a virtual reality (VR) device is attracting attention. In order to display an image right in front of a user's eyes in a VR device, the micro display must have a smaller screen size than existing displays and implement high definition within a small screen. Therefore, a mask pattern smaller in size than a mask used in a conventional ultra-high-definition OLED manufacturing process and finer alignment of the mask before a pixel deposition process are required.

Accordingly, the present invention has been made to solve the various problems of the prior art as described above, and to provide a method of manufacturing a frame-integrated mask and a frame-integrated mask capable of implementing ultra-high-definition pixels of a micro display. The purpose.

Another object of the present invention is to provide a method for manufacturing a frame-integrated mask and a frame-integrated mask capable of improving pixel deposition stability by clearly aligning the mask.

However, these tasks are illustrative, and the scope of the present invention is not limited thereby.

The above object of the present invention is a method for manufacturing a frame-integrated mask used in an OLED pixel formation process, in which a mask and a frame supporting the mask are integrally formed, (a) a mask support template to which a mask metal film and a template are bonded. preparing, wherein a first mask pattern having a predetermined depth is formed on a second surface of the mask metal film opposite to the first surface bonded to the template; (b) making the second surface of the mask metal film correspond to the frame and attaching at least a portion of the dummy part to the frame except for the mask cell part where the first mask pattern is formed; (c) separating the template from the mask metal layer; (d) exposing the first mask pattern on the first surface by reducing the thickness of the mask cell portion on the first surface of the mask metal film;

In step (b), at least a portion of the dummy portion of the mask metal layer may be attached to the frame by laser welding.

Between the step (c) and the step (d), (c-2) forming an insulating portion on a surface of the mask metal layer except for the mask cell portion on the first surface; may be further included.

The insulating part may be formed by a spray coating method, and the insulating part may be formed on a surface of the mask metal film and a surface of the frame except for the mask cell part.

Between the step (c-2) and the step (d), (c-3) disposing a reduction support portion on the mask cell portion on the second surface; further comprising the reduction support portion, wherein the ( In step d), when the process of reducing the thickness of the mask cell portion on the first surface is performed, the mask cell portion on the second surface may be supported.

(e) removing the insulating part; may further include.

In the step (a), the first mask pattern may be formed to a depth of 3 μm to 15 μm without penetrating the mask metal layer in a thickness direction.

A thickness of the mask metal film before step (d) may be 20 μm to 50 μm, and a thickness of the mask cell portion of the mask metal film after step (d) may be 2 μm to 12 μm.

In step (d), the thickness of the mask cell portion may be reduced by at least one of wet etching and dry etching.

The thickness reduction of the mask cell portion may include a first thickness reduction using wet etching and a second thickness reduction using dry etching.

Between the step (c) and the step (d), (c-a) forming a second mask pattern having a greater width and a greater depth than the first mask pattern on the first surface of the mask metal film; And, the second mask pattern and the first mask pattern are connected so that the mask metal layer may pass through.

In step (d), the thickness of the second mask pattern may be reduced by reducing the thickness of the mask cell portion on the first surface of the mask metal layer.

In step (d), the thickness of the mask cell portion may be reduced until the thickness of the second mask pattern becomes smaller than the thickness of the first mask pattern.

The mask metal film has a circular shape, and the frame includes: a ring-shaped connecting frame attached to the mask metal film; and a support frame integrally connected to a lower portion of the connection frame and supporting the mask metal film and the connection frame.

And, the above object of the present invention, used in the OLED pixel forming process, a frame-integrated mask in which a mask and a frame supporting the mask are formed integrally, a mask including a first mask pattern; and a frame attached to at least a portion of the dummy portion excluding the mask cell portion where the first mask pattern is formed, wherein the mask cell portion has a thickness smaller than that of the dummy portion, and the mask cell portion has a thickness ranging from the same thickness as that of the dummy portion. This is achieved by a frame-integrated mask in which the first mask pattern passes through the mask cell portion in the thickness direction while being thinned by reduction.

An area of the mask cell portion may be larger than an area of a target substrate on which an OLED pixel is formed, and a space formed by a step difference between the dummy portion and the mask cell portion may be provided as an accommodation space of the target substrate.

The mask includes a second mask pattern having a greater width and thickness than the first mask pattern on top of the first mask pattern, and the second mask pattern and the first mask pattern are connected to pass through the mask cell portion in the thickness direction. can be in the form

According to the present invention configured as described above, there is an effect of implementing ultra-high-definition pixels of a micro display.

In addition, according to the present invention, there is an effect of improving the stability of pixel deposition by clearly aligning the mask.

Of course, the scope of the present invention is not limited by these effects.

1 is a schematic diagram showing a frame-integrated mask according to an embodiment of the present invention.
2 is a schematic diagram showing a mask portion of a frame-integrated mask according to an embodiment of the present invention.
3 is a schematic diagram illustrating a process of forming a mask pattern by wet etching both surfaces of a mask.
4 is a schematic diagram showing problems in performing the process of FIG. 3 .
5 and 6 are schematic views illustrating a process of manufacturing a frame-integrated mask according to an embodiment of the present invention.
7 is a schematic diagram showing a state in which a frame-integrated mask and a target substrate are in contact for OLED pixel deposition according to an embodiment of the present invention.
8 is a schematic diagram illustrating a process of manufacturing a frame-integrated mask according to another embodiment of the present invention.
9 is a schematic diagram showing an OLED pixel deposition apparatus to which the frame-integrated mask of the present invention is applied.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The detailed description of the present invention which follows refers to the accompanying drawings which illustrate, by way of illustration, specific embodiments in which the present invention may be practiced. These embodiments are described in sufficient detail to enable one skilled in the art to practice the present invention. It should be understood that the various embodiments of the present invention are different from each other but are not necessarily mutually exclusive. For example, specific shapes, structures, and characteristics described herein may be implemented in one embodiment in another embodiment without departing from the spirit and scope of the invention. Additionally, it should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the invention. Accordingly, the detailed description set forth below is not to be taken in a limiting sense, and the scope of the present invention, if properly described, is limited only by the appended claims, along with all equivalents as claimed by those claims. Similar reference numerals in the drawings indicate the same or similar functions in various aspects, and the length, area, thickness, and the like may be exaggerated for convenience.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily practice the present invention.

1 is a schematic diagram showing a frame-integrated mask 10 according to an embodiment of the present invention. 2 is a schematic diagram showing a mask 20 portion of a frame-integrated mask 10 according to an embodiment of the present invention.

Recently, a micro display applied to a virtual reality (VR) device may perform a pixel deposition process on a target substrate 900 (see FIG. 9) such as a silicon wafer rather than a large-area substrate. Since the screen of the micro display is located right in front of the user's eyes, it has a small screen of about 1 to 2 inches rather than a large area. In addition to this, since it is located close to the user's eyes, it is necessary to implement a higher resolution.

Therefore, the present invention proceeds with a pixel formation process on a 200mm, 300mm, and 450mm silicon wafer target substrate 900 rather than using it in a pixel formation process for a large-area target substrate with a side length exceeding 1,000m. It is an object of the present invention to provide a method of manufacturing a frame-integrated mask 10 capable of forming pixels with high image quality and a frame-integrated mask 10.

For example, in the case of the current QHD picture quality, the pixel size reaches about 30 ~ 50㎛ with 500 ~ 600 PPI (pixel per inch), and in the case of 4K UHD and 8K UHD high-definition, ~860 PPI and ~1600 PPI are higher than this. resolution, etc. A micro-display applied directly to a VR device or a micro-display used by being inserted into a VR device aims for ultra-high resolution of about 2,000 PPI or higher, and the pixel size reaches about 5 to 10 μm. In the case of a silicon wafer, it can be used as a substrate for a high-resolution micro-display because a finer and more precise process is possible compared to a glass substrate by utilizing a technology developed in a semiconductor process. The present invention is characterized in that it is a frame-integrated mask 10 capable of forming pixels on such a silicon wafer.

1 and 2, in order to perform a pixel deposition process using a silicon wafer as a target substrate 900 (see FIG. 9), the mask 20 has a shape corresponding to the silicon wafer. to be The meaning that the shape of the mask 20 corresponds to the silicon wafer means that the mask 20 has the same size and shape as the silicon wafer, or is different in size and shape from the silicon wafer, but is at least coaxial and the mask pattern P is It should be noted that it includes even the state of being placed within the shape of a silicon wafer. In addition, the mask 20 having a shape corresponding to the silicon wafer is integrally connected to the frame 30 to clarify mask alignment.

The frame-integrated mask 10 includes a mask 20 and a frame 30 , and the mask 20 may be attached to a partial surface of the frame 30 . A portion of the mask 20 that is not attached to the frame 30 and on which the mask pattern P is formed is referred to as a mask cell portion 20a, and a portion partially attached to the frame 30 is referred to as a dummy portion 20b. Although the mask cell portion 20a and the dummy portion 20b have different names and codes depending on where they are formed, the mask cell portion 20a and the dummy portion 20b are not separate regions, and have the same material and are integrally connected. is a composition In other words, the mask cell portion 20a and the dummy portion 20b are each part of the mask 20 (20a, 20b) formed simultaneously in a process such as rolling or electroforming. In the following description, the mask cell portion 20a and the dummy portion 20b may be used interchangeably with the masks 20 (20a and 20b).

The mask 20 is preferably made of an invar or super invar material, and may have a circular shape to correspond to a circular silicon wafer. The mask 20 may have a size corresponding to or larger than a silicon wafer, such as 200 mm, 300 mm, or 450 mm.

A conventional mask has a shape such as a square or a polygon to correspond to a large-area substrate. In addition, the frame also has a shape such as a square or a polygon to correspond to the mask, and since the mask includes angled corners, a problem in which stress is concentrated at the corners may occur. When stress is concentrated, a different force is applied to only a portion of the mask, and thus the mask may be twisted or distorted, which may lead to pixel alignment failure. In particular, in ultra-high resolution of 2,000 PPI or higher, it is necessary to avoid concentrating stress on the edge of the mask.

Therefore, as the mask 20 of the present invention has a circular shape, it is characterized in that it does not include corners. Since there are no corners, it is possible to solve the problem that different forces act on a specific part of the mask 20, and the stress can be uniformly distributed along the circular edge. Accordingly, the mask 20 is not twisted or distorted, can contribute to clear pixel alignment, and has an advantage of being able to implement a mask pattern PP of 2,000 PPI or more. According to the present invention, a pixel deposition process is performed by matching a circular silicon wafer having a low thermal expansion coefficient with a circular mask 20 in which stress is uniformly distributed along the rim, thereby depositing pixels ranging in size from about 5 to 10 μm. You can do it.

Referring to (a) of FIG. 2 , a plurality of mask patterns P may be formed in the mask cell portion 20a. The mask pattern P is a plurality of pixel patterns P corresponding to R, G, and B. The mask patterns P may have slanted sides, a taper shape, or a shape in which the pattern width increases from top to bottom. Numerous mask patterns P may be grouped to form one display cell C. The display cell C has a diagonal length of about 1 to 2 inches, and is an area corresponding to one display.

The mask pattern P may have a substantially tapered shape, and may have a pattern width of several to several tens of μm, preferably about 5 to 10 μm (resolution of 2,000 PPI or more). The mask pattern P may be formed through PR patterning, laser processing, or the like, but is not limited thereto.

The frame 30 may be attached to at least a portion of the dummy portion 20b of the mask 20 . More specifically, at least a portion of the dummy portion 20b, which is the remaining area of the mask 20 except for the area of the mask cell portion 20a, which is the area where the mask pattern P is formed, may be attached to the frame 30.

It is preferable that the frame 30 has a shape surrounding the rim of the mask 20 so that the mask 20 can be tightly supported without being hit or twisted.

Looking further, the frame 30 is integrally connected to the connection frame 31 at the bottom of the connection frame 31 and the connection frame 31 connected to the mask 20, and the mask 20 and the connection frame 31 It may include a support frame 35 for supporting.

Among them, the connection frame 31 corresponds to the shape of the mask 20 and can be connected to the edge (dummy portion 20b) of the mask 20, and the connection frame 31 is the mask cell portion 20a It is preferable to have a hollow shape or a ring shape so as not to cover the mask pattern P of the . That is, the connecting frame 31 may have a circular ring shape. Meanwhile, the support frame 35 may have various shapes such as a circular ring shape, a square ring shape, etc. within a range where the central portion is empty, as long as the shape is integrally connected at the lower portion of the connection frame 31 . In the present invention, a rectangular ring-shaped support frame 35 is assumed and illustrated.

Along the outer circumferential direction of the mask 20, the width of the mask 20 (dummy portion 20b) attached to the connecting frame 31 may be constant. That is, the area to which all portions of the edge (dummy portion 20b) of the circular mask 20 and the connecting frame 31 are attached may be constant. Since the area attached to the connecting frame 31 is constant in all parts of the edge of the mask 20, the stress is uniformly distributed, and the mask 20 is formed in a circular shape to uniformly distribute the stress. can be further improved.

In addition, in the frame-integrated mask 10 of the present invention, since the mask 20 is integrally connected to the frame 30, only the frame 30 is moved to the OLED pixel deposition apparatus 200 [see FIG. 9] and installed. Alignment of the mask 20 may be completed only through the process.

3 is a schematic diagram illustrating a process of forming a mask pattern P by wet etching both surfaces of the mask 20 . 4 is a schematic diagram showing problems in performing the process of FIG. 3 .

As the resolution of the mask pattern P increases, the thickness of the mask 20 becomes thinner. In order to form a high-resolution mask pattern P on a thin mask 20, a process of forming the mask pattern P on both sides as shown in FIG. 3 without forming the mask pattern P on one side only. this can be used

Referring to FIG. 3(a) , a mask 20 is supported on a first support plate 40 and a first pattern P1 is formed. The first pattern P1 has a smaller width than the second pattern P2 to be described later and is formed thin enough not to penetrate the mask 20 . Subsequently, referring to FIG. 3( b ), the mask 20 is transferred to another second support plate 45 . An insulating portion 23 such as PR is formed on the second supporting plate 45 , and the surface of the mask 20 on which the first pattern P1 is formed through the insulating portion 23 is on the second supporting plate 45 . are glued The insulating part 23 is filled in the first pattern P1. Subsequently, referring to FIG. 3(c), a second pattern P2 is formed. The second pattern P2 is formed to have a larger width than the first pattern P1, and the second pattern P2 is formed to a depth that touches the first pattern P1. The mask pattern P to which the first and second patterns P1 and P2 are connected may pass through the mask 20 . Subsequently, referring to FIG. 3(d) , manufacturing of the mask 20 having the mask patterns P: P1 and P2 formed thereon is completed by removing the second support plate 45 and the insulating portion 23 .

As described above, the process of forming the mask pattern P by etching both sides of the mask 20 is a process capable of forming a fine pattern. However, since the thickness of the mask 20 capable of realizing ultra-high resolution of about 2,000 PPI level is less than about 12 μm, a problem in that the tension of the very thin mask film itself varies from region to region occurs.

After performing the processes of FIGS. 3(a) and 3(b), the second pattern P2 may be formed by transferring the pattern to the second support plate 45. However, since the tension of the mask film having a thickness of less than about 12 μm varies for each region on the second support plate 45 , a problem in that the centers of the first pattern P1 and the second pattern P2 are not accurately aligned may occur. Although the second pattern P2 should be formed at the same center as the first pattern P1, uniform tension does not act over the entire mask film, so when forming the second pattern P2, the first pattern P1 The mutual spacing between them is different from the step of FIG. 3(a) in which the first pattern P1 is formed. Accordingly, as shown in FIG. 4(a), a second pattern P2' that is not completely aligned with the first pattern P1 is formed, or a part of the second pattern P2' is connected to the first pattern P1, but the center is not precisely aligned. Second patterns P2″ may be formed.

As a result, as shown in FIG. 4(b), the second pattern P2' itself passes through the mask 20, and the first pattern P1 and the second pattern P2" are connected to pass through the mask 20. The lower part of the mask pattern P, through which the organic material 600 passes, depends on the width of the first pattern P1, and the lower part of the mask pattern P can be reduced only by the second pattern P2'. or the second pattern P2 "and the first pattern P1 are combined to form a wider lower width of the mask pattern P, so the size of the pixel is not accurate and a defect occurs. .

Therefore, the present invention is characterized by providing a frame-integrated mask 10 in which the shape of the opening of the mask pattern P is not distorted even when a thin mask 20 is used, and the alignment is clear.

5 and 6 are schematic diagrams illustrating a process of manufacturing a frame-integrated mask 10 according to an embodiment of the present invention.

Referring to FIG. 5 (a) , a mask metal film 20 adhered to the template 50 may be provided. The template 50 is a medium in which the mask metal film 20 is attached to one surface and can be moved in a supported state. The size of the template 50 may be a flat plate shape having the same or larger area than the mask metal layer 110 so that the mask metal layer 20 can be supported as a whole, or a circular shape corresponding to the shape of the mask metal layer 20 . It is desirable to be

The template 50 may use a material such as wafer, glass, silica, heat-resistant glass, quartz, alumina (Al ₂ O ₃ ), borosilicate glass, or zirconia. there is.

A laser pass-through hole 51 may be formed in the template 50 so that the laser L irradiated from the top of the template 50 can reach a portion of the dummy portion 20b of the mask metal layer 20 . The laser pass-through hole 51 may be formed in the template 50 to correspond to the position and number of welding beads WP to be formed between the mask metal film 20 and the frame 30 .

A temporary adhesive portion 55 may be formed on one surface of the template 50 . The temporary adhesive portion 55 may allow the mask metal film 20 to be temporarily adhered to one surface of the template 50 and supported on the template 50 until the mask metal film 20 is attached to the frame 30 . .

The temporary adhesive portion 55 may use an adhesive or adhesive sheet that can be separated by application of heat or an adhesive or adhesive sheet that can be separated by UV irradiation.

For example, the temporary adhesive part 55 may use liquid wax. The liquid wax may be the same as the wax used in the polishing step of a semiconductor wafer, etc., and the type is not particularly limited. The liquid wax is a resin component mainly for controlling adhesion, impact resistance, and the like for holding power, and may include substances and solvents such as acrylic, vinyl acetate, nylon, and various polymers. For example, the temporary adhesive portion 55 may use SKYLIQUID ABR-4016 containing acrylonitrile butadiene rubber (ABR) as a resin component and n-propyl alcohol as a solvent component. Liquid wax may be formed on the temporary adhesive portion 55 using spin coating.

The temporary adhesive part 55, which is liquid wax, has lower viscosity at temperatures higher than 85°C to 100°C, increases in viscosity at temperatures lower than 85°C, and may be partially hardened like a solid, so that the mask metal film 20 and the template 50 can be fixedly bonded.

As another example, the temporary adhesive portion 55 may use a thermal release tape. The thermal release tape may have a core film such as a PET film in the center, a thermal release adhesive on both sides of the core film, and a release film/release film on the outside of the adhesive layer. can Here, the adhesive layers disposed on both sides of the core film may have different peeling temperatures.

The mask metal film 20 may be formed by performing a surface defect removal process and a thickness reduction process on one or both surfaces. As shown in FIG. 5( a ), after attaching the mask metal film 20 on the template 50, a surface defect removal process and a thickness reduction process may be performed. The thickness of the mask metal layer 20' -> 20 may be reduced by the surface defect removal process and the thickness reduction process. Alternatively, the thickness of the mask metal film 20 may be reduced after the step of FIG. 6(d).

Next, referring to FIG. 5( b ), a second surface (upper surface) opposite to the first surface (lower surface) of the mask metal film 20 in contact with the template 50 is formed with a first mask pattern (Pa). ) can be formed.

The first mask pattern Pa may be formed by forming a patterned insulating portion (not shown) on the second surface (upper surface) of the mask metal layer 20 and etching a space between the patterns of the insulating portion. The first mask pattern Pa may be formed in the mask cell portion 20a region of the mask metal layer 20 . The insulating portion may be formed of a photoresist material using a printing method or the like, and etching may use a method such as dry etching or wet etching without limitation.

For example, when wet etching is used, the width of the first mask pattern Pa may be larger than the width between the patterns of the insulating part because undercut occurs due to isotropic etching. For this reason, it is preferable to form the first mask pattern Pa with a smaller thickness than the thickness of the mask metal film 20 . That is, etching may be performed only to a small thickness so that the mask metal layer 20 is not penetrated. According to an embodiment, the first mask pattern Pa is formed to a thickness of about 3 μm to 15 μm within a range that does not penetrate the mask metal layer 20, that is, within a thickness range thinner than the mask metal layer 20. It can be. After that, the first mask pattern Pa may be etched together by reducing the thickness of the mask cell portion 20a, so that the formed thickness thereof may be reduced. The spacing of the first mask patterns Pa may substantially correspond to the spacing of the OLED pixels 700 to be deposited (see FIG. 9 ).

Next, referring to FIG. 5(c) , the template 50 to which the mask metal film 20 is adhesively supported may be loaded onto the frame 30 . Template 50 may be moved by a chuck. For example, a surface opposite to the surface of the template 50 to which the mask metal film 20 is attached may be suctioned and transferred by a vacuum chuck.

The second surface of the mask metal film 20 on which the first mask pattern Pa is formed may contact and correspond to the upper surface of the frame 30 (connection frame 31). That is, the dummy portion 20b on the second surface of the mask metal film 20 may contact and correspond to the upper surface of the frame 30 .

Then, the mask metal film 20 may be irradiated with a laser L to attach the mask metal film 20 to the frame 30 by laser welding. A welding bead WB is generated between the laser-welded mask metal film 20 and the frame 30 , and the weld bead WB may integrally connect the mask metal film 20 and the frame 30 .

Next, referring to FIG. 6( d ), after attaching the mask metal film 20 to the frame 30 , the mask metal film 20 and the template 50 may be debonded. Separation of the mask metal film 20 from the template 50 may be performed by applying at least one of heat, chemical treatment, ultrasound, and UV to the temporary adhesive portion 55 . For example, when heat at a temperature higher than 85° C. to 100° C. is applied, the viscosity of the temporary adhesive portion 55 is lowered, and the adhesive force between the mask metal film 20 and the template 50 is weakened, so that the mask metal film ( 20) and the template 50 may be separated. As another example, the mask 100 and the template 50 may be separated by dissolving or removing the temporary adhesive portion 55 by immersing the temporary adhesive portion 55 in a chemical such as IPA, acetone, or ethanol. As another example, when ultrasonic waves or UV are applied, the adhesive force between the mask metal film 20 and the template 50 is weakened, and thus the mask metal film 20 and the template 50 may be separated.

Meanwhile, after the template 50 is separated from the mask metal film 20 , a surface defect removal process and a thickness reduction process may be performed on the first surface of the mask metal film 20 . During the surface defect removal process and the thickness reduction process, the mask metal film 20 may be stably supported by the frame 30 .

Next, referring to FIG. 6(e) , an insulating portion 60 may be formed on the surface of the mask metal layer 20 . The insulating portion 60 may be formed on a surface of the mask metal layer 20 excluding the mask cell portion 20a of the first surface of the mask metal layer 20 . In addition, the insulating portion 60 may be formed including the surface of the frame 30 to protect the frame 30 as well. In order to form the insulating part 60 in a wide range, the insulating part 60 may be formed of photoresist, an organic material having resistance to an etchant, etc. using a spray coating method, but is not necessarily limited thereto.

Subsequently, the thickness of the mask cell portion 20a may be reduced (EC) on the first surface of the mask metal layer 20 . The thickness reduction (EC) of the mask cell portion 20a may be performed by at least one of wet etching and dry etching. The thickness of the mask metal layer 20 is about 20 μm to 50 μm, and the thickness of the mask metal layer 20 after thickness reduction (EC) may be about 2 μm to 12 μm. Since a lot of thickness must be reduced (EC) by etching, wet etching may be performed to reduce the first thickness, and then dry etching may be performed to reduce the second thickness. Since wet etching can be used to reduce a larger thickness at a faster rate than dry etching, thickness reduction (EC) can be achieved by performing wet etching first and precisely controlling dry etching.

Since a lot of thickness must be reduced (EC) by etching, a high-pressure etching method can be used. After flipping the mask metal film 20/frame 30 of FIG. 6(e), the etchant may be sprayed at a high pressure from the bottom. At this time, since the etchant is sprayed at a high pressure on the first surface of the mask metal film 20, the insulating portion 60 formed on the second surface of the mask metal film 20 may be deformed or defective due to the pressure. . To prevent this, a reduction support portion 70 may be disposed on the mask cell portion 20a of the second surface. The reduction support unit 70 may be configured in the form of a film covering the insulating unit 60 or using a wide plate-shaped mechanism. The reduction support part 70 may preserve the shape of the insulating part 60 by supporting the second surface, which is the opposite surface, in the thickness reduction (EC) process on the first surface of the mask metal film 20 .

Next, referring to FIG. 6(f) , a thickness difference between the mask cell portion 20a and the dummy portion 20b may appear because the thickness is reduced (EC) on the first surface of the mask metal layer 20 . In step (e) of FIG. 6 , the thickness reduction EC may be performed to the extent that the first mask pattern Pa is exposed and partially etched. As the top of the first mask pattern Pa is etched, the first mask pattern Pa may be in an open state. The width of the opening may substantially be provided as the width of the mask pattern P in the process of forming the OLED pixel 700 .

Next, referring to FIG. 6(g) , the insulating portion 60 may be removed. A mask pattern P is formed in the mask cell portion 20a of the mask metal film 20 . The mask pattern P corresponds to the first mask pattern Pa, which is opened by etching an upper portion thereof. The opening width has a narrower width than the lower width of the first mask pattern Pa, and can provide a narrower and finer width than the opening width of the mask pattern P formed through double-sided etching as shown in FIG. 3 . . Accordingly, it is possible to form an ultra-high resolution mask pattern P on the very thin mask metal film 20 of about 2 μm to 12 μm using only one-side etching process.

7 is a schematic diagram showing a state in which a frame-integrated mask 10 and a target substrate 900 are in contact for OLED pixel deposition according to an embodiment of the present invention.

In the frame-integrated mask 10 of the present invention, the mask cell portion 20a may have a very thin thickness of about 2 μm to 12 μm, and the mask dummy portion 20b may be relatively thick. That is, if the target substrate 900 comes into contact with the dummy portion 20b due to the difference in height between the mask cell portion 20a and the dummy portion 20b, there is a risk of creating a floating space therebetween. In other words, since the distance between the surface of the mask cell portion 20a and the target substrate 900 increases, there is a risk that the deposition of the OLED pixel 700 may not be clearly performed.

Accordingly, the area of the mask cell portion 20a to be subject to thickness reduction (EC) in FIG. 6(e) needs to be larger than the target substrate 900 . That is, the mask cell portion 20a to be reduced in thickness (EC) must have the same shape or be larger than the silicon wafer. Referring to FIG. 7 , the width/size W1 of the mask cell portion 20a is larger than the width/size W2 of the target substrate 900 . The target substrate 900 may be seated in an accommodation space formed by a step between the mask cell portion 20a and the dummy portion 20b without contacting the dummy portion 20b. Therefore, there is no floating space between the target substrate 900 and the mask cell portion 20a, and the OLED pixel 700 can be deposited to fit the mask pattern P.

8 is a schematic diagram showing a process of manufacturing a frame-integrated mask 10' according to another embodiment of the present invention.

The manufacturing process of the frame-integrated mask 10' according to another embodiment of the present invention may be performed by partially changing the process described above with reference to FIGS. 5 and 6 . Steps indicated by (d2), (e2), etc. mean steps corresponding to steps (d) and (e) of FIGS. 5 to 6 described above.

First, the mask metal film 20 on which the first mask pattern Pa is formed is attached to the frame 30 as in the step of FIG. 5(c), and the template 50 may be separated from the mask metal film 20.

Next, referring to FIG. 8( d2 ), a second mask pattern Pb is formed on the opposite surface (first surface) of the second surface (the surface of the mask metal film 20 on which the first mask pattern Pa is formed). can form The second mask pattern Pb may be formed to have a larger width than the first mask pattern Pa and to be deep enough to touch the first mask pattern Pa. The mask pattern P to which the first and second mask patterns Pa and Pb are connected may pass through the mask 20 .

In FIG. 8(d2), the mask metal film 20 is already firmly attached to the frame 30, and the thickness of the mask metal film 20 is not reduced to less than about 12 μm. Therefore, unlike the comparative example of FIG. 3 , the mask film itself does not have a problem in which the tension varies for each region. Thus, even if the second mask pattern Pb is formed on the surface opposite to the surface on which the first mask pattern Pa is formed, the problem that the centers of the first and second mask patterns Pa and Pb are not aligned can be solved. there is.

Next, referring to FIG. 8(e2) , the thickness of the mask cell portion 20a may be reduced (EC) on the first surface of the mask metal layer 20 on which the second mask pattern Pb is formed.

Next, referring to FIG. 8(f2) , a thickness difference between the mask cell portion 20a and the dummy portion 20b may appear because the thickness is reduced (EC) on the first surface of the mask metal layer 20 . In step e2 of FIG. 8 , the thickness reduction EC may be performed to the extent that the second mask pattern Pb is etched and the first mask pattern Pa is not etched. In particular, since the OLED pixel 700 is formed as the organic material 600 enters and passes through the second surface of the first mask pattern Pa and is deposited, the width of the first mask pattern Pa is less than the width of the OLED pixel 700. ) to define the width. Accordingly, the second mask pattern Pb preferably has a size that does not affect the first mask pattern Pa as much as possible, and preferably has a thickness smaller than that of the first mask pattern Pa. Considering this, the degree of thickness reduction (EC) on the first surface of the mask metal film 20 is performed to the extent that the thickness of the second mask pattern Pb is at least thinner than the thickness of the first mask pattern Pa. can do.

Next, referring to 8(g2), the insulating portion 60 may be removed. The mask pattern P′ corresponds to the sum of the first mask pattern Pa and the partially etched second mask pattern Pb. A width through which the organic material 600 of the mask pattern P' passes may substantially correspond to a width of a portion where the first mask pattern Pa and the second mask pattern Pb are connected. This width has a narrower width than the lower width of the first mask pattern Pa, and can provide a narrower and finer width than the opening width of the mask pattern P formed through double-sided etching as shown in FIG. 3 .

9 is a schematic diagram showing an OLED pixel deposition apparatus 200 to which the frame-integrated mask 10 of the present invention is applied.

Referring to FIG. 9 , the OLED pixel deposition apparatus 200 includes a magnet plate 300 in which a magnet 310 is accommodated and a cooling water line 350 is disposed, and an organic material source 600 from a lower portion of the magnet plate 300. ) and a deposition source supply unit 500 for supplying.

A target substrate 900 such as glass on which the organic material source 600 is deposited may be interposed between the magnet plate 300 and the source deposition unit 500 . The frame-integrated mask 10 for depositing the organic material source 600 pixel by pixel may be disposed on the target substrate 900 so as to be in close contact with or very close to the target substrate 900 . The magnet 310 generates a magnetic field, and the frame-integrated mask 10 may adhere to the target substrate 900 by attraction caused by the magnetic field.

The deposition source supply unit 500 may supply the organic material source 600 by reciprocating left and right paths, and the organic material sources 600 supplied from the deposition source supply unit 500 form a mask pattern P formed on the frame-integrated mask 10. may pass through and be deposited on one side of the target substrate 900 . The deposited organic material source 600 passing through the mask pattern P of the frame-integrated mask 10 may serve as a pixel 700 of the OLED.

Since the mask pattern P is formed with an inclined side (formed in a tapered shape), the deposition of the OLED pixels 700 is non-uniform due to the shadow effect caused by the organic material sources 600 passing along the inclined direction. can prevent it from happening.

Although the present invention has been shown and described with preferred embodiments as described above, it is not limited to the above embodiments, and various variations can be made by those skilled in the art within the scope of not departing from the spirit of the present invention. Transformation and change are possible. Such modifications and variations are to be regarded as falling within the scope of this invention and the appended claims.

10, 10': Frame integrated mask
20: mask, mask metal film
20a: mask cell portion
20b: dummy part
30: frame
31: connection frame
35: support frame
50: template
60: insulation
70: reduction support
200: OLED pixel deposition device
P: mask pattern

Claims (17)

A method of manufacturing a frame-integrated mask used in an OLED pixel formation process, in which a mask and a frame supporting the mask are integrally formed,
(a) preparing a mask support template to which a mask metal film and a template are bonded - forming a first mask pattern having a predetermined depth on a second surface of the mask metal film opposite to the first surface adhered to the template; -;
(b) making the second surface of the mask metal film correspond to the frame and attaching at least a portion of the dummy part to the frame except for the mask cell part where the first mask pattern is formed;
(c) separating the template from the mask metal layer;
(d) exposing the first mask pattern to the first surface side by reducing the thickness of the mask cell portion on the first surface of the mask metal layer;
A method of manufacturing a frame-integrated mask comprising a. According to claim 1,
In the step (b), at least a portion of the dummy portion of the mask metal film is attached to the frame by laser welding. According to claim 1,
Between the step (c) and the step (d),
(c-2) forming an insulating portion on a surface of the mask metal film except for the mask cell portion on the first surface;
Further comprising a method of manufacturing a frame integrated mask. According to claim 3,
The insulating part is formed by a spray coating method,
The insulating part is formed on a surface of the mask metal film and a surface of the frame except for the mask cell part. According to claim 3,
Between the step (c-2) and the step (d),
(c-3) disposing a reduction support part on the mask cell part on the second surface;
Including more,
The reduction support part supports the mask cell part on the second surface when the process of reducing the thickness of the mask cell part on the first surface is performed in step (d). According to claim 3,
(e) removing the insulating part;
Further comprising a method of manufacturing a frame integrated mask. According to claim 1,
In the step (a), the first mask pattern is formed to a depth of 3 μm to 15 μm so as not to penetrate the mask metal film in the thickness direction. According to claim 1,
The thickness of the mask metal film before step (d) is 20 μm to 50 μm, and the thickness of the mask cell portion of the mask metal film after step (d) is 2 μm to 12 μm. . According to claim 1,
In the step (d), the thickness reduction of the mask cell portion is performed by at least one of wet etching and dry etching. According to claim 9,
The thickness reduction of the mask cell portion includes a first thickness reduction using wet etching and a second thickness reduction using dry etching. According to claim 1,
Between the step (c) and the step (d),
(ca) forming a second mask pattern having a greater width than the first mask pattern and a greater depth than the first mask pattern on the first surface of the mask metal layer;
Including more,
The method of manufacturing a frame-integrated mask, wherein the second mask pattern and the first mask pattern are connected to pass through the mask metal film. According to claim 11,
In the step (d), the thickness of the second mask pattern is reduced by reducing the thickness of the mask cell portion on the first surface of the mask metal film. According to claim 12,
In the step (d), the thickness reduction of the mask cell portion is performed until the thickness of the second mask pattern becomes smaller than the thickness of the first mask pattern. According to claim 1,
The shape of the mask metal film is circular,
The frame may include a ring-shaped connecting frame attached to the mask metal film; and a support frame integrally connected to a lower portion of the connection frame and supporting the mask metal film and the connection frame. A frame-integrated mask used in an OLED pixel formation process, in which a mask and a frame supporting the mask are integrally formed,
a mask including a first mask pattern; and
a frame attached to at least a part of the dummy part except for the mask cell part where the first mask pattern is formed;
including,
The mask cell portion has a thickness smaller than that of the dummy portion, and the first mask pattern penetrates the mask cell portion in a thickness direction as the mask cell portion becomes thinner by thickness reduction from the same thickness as the dummy portion. Frame all-in-one mask. According to claim 15,
The area of the mask cell portion is formed larger than the area of the target substrate to be formed of the OLED pixel,
A frame-integrated mask, wherein a space formed by a step between the dummy part and the mask cell part is provided as a receiving space of the target substrate. According to claim 15,
The mask includes a second mask pattern having a larger width and thickness than the first mask pattern on top of the first mask pattern,
The frame-integrated mask, wherein the second mask pattern and the first mask pattern are connected to pass through the mask cell portion in a thickness direction.

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