KR20230002489A - Inspection device and inspection method - Google Patents

Abstract

Provided is an inspection device and an inspection method in which variations in capacitance due to variations in substrate manufacturing are easily corrected. A substrate inspection device 1 is an inspection device 1 that inspects a plurality of substrates A on which wiring P and reference wiring B are formed, and measures capacitance of wiring P and reference wiring B of each board A as measurement capacitance C. An average capacitance calculator 23 that calculates, as average capacitance Cav, the average value of the measurement capacitance C measured from the measurement section 22 and the reference wiring B provided as the same wiring in design, and one of the plurality of substrates A is a target substrate In the case of Ai, a capacitance correction unit 24 is provided that calculates a correction capacitance Cc that is a correction value of the measurement capacitance C of the target wiring P to be inspected on the target substrate Ai. The correction capacitance Cc is calculated by multiplying the ratio of the average capacitance Cav to the measured capacitance C of the wiring of the substrate Ai by the measured capacitance C of the target wiring P.

Description

Inspection device and inspection method

The present invention relates to an inspection device and inspection method for inspecting a substrate.

Conventionally, there has been known a circuit board inspection method in which capacitance between electrodes between a plurality of conductor patterns and a reference electrode on a circuit board to be measured is measured, and the circuit board is inspected based on the measured capacitance between electrodes (e.g. For example, see Patent Document 1).

Japanese Unexamined Patent Publication No. 2003-14807

Incidentally, the capacitance of the wires also changes depending on the area of the wires facing each other and the like. Therefore, if the width of the wiring, the thickness of the insulating layer, or the like fluctuates due to variations in substrate manufacturing, the capacitance of the wiring also fluctuates.

An object of the present invention is to provide an inspection device and an inspection method that can easily correct variations in capacitance due to variations in substrate manufacturing.

An inspection apparatus according to an example of the present invention is an inspection apparatus for inspecting a plurality of boards on which wirings each designed as the same wiring are formed, and includes a measuring unit for measuring capacitance of the wirings of the respective boards as a measurement capacitance; an average capacitance calculation unit that calculates, as an average capacitance, an average value of measured capacitance from wirings provided as the same wiring; and a target wiring to be inspected for the target board when one of the plurality of boards is used as the target board. and a capacitance correction unit that calculates a correction capacitance that is a correction value of the measured capacitance of the target substrate, wherein the capacitance correction unit calculates a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate to the measured capacitance of the target wiring. By multiplying, the correction capacitance is calculated.

In addition, an inspection method according to an example of the present invention is an inspection method for inspecting a plurality of substrates on which wirings provided as identical wirings in design are respectively formed, and a measurement step of measuring the capacitance of the wirings of the respective boards as a measurement capacitance; An average capacitance calculation step of calculating, as an average capacitance, the average value of measured capacitances from wirings provided as identical wirings in the design, and when one of the plurality of substrates is used as a target substrate, the target substrate is to be inspected. and a capacitance correction step of calculating a correction capacitance that is a correction value of the measured capacitance of the target wiring, wherein the capacitance correction step calculates a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate to the target wiring. By multiplying by the measurement capacitance, the correction capacitance is calculated.

With the inspection apparatus and inspection method having such a configuration, it is easy to correct capacitance variations due to substrate manufacturing variations.

1 is a conceptual diagram schematically illustrating the configuration of a substrate inspection apparatus using an inspection method according to an embodiment of the present invention.
2 is an explanatory diagram showing an example of the panel 100. As shown in FIG.
3 is a top view showing an example of the substrate A.
FIG. 4 is an explanatory diagram showing an example of the substrate An and an example of the electrical configuration of the inspection unit 3. As shown in FIG.
5 is a flowchart showing steps S1 to S11.
6 is a flowchart showing steps S21 to S30.
7 is a flowchart showing steps S41 to S43.
8 is a flowchart showing steps S51 to S58.
9 is a graph showing an example of measurement capacities C(P(1, 1)) to C(P(25, 5)).
10 is a graph showing an example of correction capacities Cc(P(1, 1)) to Cc(P(25, 5)).

EMBODIMENT OF THE INVENTION Hereinafter, embodiment concerning this invention is described based on drawing. In addition, in each drawing, the structure attached with the same code|symbol shows that it is the same structure, and the description is abbreviate|omitted. The substrate inspection apparatus 1 shown in FIG. 1 is an apparatus for inspecting wirings of the substrates A1 to A25 formed on the panel 100 . The substrate inspection device 1 corresponds to an example of an inspection device.

A substrate inspection apparatus 1 shown in FIG. 1 has a housing 11 . In the inner space of the housing 11, the inspection unit moving mechanism 15 for appropriately moving the substrate holding device 12, the inspection unit 3, the control unit 2, and the inspection unit 3 within the housing 11 is provided. is mainly provided. The substrate fixing device 12 is configured to fix the panel 100 to be inspected at a predetermined position.

The inspection unit 3 is located above the panel 100 fixed to the substrate fixing device 12 . The inspection unit 3 is provided with an inspection jig 4 for inspecting the substrate A formed on the panel 100 . In the inspection jig 4, a plurality of probes Pr are installed.

The panel 100 shown in FIG. 2 includes substrates A1 to A25. Hereinafter, the substrates A1 to A25 are generically referred to as substrate A, and when referring to individual substrates, the symbol A is given a substrate number n, and the same is referred to as substrate An. The panel 100 is, for example, a panel for PLP (Panel Level Packaging).

The substrate A is, for example, a package substrate or film carrier for a semiconductor package, a printed wiring board, a glass epoxy substrate, a flexible substrate, a ceramic multilayer wiring board, an electrode plate for a display such as a liquid crystal display or EL (Electro-Luminescence) display, It may be various substrates such as transparent conductive plates for touch panels, semiconductor wafers, semiconductor chips, and semiconductor substrates such as CSP (chip size package). Inspection points such as wiring patterns, pads, lands, solder bumps, vias, and terminals are formed on the substrate A.

The same wiring patterns are formed on the substrates A1 to A25 by design. The number of substrates A included in the panel 100 is not limited to 25. The substrate A is, for example, a substrate before chip dies are mounted on the RDL after the RDL is formed on the carrier when a fan-out package, which is a type of semiconductor chip package, is manufactured in an RDL (Redistribution Layer) first process.

Referring to FIGS. 3 and 4 , the substrate An is a multi-layer substrate provided with a plurality of wiring layers of, for example, a first layer L1, a second layer L2, and a third layer L3. On the substrate An, wirings P(n, 1) to P(n, 5) of wiring numbers 1 to 5 and reference wirings B(n, 1) to B(n, 3) of wiring numbers 1 to 3 are formed. there is. Hereinafter, the wiring of wiring number j in board Ai of board number i is denoted as wiring P(i, j), and the reference wiring of wiring number j in board Ai of board number i is referred to as reference wiring B(i, j). marked as

Wirings P(n, 1) to P(n, 5) and reference wirings B(n, 1) to B(n, 3) correspond to examples of wiring. Hereinafter, the wirings P(n, 1) to P(n, 5) are collectively referred to as wiring Pn, the wirings P(1, 1) to P(25, 5) are collectively referred to as wiring P, and the reference wiring B( n, 1) to B(n, 3) are collectively referred to as reference wire Bn, and reference wires B(1, 1) to B(25, 3) are collectively referred to as reference wire B.

The wiring P and the reference wiring B have ends e and g, respectively, and a main body f connecting the ends e and g. End portions e and g are, for example, vias and pads. The main body f extends in a belt shape and constitutes a main part of each wiring.

The end e of the wiring P and the reference wiring B is formed in the first layer L1. The end g of the wiring P and the reference wiring B is formed in the third layer L3. The body f of the wiring P(n, 1) and the reference wiring B(n, 1) is formed in the first layer L1. The body f of the wirings P(n, 2), P(n, 3) and the reference wiring B(n, 2) is formed in the second layer L2. The body f of the wirings P(n, 4), P(n, 5) and the reference wiring B(n, 3) is formed in the third layer L3.

In FIG. 3, the part formed in the 1st layer L1 is shown by the solid line, the part formed in the 2nd layer L2 by the broken line, and the part formed in the 3rd layer L3 by the dashed-dotted line.

As shown in FIG. 4 , in the second layer L2 of the substrate An, a planar pattern G(n, 1) formed to face the reference wiring B(n, 1) and spread in a planar shape, and a reference wiring B(n, 1). 3), a planar pattern G(n, 3) is formed so as to spread in a planar manner by being oppositely disposed. On the first layer L1 of the substrate An, a planar pattern G(n, 2) is formed to face the reference line B(n, 2) and spread out in plan.

Vias exposed to the first layer L1 are connected to the planar patterns G(n, 1) and G(n, 3). By bringing the probe Pr into contact with this via, the probe Pr can be conductively connected to the planar patterns G(n, 1) and G(n, 3). In practice, since the first layer L1 connected to the via is always disposed above the via, contact of the probe Pr to the via enables conduction connection. The influence of the capacitance of the first layer L1 itself can be minimized by making it small.

In addition, the two-dimensional patterns G(n, 1), G(n, 2), and G(n, 3) are connected to the reference wires B(n, 1), B(n, 2), and B(n, 3), respectively. It just needs to be oppositely arranged, and the arranged layers are not limited to the example shown in FIG.

The panel 100 is formed by stacking a carrier substrate 102, a release layer 103, and a substrate A in this order. The end e of each wiring is formed in the first layer L1, and the end g of each wiring is formed in the third layer L3. However, in the panel 100 after the substrate A is formed on the carrier substrate 102 and before the chip die is mounted on the substrate A, since the carrier is provided on one side (the third layer L3) of the substrate A, the It is not possible to test the continuity of the wiring by contacting the probe on both sides.

Therefore, the substrate inspection apparatus 1 is configured to detect the edge e, the planar pattern G(n, 2), or the planar pattern G(n, 1), G of the surface (first layer L1) on the side where the substrate A is exposed. The wiring is inspected by bringing the probe Pr into contact with the via following (n, 3) and measuring the capacitance of the wiring. In practice, since the first layer L1 connected to the via is always disposed above the via, contact of the probe Pr to the via enables conduction connection. The influence of the capacitance of the first layer L1 itself can be minimized by making it small.

In addition, the panel 100 is not limited to a substrate before a chip die is mounted on the substrate A after the substrate A is formed on the carrier.

Referring to FIG. 4 , the inspection unit 3 includes a plurality of probes Pr, a scanner unit 31, an AC power supply 32, and a plurality of ammeters 33. To the scanner unit 31, each probe Pr, one end of the AC power supply 32, one end of each ammeter 33, and a circuit ground are connected. The other end of the AC power supply 32 and the other end of each ammeter 33 are connected to the circuit ground.

The scanner unit 31 is a switching circuit configured using switching elements such as transistors and relay switches, for example. The scanner unit 31 connects the AC power supply 32 and each ammeter 33 to an arbitrary probe Pr according to a control signal from the control unit 2 .

The AC power supply 32 is an AC power supply circuit that outputs an AC voltage V at a preset frequency f to the probe Pr via the scanner unit 31 . The ammeter 33 is an AC ammeter constructed using, for example, a shunt resistor, a Hall element, an analog-to-digital converter, or the like. The ammeter 33 measures the current I flowing from the probe Pr connected via the scanner unit 31 to the circuit ground, and transmits a signal representing the current I to the control unit 2. The voltage V and the current I may be effective values or peak values.

Referring to FIG. 1 , the control unit 2 stores, for example, a CPU (Central Processing Unit) for executing predetermined logic operations, a RAM (Random Access Memory) for temporarily storing data, a predetermined control program, and the like. It is configured using a microcomputer equipped with a non-volatile memory device to do, and peripheral circuits thereof.

The control unit 2, for example, by executing the above-described control program, the inspection control unit 21, the measurement unit 22, the average capacity calculation unit 23, the capacity correction unit 24, the reference value calculation unit 25 And it functions as the judgment part 26.

The inspection control unit 21 appropriately moves the inspection unit 3 to bring each probe Pr into contact with each inspection point such as end e on the substrate A fixed to the substrate holding device 12 .

The measuring unit 22 measures the capacitance of the wiring of each board A as a measuring capacitance. Specifically, the measuring unit 22 measures the capacitance between the reference wire B(n, 1) and the planar pattern G(n, 1) as the measured capacitance of the reference wire B(n, 1), The capacitance between B(n, 2) and the planar pattern G(n, 2) is measured as the measured capacitance of the reference wire B(n, 2), and the capacitance between the reference wire B(n, 3) and the planar pattern G(n, 3) The capacitance between them is measured as the measured capacitance of the reference wire B(n, 3).

Strictly speaking, in the capacitance measured by bringing the probe Pr into contact with the reference wire B(n, 1) and the planar pattern G(n, 1), the Capacitance is also included. Similarly, in the capacitance measured by bringing the probe Pr into contact with the reference wire B(n, 2) and the planar pattern G(n, 2), the static electricity generated between the material around the reference wire B(n, 2) The capacitance is also included, and the capacitance measured by bringing the probe Pr into contact with the reference wire B(n, 3) and the planar pattern G(n, 3) is The generated capacitance is also included.

However, capacitance is inversely proportional to distance and proportional to area. Therefore, if the distances between the reference wires B(n, 1), B(n, 2), and B(n, 3) and the wires around them are spaced apart, the reference wires B(n, 1) having a large area are in plane. Capacitance between pattern G(n, 1), capacitance between reference wire B(n, 2) and planar pattern G(n, 2), and capacitance between reference wire B(n, 3) and planar pattern G(n, 3 ) becomes dominant.

Therefore, the capacitance measured by bringing the pair of probes Pr into contact with the reference wiring B(n, 1) and the planar pattern G(n, 1) can be approximated as the capacitance of the reference wiring B(n, 1), , The capacitance measured by bringing a pair of probes Pr into contact with the reference wire B (n, 2) and the planar pattern G (n, 2) can be approximated as the capacitance of the reference wire B (n, 2), The capacitance measured by bringing the pair of probes Pr into contact with the reference wiring B(n, 3) and the planar pattern G(n, 3) can be approximated as the capacitance of the reference wiring B(n, 3).

Further, the capacitance of the wiring Pn may be the capacitance between the wiring Pn and all other wirings or patterns, or may be the capacitance between the wiring Pn and one or more other preset wirings or patterns. Alternatively, when the carrier substrate 102 is a conductor substrate, the capacitance of the wiring Pn may be the capacitance between the wiring Pn and the carrier substrate 102 . The measuring unit 22 may use the measured capacitance of the wiring Pn as the capacitance measured between the wiring Pn and the pair of probes Pr contacting the arbitrarily set wiring or pattern.

The measurement unit 22 connects the ammeter 33 to the probe Pr, which is in contact with the reference wire Bn or the wire Pn of the measurement target, by means of the scanner unit 31. In addition, the measurement unit 22 connects the AC power supply 32 to the probe Pr paired with the probe Pr through the scanner unit 31 .

Then, current I flows through the capacitance of the reference wire Bn or wire Pn to be measured by the voltage V of frequency f output from the AC power supply 32, and the current I is measured by the ammeter 33. .

When a current I flows when a voltage V of frequency f is applied to the capacitance X, the capacitance X is given by the following formula (1).

Capacitance X=I/(V×2πf) … (One)

In this case, since V and 2πf are known, the capacitance X can be known if the current I is obtained. Therefore, the measurement unit 22 can measure the capacitance X as the measurement capacitance C.

Hereinafter, the measurement unit 22 measures the capacitance X using the scanner unit 31, the AC power supply 32, and the ammeter 33 simply, the measurement unit 22 measures the capacitance X, that is, It is described as measuring the capacity C.

The average capacitance calculation unit 23 calculates the average value of the measured capacitances C measured from the wirings corresponding to each other as the average capacitance Cav. The wirings corresponding to each other are wirings made as identical wirings for each board A by design. For example, reference wires B(1, 1), B(2, 1), B(3, 1), . are wires corresponding to each other, and reference wires B(1, 2), B(2, 2), B(3, 2), . . . are wires corresponding to each other, and reference wires B(1, 3), B(2, 3), B(3, 3), . . . are wires corresponding to each other.

The capacitance correction unit 24 calculates the ratio of the average capacitance Cav to the measured capacitance Ci of the wiring of the target board Ai when the target board is the board Ai of board number i among the plurality of boards A1 to A25. A correction capacitance Cc, which is a correction value of the measurement capacitance C of the target wiring, is calculated by multiplying Ai by the measurement capacitance C of the target wiring to be inspected.

Further, the capacitance correction unit 24 calculates the correction capacitance Cc for the target wiring of each substrate A by sequentially using each substrate A as a target substrate.

The reference value calculation unit 25 calculates an average value of the correction capacitance Cc for target wirings of each substrate A as a judgment reference value Cref.

The determination unit 26 determines the correction capacitance Cc based on the determination reference value Cref.

Next, an example of an operation of the substrate inspection apparatus 1 that executes the inspection method according to an example of the present invention will be described with reference to FIGS. 5 to 8 . In the following description, the measured capacitance of the reference wire B(i, j) is C(B(i, j)), the measured capacity of the wire P(i, j) is C(P(i, j)), and the wire P The correction capacitance of (i, j) is written as Cc(P(i, j)).

First, the measurement unit 22 initializes the substrate number i to 1 (step S1).

Next, the inspection control unit 21 brings each probe Pr into contact with the first layer L1 of the substrate Ai. Specifically, for each probe Pr, reference wires B(i, 1) to B(i, 3), wires P(i, 1) to P(i, 5), and planar patterns G(i, 1) to G (i, 3) and wirings P(i, 1) to P(i, 5) are brought into contact with arbitrary wirings, etc. (step S2).

Next, the measuring unit 22 measures the measurement capacitance C(B(i, 1)), C(B(i, 2), C(B(i, 3), and the measurement capacitance C(P(i, 1 )), C(P(i, 2)), C(P(i, 3)), C(P(i, 4)), and C(P(i, 5)) are measured (Step S2: Measurement fair).

Next, the measuring unit 22 compares the substrate number i with 25 (step S3), and if the substrate number i is not 25 (NO in step S3), the new substrate A is measured for substrate number i. 1 is added to (step S4), and steps S2 and S3 are repeated again. On the other hand, if the substrate number i is 25 (YES in step S3), the measurement capacitance C is measured for all wirings, so the processing proceeds to step S5.

Next, the average capacitance calculation unit 23 takes the average value of the measured capacitances C (B(1, 1)) to C (B(25, 1)) as the average capacitance Cav(L1) of the first layer L1. , the average value of the measurement capacitances C(B(1, 2)) to C(B(25, 2)) is taken as the average capacitance Cav(L2) of the second layer L2, and the measurement capacitance C(B(1, 3) ) to C (B(25, 3)) is taken as the average capacity Cav(L3) of the third layer L3 (step S5: average capacity calculation step).

Measurement capacitances C(B(1, 1)) to C(B(25, 1)) are reference wires B corresponding to each other having a wiring number of 1, and measured capacitances measured from reference wires B formed in the first layer L1. It is C. Measurement capacitances C(B(1, 2)) to C(B(25, 2)) are reference wires B corresponding to each other having a wiring number of 2, and measured capacitances measured from reference wires B formed in the second layer L2. It is C. Measurement capacitances C(B(1, 3)) to C(B(25, 3)) are reference wires B corresponding to each other having a wiring number of 3, and measured capacitances measured from reference wires B formed in the third layer L3. It is C.

Further, in one substrate A, an example in which one reference wiring B is provided for each layer has been shown, but a plurality of reference wirings B may be provided for each layer. Then, the average capacitances Cav(L1), Cav(L2), and Cav(L3) may be calculated by averaging the measured capacitances C of the plurality of reference wires B for each substrate for each layer for only the plurality of substrates.

Next, the capacitance correction unit 24 initializes the substrate number i to 1 (step S6).

Next, the capacitance correction unit 24 calculates the correction capacitance Cc(P(i, 1)) of the wiring P(i, 1) of the first layer L1 based on the following equation (1) (step S7: capacity correction process).

Correction capacitance Cc(P(i, 1)) = C(P(i, 1))×Cav(L1)/C(B(i, 1)) … (One)

In step S7, the substrate Ai corresponds to the target substrate, the wiring P(i, 1) corresponds to the target wiring of the first layer L1, the reference wiring B(i, 1) corresponds to the wiring of the target substrate Ai, and , Cav(L1)/C(B(i, 1)) corresponds to the ratio of the average capacitance Cav(L1) to the measured capacitance C(B(i, 1)) of the wiring of the target substrate Ai.

Next, the capacitance correction unit 24 calculates the correction capacitances Cc(P(i, 2)) and Cc(P(i, 3) of the wirings P(i, 2) and P(i, 3) of the second layer L2. )) is calculated based on the following equations (2) and (3) (step S8: capacity correction step).

Correction capacitance Cc(P(i, 2)) = C(P(i, 2))×Cav(L2)/C(B(i, 2)) . (2)

Correction capacitance Cc(P(i, 3))=C(P(i, 3))×Cav(L2)/C(B(i, 2)) … (3)

In step S8, the substrate Ai corresponds to the target substrate, the wirings P(i, 2) and P(i, 3) correspond to the target wiring of the second layer L2, and the reference wiring B(i, 2) corresponds to the target wiring. Corresponds to the wiring of the board Ai, and Cav(L2)/C(B(i, 2)) is the ratio of the average capacitance Cav(L2) to the measured capacitance C(B(i, 2)) of the wiring of the target board Ai. is equivalent to

Next, the capacitance correction unit 24 determines the correction capacitances Cc(P(i, 4)) and Cc(P(i, 5) of the wirings P(i, 4) and P(i, 5) of the third layer L3. )) is calculated based on the following equations (4) and (5) (step S9: capacity correction step).

Correction capacitance Cc(P(i, 4))=C(P(i, 4))×Cav(L3)/C(B(i, 3)) … (4)

Correction capacitance Cc(P(i, 5)) = C(P(i, 5))×Cav(L3)/C(B(i, 3)) . (5)

In step S9, the substrate Ai corresponds to the target substrate, the wirings P(i, 4) and P(i, 5) correspond to the target wiring of the third layer L3, and the reference wiring B(i, 3) corresponds to the target wiring. Corresponds to the wiring of the board Ai, and Cav(L3)/C(B(i, 3)) is the ratio of the average capacitance Cav(L3) to the measured capacitance C(B(i, 3)) of the wiring of the target board Ai. is equivalent to

Next, the capacitance correction unit 24 compares the substrate number i with 25 (step S10), and if the substrate number i is not 25 (NO in step S10), the substrate number is corrected for a new substrate A. 1 is added to i (step S11), and steps S7 to 10 are repeated again. On the other hand, if the substrate number i is 25 (YES in step S10), correction of all measurement capacitances C has been completed, so the process proceeds to step S21.

As shown in Fig. 9, the measurement capacitance C fluctuates for each substrate A even for wires P having the same wire number. The measurement capacitance C decreases when the wiring P is disconnected, and increases when the wiring P shorts another wiring or the like. If there is no change in the substrate, the disconnection or short circuit of the wiring P can be judged by the increase or decrease of the measurement capacitance C.

However, as shown in Fig. 9, if the variation of the measurement capacitance C due to the variation of the substrate is large, it is not easy to determine disconnection or short circuit of the wiring P based on the measurement capacitance C.

For example, the measurement capacitance C(P(2,2)) shown in FIG. 9 is measured capacitance C(P(2,2)) when the wiring P(2,2) is disconnected as a solid line, and the wiring The measured capacitance C (P(2, 2)) when P(2, 2) is normal is indicated by a broken line. In the example shown in FIG. 9 , the measured capacitance C(P(2,2)) when the wiring P(2,2) is disconnected is the measured capacitance C(P(1) of the normal wiring P(1,2). , 2)) and greater than the measured capacitance C (P(25, 2)) of the normal wiring P(25, 2). Therefore, it is difficult to determine that the wiring P(2, 2) is defective based on the measurement capacitance C (P(2, 2)).

As shown in Fig. 10, correction capacitances Cc(P(1, 1)) to Cc(P(25, 5)) corrected in steps S7 to S9 have the same wiring number and correspond to each other if the wiring P is normal. In the wirings P to be performed, the influence due to the fluctuation of the substrate is reduced, and the capacitance becomes substantially the same. In this way, according to steps S1 to S11, it becomes easy to correct the fluctuations in the capacitance X due to the manufacturing fluctuations of the substrate A.

Further, in the manufacturing process of the substrate A, since the wiring P and the reference wiring B are formed for each layer, the variation method may differ for each layer even within the same substrate A. Therefore, in step S2, measurement capacitances C(B(1,1)) to C(B(25,3)) are measured from the reference wires B(n, 1) to B(n, 3) provided on each layer. do. In step S5, average capacitances Cav(L1), Cav(L2), and Cav(L3) are calculated for each layer. In steps S7 to S9, measurement capacitances C(P(1, 1)) to C(P(25, 5)) are corrected for each layer, and correction capacitances Cc(P(1, 1)) to Cc(P(25, 5)) is calculated.

Accordingly, correction capacities Cc(P(1, 1)) to Cc(P(25, 5)) can be calculated so as to reduce the difference in variation between layers.

Next, in step S21, the reference value calculation unit 25 uses the average value of the correction capacitances Cc(P(1, 1)) to C(P(25, 1)) to determine the wiring P(n, 1). Let the reference value Cref(1) be the average value of correction capacitances Cc(P(1,2)) to Cc(P(25,2)) as the judgment reference value Cref(2) of the wiring P(n,2), Let the average value of the correction capacitances Cc(P(1, 3)) to Cc(P(25, 3)) be the judgment reference value Cref(3) of the wiring P(n, 3), and the correction capacitance Cc(P(1, 4) The average value of Cc(P(25, 4)) is used as the determination reference value Cref(4) of the wiring P(n, 4), and the correction capacitances Cc(P(1, 5)) to Cc(P( 25, 5)) is used as the judgment reference value Cref(5) of the wiring P(n, 5) (step S21: reference value calculation step).

Next, the determination unit 26 initializes the board number i and the wiring number j to 1 (step S22).

Next, if the absolute value of {Cc(P(i, j))-Cref(j)}/Cref(j) is equal to or less than the determination ratio Ref (YES in step S23), the determination unit 26 determines the wiring It is determined that P(i, j) is good (step S24), and if it exceeds the judgment ratio Ref (NO at step S23), it is determined that the wiring P(i, j) is bad (step S25).

That is, the determining unit 26 can determine that the wiring P is defective when the ratio of the difference between the correction capacitance Cc of each wire P and the judgment reference value Cref to the judgment reference value Cref exceeds the preset judgment ratio Ref. there is. The determination ratio Ref may be appropriately set according to the required inspection accuracy.

Next, the judging unit 26 compares the wiring number j with 5 (step S26), and if the wiring number j is not 5 (NO in step S26), to determine another wiring P on the substrate Ai. 1 is added to the wiring number j (step S27), and steps S23 to S26 are repeated again.

On the other hand, if the wiring number j is 5 (YES in step S26), board number i is compared with 25 (step S28), and if the board number i is not 25 (NO in step S28), a new board A is printed. 1 is added to the board number i to determine whether or not the wiring number j is initialized to 1 (step S29), and steps S23 to 28 are repeated again.

On the other hand, if the board number i is 25 (YES in step S28), the pass/fail judgment has been completed for all the wirings P, so the processing proceeds to step S30.

In step S30, the determination unit 26 confirms whether or not there is a wiring P determined to be defective in step S25 (step S30). If there is no wiring P judged to be defective (NO in step S30), the process ends.

On the other hand, if there is even one wiring P determined to be defective (YES in step S30), the process proceeds to step S41.

If there is even one wiring P determined to be defective (YES in step S30), the average value calculated in step S21 including the correction capacitance Cc of the defective wiring P is used as the judgment reference value Cref. Therefore, the quality determination accuracy of the wiring P based on the determination reference value Cref is lowered.

Then, in step S41, the reference value calculation unit 25 removes the correction capacitance of the wiring determined to be defective from the correction capacitances Cc(P(1, 1)) to C(P(25, 1)) and corrects the remaining The average value of the capacitance is taken as the new criterion value Cref(1) of the wiring P(n, 1).

Similarly, the reference value calculation unit 25 calculates the average value of the remaining correction capacitance after excluding the correction capacitance of the wirings determined to be defective from the correction capacitances Cc(P(1,2)) to C(P(25,2)), A new judgment reference value Cref(2) of the wire P(n, 2) is set (step S41).

The reference value calculation unit 25 calculates the average value of the remaining correction capacitance after excluding the correction capacitance of the wirings determined to be defective from the correction capacitances Cc(P(1,3)) to C(P(25,3)), the wiring P (n, 3) is set as the new criterion value Cref(3) (step S41).

The reference value calculation unit 25 calculates the average value of the remaining correction capacitance after excluding the correction capacitance of the wirings determined to be defective from the correction capacitances Cc(P(1, 4)) to C(P(25, 4)), as the wiring P (n, 4) is set as a new criterion value Cref(4) (step S41).

The reference value calculating unit 25 calculates the average value of the remaining correction capacitance after excluding the correction capacitance of the wirings determined to be defective from the correction capacitances Cc(P(1,5)) to C(P(25,5)), (n, 5) is set as the new criterion value Cref(5) (step S41).

According to step S41, when there is a defective wiring, since a new judgment reference value Cref can be obtained based on the correction capacitance remaining after excluding the correction capacity of the defective wiring, the accuracy of the judgment reference value Cref can be improved.

Next, the determination unit 26 initializes the board number i and the wiring number j to 1 (step S42).

Next, the determination unit 26 confirms whether or not the wiring P(i,j) is defective in step S25 (step S43). If the wiring P(i, j) is not defective (NO in step S43), the determining unit 26 proceeds to step S51. If the wiring P(i, j) is defective (YES in step S43), the determination unit 26 proceeds to step S54.

In step S51, if the absolute value of {Cc(P(i, j))-Cref(j)}/Cref(j) is equal to or less than the decision ratio Ref, based on the new decision reference value Cref, the determination unit 26 (Yes in step S51), it is determined that the wiring P(i, j) is good (step S52), and if it exceeds the determination ratio Ref (no in step S51), the wiring P(i, j) is It is determined that it is defective (step S53).

Next, the judging unit 26 compares the wiring number j with 5 (step S54), and if the wiring number j is not 5 (NO in step S54), to determine another wiring P on the substrate Ai. 1 is added to the wiring number j (step S55), and steps S51 to 54 are repeated again.

On the other hand, if the wiring number j is 5 (YES in step S54), board number i is compared with 25 (step S56), and if the board number i is not 25 (NO in step S56), a new board A is printed. 1 is added to the substrate number i to determine whether or not the wiring number j is initialized to 1 (step S57), and steps S51 to 56 are repeated again.

On the other hand, if the board number i is 25 (YES in Step S56), the pass/fail judgment has been completed for all wires P that were not defective last time based on the new judgment reference value Cref, so the processing proceeds to Step S58. do.

In step S58, the determination unit 26 confirms whether or not there is a wiring P newly determined to be defective in step S53 (step S58). If there is no wiring P newly determined to be defective (NO in step S58), the process ends.

On the other hand, if there is even one wiring P newly determined to be defective (YES in step S58), steps S41 to S58 are repeated again.

As described above, according to the processing of steps S30 and S41 to S58, when there is a wiring P determined to be defective, the influence of the wiring P determined to be defective is removed, a new judgment reference value Cref is calculated, and the newly calculated judgment reference value Cref Based on this, the quality determination of the wiring P, which has been determined to be a non-defective product, is again performed, so that the quality determination accuracy of the wiring P is improved.

In addition, it is not necessarily necessary to execute steps S30 to S53, and in the case of "Yes" in step S28, the process may end.

In addition, the example in which the reference wiring B is provided for each layer of the substrate A is not limited. For example, only the reference wire B(n, 2) is provided as the reference wire, and in steps S7 and S9, Cav(L1)/C(B(i, 1)) and Cav(L3)/C(B( Instead of i, 3)), Cav(L2)/C(B(i, 2)) may be used.

In addition, it is not limited to an example including a reference wiring B apart from the wiring P to be inspected. No reference wiring B is provided, and any wiring P may be used instead of the reference wiring B. For example, the wirings P(n, 2) and P(n, 4) may be used instead of the reference wirings B(n, 2) and B(n, 3).

In this case, in step S5, the average value of the measurement capacitances C (P(1, 2)) to C (P(25, 2)) is defined as the average capacitance Cav(L2) of the second layer L2, and the measurement capacitance C The average value of (P(1, 4)) to C(P(25, 4)) can be taken as the average capacitance Cav(L3) of the third layer L3. In addition, in step S8, measurement capacitance C(P(i, 2)) is used instead of measurement capacitance C(B(i, 2)), and in step S9, measurement capacitance C(B(i, 3)) is replaced. can be used for measuring capacitance C(P(i, 4)).

Accordingly, in steps S23 to S25 and steps S51 to S53, the wires P(n, 2) and P(n, 4) cannot be inspected, but the wires P(n, 3) and P(n, 5) can be inspected. When inspecting wires P(n, 2) and P(n, 4), use wires P(n, 3) and P(n, 5) instead of reference wires B(n, 2) and B(n, 3). You can use

In this way, it is not necessary to provide the reference wiring B separately from the wiring P. On the other hand, the wirings P arranged to form the circuit are arranged in a complex manner and tend to have a complicated shape, and the capacitance X tends to become unstable. However, in the case where the reference wiring B is provided separately from the wiring P, it is easy to make the reference wiring B for average capacitance calculation easy to stabilize the capacitance regardless of the necessity of the circuit.

Further, in the substrate inspection apparatus and inspection method according to the present invention, it is sufficient if it is easy to correct at least variations in capacitance due to variations in substrate manufacturing, and steps S21 to S58 are not executed, and the case of “Yes” in step S10 , processing may be terminated.

In addition, although the wiring P determined to be defective once in step S43 has shown an example in which it is not determined again in steps S51 to S53, step S43 may be skipped and step S42 may proceed to step S51.

That is, an inspection apparatus according to an example of the present invention is an inspection apparatus for inspecting a plurality of boards on which wirings provided as identical wirings in design are respectively formed, and includes a measurement unit for measuring capacitance of the wirings of the respective boards as a measurement capacitance; an average capacitance calculating unit that calculates, as an average capacitance, an average value of measured capacitance from wirings provided as the same wiring in the design; and a capacitance correction unit that calculates a correction capacitance that is a correction value of the measured capacitance of the target wiring, wherein the capacitance correction unit calculates a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate to the measured capacitance of the target wiring. By multiplying by the capacitance, the corrected capacitance is calculated.

In addition, an inspection method according to an example of the present invention is an inspection method for inspecting a plurality of substrates on which wirings provided as identical wirings in design are respectively formed, and a measurement step of measuring the capacitance of the wirings of the respective boards as a measurement capacitance; An average capacitance calculation step of calculating, as an average capacitance, the average value of measured capacitances from wirings provided as identical wirings in the design, and when one of the plurality of substrates is used as a target substrate, the target substrate is to be inspected. and a capacitance correction step of calculating a correction capacitance that is a correction value of the measured capacitance of the target wiring, wherein the capacitance correction step calculates a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate to the target wiring. By multiplying by the measurement capacitance, the correction capacitance is calculated.

According to these configurations, the capacitance of the wirings of each board is measured as the measured capacitance, and the average value of the measured capacitances measured from the wirings corresponding to each other provided as identical wirings in design is calculated as the average capacitance. The correction capacitance of the target wiring is calculated by multiplying the ratio of the average capacitance to the measured capacitance of the wiring of the target board, which is one of the plurality of substrates, by the measured capacitance of the target wiring to be inspected on the target board. As a result, since variations between substrates in correction capacitance are reduced, it becomes easy to correct variations in capacitance due to variations in manufacturing substrates.

Further, the capacitance correction unit calculates the correction capacitance of the target wiring of each of the plurality of substrates as the target substrate, and the inspection apparatus calculates an average value of the correction capacitances as a judgment reference value. It is preferable to further include a reference value calculation unit that determines the respective correction capacitances based on the determination reference value.

According to this configuration, since the judgment reference value can be automatically calculated based on the correction capacitance of the target wiring of each target substrate, it is easy to determine each correction capacitance.

Further, the reference value calculation unit calculates, as a new determination standard value, an average value of remaining correction capacities excluding correction capacity determined to be defective by the determination unit, and the determination unit, based on the new determination reference value, calculates at least the remaining correction capacity. It is desirable to determine the correction capacity of

According to this configuration, since the correction capacitance of the defective wiring is excluded from the data that is the basis of the decision reference value and the new decision reference value is calculated, the decision accuracy based on the new decision reference value is improved.

In addition, the wiring includes a reference wiring provided as an identical wiring by design between the plurality of substrates, rather than an inspection target, and the measurement unit measures the capacitance of the reference wiring as a measurement capacitance of the reference wiring, , Preferably, the average capacitance calculator calculates an average value of measured capacitances of the reference wirings in each of the substrates as the average capacitance.

According to this configuration, the average capacitance is calculated based on the measured capacitance from a reference wiring separate from the wiring to be inspected. Wiring to be inspected that is arranged to form a circuit is complicatedly arranged, tends to have a complex shape, and is likely to have unstable capacitance. However, in the case where the reference wiring is provided separately from the wiring to be inspected, it is easy to make the reference wiring for average capacitance calculation in a shape and arrangement that facilitates stabilization of capacitance, regardless of the necessity of the circuit.

In addition, it is preferable that the substrate is a multilayer substrate, and that the reference wiring is provided for each layer of the substrate.

In the substrate manufacturing process, since wiring and reference wiring are formed for each layer, the variation method may differ for each layer even within the same substrate. Therefore, by providing the reference wiring for each layer of the substrate, it becomes easy to calculate the correction capacitance so as to reduce the difference in variation for each layer.

In addition, it is preferable to include a probe for contacting the wire, and the measuring unit measures the capacitance through the probe.

According to this configuration, the capacitance of the wiring can be measured by bringing the probe into contact with the wiring.

1: board inspection device
2: control unit
3: inspection department
4: inspection jig
11: housing
12: substrate fixing device
15: Inspection part moving mechanism
21: inspection control unit
22: measuring part
23: average capacity calculation unit
24: capacity correction unit
25: reference value calculation unit
26: Judgment
31: scanner unit
32 AC power
33 ammeter
100: panel
102: carrier substrate
103 Exfoliation layer
A, A1 to A25: substrate
B: reference wiring
C: measuring capacity
Cav: average capacity
Cc: correction capacity
Cref: judgment reference value
G: Planar pattern
I: current
L1: first layer
L2: second layer
L3: third layer
P: Wiring
Pr: Probe
Ref: Judgment Ratio
V: voltage
e, g: end
f: body
X: capacitance

Claims (7)

An inspection apparatus for inspecting a plurality of substrates on which wires each formed as identical wires in design are formed,
a measurement unit for measuring the capacitance of the wiring of each substrate as a measurement capacitance;
an average capacitance calculating unit that calculates, as an average capacitance, an average value of measured capacitances measured from wirings provided as identical wirings in the design;
a capacitance correcting unit that calculates a correction capacitance that is a correction value of the measured capacitance of a target wire to be inspected on the target substrate when one of the plurality of substrates is used as a target substrate;
wherein the capacitance correcting unit calculates the corrected capacitance by multiplying the measured capacitance of the target wiring by a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate. According to claim 1,
The capacitance correction unit calculates a correction capacitance of a target wiring of each target substrate, using each of the plurality of substrates as the target substrate;
The inspection apparatus includes a reference value calculation unit that calculates an average value of each of the correction capacitances as a judgment standard value;
and a judging unit that determines each of the correction capacities based on the criterion value. According to claim 2,
the reference value calculation unit calculates, as a new determination reference value, an average value of remaining correction capacitances excluding correction capacities determined to be defective by the determination unit;
wherein the determination unit determines at least the remaining correction capacity based on the new determination reference value. According to any one of claims 1 to 3,
The wiring includes a reference wiring provided as an identical wiring in design among the plurality of substrates, not an inspection target,
The measurement unit measures the capacitance of the reference wire as the measured capacitance of the reference wire,
wherein the average capacitance calculation unit calculates, as the average capacitance, an average value of measured capacitances of the reference wires in each of the substrates. According to claim 4,
The substrate is a multilayer substrate,
The reference wiring is provided for each layer of the substrate. According to any one of claims 1 to 5,
A probe for contacting the wiring is provided;
The measuring unit measures the capacitance through the probe. It is an inspection method for inspecting a plurality of substrates on which wirings provided as identical wirings in design are formed,
A measurement step of measuring the capacitance of the wiring of each substrate as a measurement capacitance;
An average capacitance calculation step of calculating, as an average capacitance, an average value of measured capacitances measured from wirings provided as identical wirings in the design;
a capacitance correction step of calculating a correction capacitance that is a correction value of the measured capacitance of a target wiring to be inspected on the target substrate when one of the plurality of substrates is used as a target substrate;
wherein the capacitance correction step calculates the corrected capacitance by multiplying a ratio of the average capacitance to the measured capacitance of the wiring of the target substrate by the measured capacitance of the target wiring.

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