KR20220148783A - Organic light emitting display device - Google Patents

Abstract

An organic light emitting display device is disclosed. The organic light emitting display device comprises: a base layer including a display area in which an array of pixels is arranged and a non-display area surrounding the display area; a thin film transistor disposed in the display area on the base layer; a planarization layer disposed on the thin film transistor to planarize an upper part of the thin film transistor; an organic light emitting device disposed on the planarization layer; banks disposed on the organic light emitting device in areas other than a light emitting area; and a power wiring disposed in the non-display area of the base layer and transmitting power used to drive the pixels. A portion of the power wiring may be covered with an inorganic layer, and a portion other than the portion may not be covered with the inorganic layer. Embodiments of the present specification can provide a display device having a smaller bezel width.

Description

Organic light emitting display device {ORGANIC LIGHT EMITTING DISPLAY DEVICE}

This specification relates to an organic light emitting display device.

A video display device that implements various information on a screen is a key technology in the information and communication era, and is developing in the direction of thinner, lighter, more portable and high-performance. Accordingly, an organic light emitting display device that displays an image by controlling the amount of light emitted from the organic light emitting diode is in the spotlight.

The organic light emitting device is a self-luminous device using a thin light emitting layer between electrodes, and has the advantage that it can be thinned. A typical organic light emitting display device has a structure in which a pixel driving circuit and an organic light emitting device are formed on a substrate, and an image is displayed while light emitted from the organic light emitting device passes through a substrate or a barrier layer.

Recently, as the miniaturization and high resolution of organic light emitting display devices are progressing, necessary wiring has increased, but the space for arranging the wiring has become insufficient. In this situation, securing a space for arranging various elements including electrical wiring has become an important task. Furthermore, a method for efficient arrangement of various parts and elements is being studied. These studies are mainly conducted for new design and UI/UX, and these studies are also conducted to reduce the area of the outer part of the display device.

An object of the present specification is to propose an outer structure of an organic light emitting diode display. The tasks of the present specification are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

According to an embodiment of the present specification, an organic light emitting display device is provided. The organic light emitting diode display includes a base layer including a display area in which an array of pixels is arranged and a non-display area surrounding the display area, a thin film transistor disposed in the display area on the base layer, and the thin film transistor on the thin film transistor. a planarization layer disposed on to planarize an upper portion of the thin film transistor, an organic light emitting device disposed on the planarization layer, and a bank disposed on the organic light emitting device except for a light emitting area, in the non-display area of the base layer and a power supply line that transmits power used to drive the pixel, a portion of the power line may be covered with an inorganic layer, and an area other than the partial area may not be covered with the inorganic layer.

Specific details of other embodiments are included in the detailed description and drawings.

Embodiments of the present specification may provide a structure and design for increasing the area of the outer wiring without risk of arc discharge. In addition, embodiments of the present specification may provide a display device in which the width of the bezel is further reduced. Accordingly, embodiments of the present specification may provide a display device with improved reliability and aesthetics. Effects according to the embodiments of the present specification are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 illustrates an exemplary display device that may be included in an electronic device.
2 is a cross-sectional view schematically illustrating a display area and a non-display area of a display device according to an exemplary embodiment of the present specification.
3A and 3B are diagrams illustrating a part of a process of forming an outer part of an organic light emitting diode display.
4A to 4D are views illustrating an outer portion of an organic light emitting diode display according to an exemplary embodiment of the present specification.

Advantages and features of the present specification and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present specification are exemplary, and thus the present specification is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the case in which the plural is included is included unless specifically stated otherwise. In interpreting the components, it is interpreted as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'beside', etc., 'right' Alternatively, one or more other parts may be positioned between two parts unless 'directly' is used. Reference to a device or layer “on” another device or layer includes any intervening layer or other device directly on or in the middle of another device. When it is described that a component is “connected”, “coupled” or “connected” to another component, the component may be directly connected or connected to the other component, but other components may be interposed between each component. It should be understood that each component may be “interposed” or “connected,” “coupled,” or “connected” through another component.

Although first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the spirit of the present invention.

The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated component. Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates an exemplary display device that may be included in an electronic device.

Referring to FIG. 1 , the display device 100 includes at least one active area, and an array of pixels is formed in the display area. One or more inactive areas may be disposed around the display area. That is, the non-display area may be adjacent to one or more side surfaces of the display area. In FIG. 1 , the non-display area surrounds the rectangular display area. However, the shape of the display area and the shape/arrangement of the non-display area adjacent to the display area are not limited to the example illustrated in FIG. 1 . The display area and the non-display area may have a shape suitable for designing an electronic device on which the display device 100 is mounted. Exemplary shapes of the display area are pentagonal, hexagonal, circular, oval, and the like.

Each pixel in the display area may be associated with a pixel circuit. The pixel circuit may include one or more switching transistors and one or more driving transistors on a backplane. Each pixel circuit may be electrically connected to a gate line and a data line to communicate with one or more driving circuits such as a gate driver and a data driver located in the non-display area.

As shown in FIG. 1 , the driving circuit may be implemented as a thin film transistor (TFT) in the non-display area. Such a driving circuit may be referred to as a gate-in-panel (GIP). In addition, some components such as data driver IC are mounted on a separate printed circuit board, and circuit films such as FPCB (flexible printed circuit board), COF (chip-on-film), TCP (tape-carrier-package), etc. It may be combined with a connection interface (pad/bump, pin, etc.) disposed in the non-display area by using the . The non-display area may be bent together with the connection interface, so that the printed circuit (COF, PCB, etc.) may be located behind the display device 100 .

The display device 100 may further include a power controller that supplies or controls supply of various voltages or currents to a pixel circuit, a data driver, a gate driver, and the like. Such a power controller is also called a power management integrated circuit (PMIC). Also, as in the illustrated example, the display device 100 may also include a voltage line for supplying a high level voltage VDD, a low level voltage VSS, and a reference voltage VRFE related to driving of a pixel circuit.

Meanwhile, the display device 100 may further include various additional elements for generating various signals or driving pixels in the display area. An additional element for driving the pixel may be an inverter circuit, a multiplexer, an electrostatic discharge circuit, or the like. The display device 100 may also include additional elements related to functions other than pixel driving. For example, the display device 100 may include additional elements that provide a touch sensing function, a user authentication function (eg, fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, and the like. The above-mentioned additional elements may be located in the non-display area and/or in an external circuit connected to the connection interface.

2 is a cross-sectional view schematically illustrating a display area and a non-display area of a display device according to an exemplary embodiment of the present specification.

The illustrated display area A/A and the non-display area I/A may be applied to at least a portion of the display area A/A and the non-display area I/A described in FIG. 1 . Hereinafter, the display device will be described using an organic light emitting display device as an example.

In the case of an organic light emitting display device, in the display area A/A, thin film transistors 102 , 104 , 108 , organic light emitting devices 112 , 114 , 116 and various functional layers are formed on the base layer 101 . are located Meanwhile, in the non-display area I/A, various driving circuits (eg, GIP), electrodes, wirings, functional structures, etc. may be positioned on the base layer 101 .

The base layer 101 supports various components of the organic light emitting diode display 100 . The base layer 101 may be formed of a transparent insulating material, for example, an insulating material such as glass or plastic. The substrate (array substrate) is also referred to as a concept including a device and a functional layer formed on the base layer 101, for example, a switching TFT, a driving TFT, an organic light emitting device, a protective film, and the like.

A buffer layer 130 may be positioned on the base layer 101 . The buffer layer is a functional layer for protecting a thin film transistor (TFT) from impurities such as alkali ions leaking from the base layer 101 or the underlying layers. The buffer layer may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. The buffer layer 130 may include a multi buffer and/or an active buffer.

A thin film transistor is placed on the base layer 101 or the buffer layer. A thin film transistor is a type in which a semiconductor layer, a gate insulator, a gate electrode, an interlayer dielectric layer (ILD), a source and a drain electrode are sequentially stacked. Alternatively, the thin film transistor may have a form in which the gate electrode 104, the gate insulating layer 105, the semiconductor layer 102, and the source and drain electrodes 108 are sequentially disposed as shown in FIG.

The semiconductor layer 102 may be made of polysilicon (p-Si), and in this case, a predetermined region may be doped with an impurity. In addition, the semiconductor layer 102 may be made of amorphous silicon (a-Si) or various organic semiconductor materials such as pentacene. Furthermore, the semiconductor layer 102 may be made of oxide.

The gate electrode 104 may be formed of various conductive materials, for example, magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or an alloy thereof. and the like.

The gate insulating layer 105 and the interlayer insulating layer ILD may be formed of an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), and may also be formed of an insulating organic material. A contact hole through which the source and drain regions are exposed may be formed by selectively removing the gate insulating layer 105 and the interlayer insulating layer.

The source and drain electrodes 108 are formed on the gate insulating layer 105 or the interlayer insulating layer (ILD) in the form of a single layer or a multi-layered electrode material. If necessary, a protective layer 109 made of an inorganic insulating material may cover the source and drain electrodes 108 .

A planarization layer 107 may be disposed on the thin film transistor. The planarization layer 107 protects the thin film transistor and planarizes the top thereof. The planarization layer 107 may be configured in various forms, and may be formed of an organic insulating film such as BCB (Benzocyclobutene) or acrylic (Acryl), or an inorganic insulating film such as a silicon nitride film (SiNx) or a silicon oxide film (SiOx), Various modifications are possible, such as being formed in a single layer or may be configured in double or multiple layers.

The organic light emitting device may have a form in which the first electrode 112 , the organic light emitting layer 114 , and the second electrode 116 are sequentially disposed. That is, the organic light emitting device includes a first electrode 112 formed on the planarization layer 107 , an organic light emitting layer 114 positioned on the first electrode 112 , and a second electrode ( 116) can be configured.

The first electrode 112 is electrically connected to the drain electrode 108 of the driving TFT through a contact hole. When the organic light emitting diode display 100 is a top emission type, the first electrode 112 may be made of an opaque conductive material having high reflectivity. For example, the first electrode 112 may be formed of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. . The first electrode 112 may be an anode of an organic light emitting diode.

The bank 110 is formed in the remaining area except for the light emitting area. Accordingly, the bank 110 has a bank hole exposing the first electrode 112 corresponding to the emission region. The bank 110 may be made of an inorganic insulating material such as a silicon nitride film (SiNx) or a silicon oxide film (SiOx), or an organic insulating material such as BCB, an acrylic resin, or an imide resin.

An organic light emitting layer 114 is located on the first electrode 112 exposed by the bank 110 . The organic light emitting layer 114 may include an emission layer, an electron injection layer, an electron transport layer, a hole transport layer, a hole injection layer, and the like. The organic light emitting layer may have a structure of a single light emitting layer emitting one light, or a structure of emitting white light by being composed of a plurality of light emitting layers.

The second electrode 116 is positioned on the organic light emitting layer 114 . When the organic light emitting diode display 100 is a top emission type, the second electrode 116 is a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). By being formed of a material, light generated from the organic light emitting layer 114 is emitted to the upper portion of the second electrode 116 . The second electrode 116 may be a cathode of an organic light emitting diode.

The encapsulation layer 120 is positioned on the second electrode 116 . The encapsulation layer 120 prevents the penetration of oxygen and moisture from the outside in order to prevent oxidation of the light emitting material and the electrode material. When the organic light emitting device is exposed to moisture or oxygen, a pixel shrinkage phenomenon in which the light emitting area is reduced may occur or a dark spot may occur in the light emitting area. The encapsulation layer is composed of an inorganic film made of glass, metal, aluminum oxide (AlOx) or silicon (Si)-based material, or the organic film 122 and the inorganic films 121-1 and 121-2. The structure may be alternately stacked. At this time, the inorganic layers 121-1 and 121-2 serve to block the penetration of moisture or oxygen, and the organic layer 122 serves to planarize the surfaces of the inorganic layers 121-1 and 121-2. do. When the encapsulation layer is formed as a multi-layered thin film layer, the movement path of moisture or oxygen becomes longer and more complicated than in the case of a single layer, making it difficult for moisture/oxygen to penetrate to the organic light emitting diode.

The barrier film 140 may be positioned on the encapsulation layer 120 to encapsulate the entire base layer 101 . The barrier film 140 may be a retardation film or an optical isotropic film. When the barrier film has a photoisotropic property, the incident light incident on the barrier film is transmitted as it is without a phase delay. In addition, an organic or inorganic film may be further positioned on the upper or lower surface of the barrier film to block the penetration of external moisture or oxygen.

An adhesive layer 145 may be positioned between the barrier film 140 and the encapsulation layer 120 . The adhesive layer 145 adheres the encapsulation layer 120 and the barrier film 140 . The adhesive layer 145 may be a thermally curable or naturally curable adhesive. For example, the adhesive layer 145 may be made of a material such as a barrier pressure sensitive adhesive (B-PSA).

A touch panel (film), a polarizing film, a top cover, and the like may be further positioned on the barrier film 140 .

A pixel circuit is not disposed in the non-display area I/A, but the base layer 101 and the organic/inorganic functional layers 130 , 105 , 107 120 , etc. may exist. In addition, materials used to form the display area A/A may be disposed in the non-display area I/A for different purposes. For example, a metal 104' used as a gate electrode of the display area TFT, or a metal 108' used as a source/drain electrode may be disposed in the non-display area I/A for wiring and electrodes. have. Furthermore, the metal 112 ′ used as one electrode (eg, an anode) of the organic light emitting diode may be disposed in the non-display area I/A for wiring and electrodes.

The base layer 101 , the buffer layer 130 , the gate insulating layer 105 , and the planarization layer 107 of the non-display area I/A are the same as those described in the display area A/A. The dam 190 is a structure that controls the organic layer 122 from spreading too far in the non-display area I/A. Various circuits and electrodes/wires disposed in the non-display area I/A may be made of the gate metal 104 ′ and/or the source/drain metal 108 ′. In this case, the gate metal 104' is formed of the same material as the gate electrode of the TFT in the same process, and the source/drain metal 108' is formed of the same material as the source/drain electrode of the TFT in the same process.

For example, a source/drain metal may be used as a power supply (eg, a base power supply (Vss)) wiring 108 ′. At this time, the power wiring 108 ′ is connected to the metal layer 112 ′, and the cathode 116 of the organic light emitting diode is connected to the source/drain metal 108 ′ and the metal layer 112 ′ for power. can be supplied. The metal layer 112 ′ may be in contact with the power wiring 108 ′ and may extend along the sidewall of the outermost planarization layer 107 to contact the cathode 116 on the planarization layer 107 . The metal layer 112 ′ may be formed of the same material as the anode 112 of the organic light emitting diode and formed in the same process.

The organic light emitting diode display may be damaged by cracks or the like in the inorganic layer of the outer region E due to an external impact. If the damage is large, it may be immediately revealed as a malfunction or a screen abnormality. However, when minute damage occurs, even if the organic light emitting diode display is initially driven normally, the damage spreads through the inorganic layer over time, resulting in poor moisture permeability and/or driving failure.

Although the damage to the outer part of the organic light emitting diode display is an important factor affecting the reliability and lifespan of the product, there is no method for detecting damage such as cracks in advance, making quality control of the organic light emitting display apparatus difficult. there was Accordingly, the present inventors have devised a method and a structure capable of detecting damage to the outer part of the organic light emitting diode display in advance.

3A and 3B are diagrams illustrating a part of a process of forming an outer part of an organic light emitting diode display.

As illustrated in FIG. 2 , the display area (all) and the non-display area (all or part) of the organic light emitting diode display are covered with the encapsulation layer 120 . In this case, the inorganic layers 121-1 and 121-2 are not formed up to the outermost edge of the organic light emitting diode display. The reason is that some areas of the non-display area must be exposed for the placement of interfaces such as pads, and when several display devices are manufactured on the parent substrate and then cut (eg, scribe) to each display device. Since impact/damage may be applied to the inorganic layer, the inorganic layer is not covered in an area separated by a predetermined distance (margin) from the edge.

In order not to place the inorganic layer in a specific region as described above, a mask is used in the process of depositing the inorganic layer. The mask includes an opening region through which the deposition material passes and a closed region blocking the deposition material. The closed region is positioned on a region designed not to place an inorganic layer on one surface of the organic light emitting diode display.

Referring to FIG. 3A , which is an enlarged view of region X of FIG. 1 and FIG. 3B , which is a cross-sectional view thereof, the closed region MSK_RIB of the mask covers the outside of the non-display region. Accordingly, an inorganic layer is not deposited in a region corresponding to the closed region MSK_RIB of the mask among the non-display regions. (In an actual process, the inorganic material may not be completely blocked in the region under the vertical direction of the closed region MSK_RIB of the mask.) ), because arc discharge (ARC) can occur between the closed region (MSK_RIB) of the mask and the underlying metal layer. It is known that the arc discharge is generated when electric charges accumulated on the surface film of the mask leak to the metal on the display device. The arc discharge (ARC) causes serious product damage. Accordingly, in many processes, a design rule forcing a metal layer not to be placed in a region of the display device that is perpendicular to the closed region MSK_RIB of the mask is applied.

In addition, in the non-display area of the organic light emitting diode display, there is a section M2 in which not only the inorganic layer but also all functional layers that may be damaged by impact cannot be disposed. The section M2 is a section spaced apart from the outermost edge EL of the organic light emitting diode display by a predetermined distance, and is also called a scribing margin.

Accordingly, section A including M1 and M2 is a section in which power wiring cannot be formed. Researchers/developers have had a lot of difficulty in reducing the bezel of the organic light emitting diode display because of the sections (M1, M2) required for the non-display area and/or the section (A) where power wiring cannot be arranged. Attempts by researchers/developers to reduce resistance by widening the outer power wiring have also encountered difficulties. Accordingly, the present inventors have derived a new structure by searching for a way to more effectively design/implement the outer part of the organic light emitting diode display.

4A to 4D are views illustrating an outer portion of an organic light emitting diode display according to an exemplary embodiment of the present specification.

4A to 4C illustrate a process of covering an inorganic layer (eg, 121-1 and 121-2 of FIG. 2 ) in a manufacturing process of an organic light emitting diode display according to an exemplary embodiment of the present specification. 4 is a cross-sectional view of the organic light emitting display device. For convenience of description, only a portion of the non-display area I/A and the power wiring 408 of the organic light emitting diode display is illustrated in FIGS. 4A to 4C .

The present inventors have derived an outer wiring design structure that has not been implemented due to the possibility of arc discharge in the prior art. Specifically, the inventors have found a structure in which power wiring can be arranged in a region corresponding to the closed region MSK_RIB of the mask.

In the wiring structure, as shown in FIG. 4A or 4C, a second portion 408b crossing the boundary to the mask closed region MSK_RIB is added in multiple strands to the first portion 408a of the power supply wiring extending around the display area. will be. The reason that the second part 408b is composed of several separate strands (branches, protrusions) is that even if the total area of the metal layer under the mask (especially the closed area) is the same, the metal layer has the shape of one closed figure. This is due to the fact that the total capacitance value is small when the shape is divided into several smaller than when . For example, even if the sum of the areas under the mask is A (=A1+A2+A3), even if it is a metal with an area A (case 1), rather than a single figure with area A (case 1), it is The amount of charge charged between the mask and the one made of the figure (case 2) is small. Therefore, the possibility of arc discharge in case 2 is further reduced.

The organic light emitting display device to which the above structure is applied has a base including a display area A/A in which an array of pixels is arranged and a non-display area I/A surrounding the display area A/A. layer 101; and a power supply wiring 408 disposed in the non-display area I/A of the base layer (A/A) and transmitting power (Vdd, Vref, Vss, etc.) used for driving the pixel. can do. In this case, the power wiring 408 includes a first portion 408a extending around the display area A/A and an outermost edge EL of the base layer 101 from the first portion 408a. ) and a second portion 408b extending toward the . The second portion 408b may have a branch (protrusion) shape extending from the first portion 408a toward the outer EL direction of the display device. Here, the power wiring 408 is a power wiring located at the outermost side (closer to the EL) among the plurality of power wirings (VDD, VREF, VSS, etc.). For example, the power line 408 may be a line that transmits the base power Vss to the cathode 116 of the organic light emitting diode (OLED) included in the pixel. In this case, the power wiring 408 may further include a bad wiring connected to the pad PAD disposed in the non-display area.

4A is a portion X of FIG. 1 , that is, a right portion of the organic light emitting display device 100. In this case, the first portion 408a is a power supply line extending in the vertical direction, and the second portion 408b is It is a branch shape extending horizontally to the right. If the first part 408a is a power supply line at the lower end of the organic light emitting diode display 100 (based on FIG. 1 ), the first part 408a extends in the horizontal direction and the second part 408b ) will be a branch shape extending vertically downwards. As such, the direction in which the first part 408a and the second part 408b extend may be different from each other.

The second portion 408b is provided to suppress arc discharge generated from a mask used in a process of covering the inorganic layer on the power supply wiring 408 . As described above, in the second portion 408b, portions corresponding to the mask (open region and closed region) are separated into a plurality (ie, small portions) to reduce the amount of charge charge.

In the organic light emitting display device, since an inorganic layer is deposited through a mask as shown in FIGS. 4A to 4C , a portion of the power wiring 408 is covered with an inorganic layer, and the remaining area except for the partial area is not covered with an inorganic layer. That is, a portion of the power wiring 408 covered by the mask closed region MSK_RIB may not be covered with the inorganic layer. For example, the portion covered with the inorganic layer may be an entire area of the first portion 408a and a partial area of the second portion 408b of the power wiring. In addition, the portion not covered with the inorganic layer may be the remaining area of the second portion 408b except for the partial area. In order to make the second portion 408b small (thinner), the line width W2 of the second portion 408b may be smaller than the line width W1 of the first portion 408a.

A buffer layer 107 ′ corresponding to a boundary between an open region and a closed region of the mask may be disposed on the second portion 408b. The buffer layer 107 ′ may prevent direct contact between the mask MSK_RIB and the second portion 408b or the organic light emitting diode display. In this case, the buffer layer 107 ′ may be formed of the same material as the planarization layer 107 of the display area A/A in the same process.

The second portion 408b may extend only to a point spaced apart from the outermost edge EL of the base layer 101 by a predetermined distance M2. In this case, the predetermined distance M2 may be a margin required in the process of cutting the outermost edge EL.

FIG. 4D is a cross-sectional view of an organic light emitting diode display to which the power wiring structure illustrated in FIG. 4A or 4C is applied. The components shown in FIG. 4D are the same as those shown in FIG. 2 . However, the power wiring 408 extends more toward the outermost edge than the structure of FIG. 2 , and the buffer layer 107 ′ is disposed thereon.

Meanwhile, as a modified embodiment of FIG. 4A , as shown in FIG. 4C , the power wiring 408 is at the end of the direction in which the second portion 408b extends toward the outermost edge EL of the base layer 101 . It may further include a continuous third portion 408c. The third portion 408c may have a shape in which branches (protrusions) constituting the second portion 408b are gathered from the outside. The third portion 408c has a shape capable of further reducing the resistance thereof by further increasing the area of the power wiring. As shown, the third portion 408c may appear to extend side by side (parallel) with the first portion 408a. The line width W3 of the third portion 408c may be the same as or different from the line width W1 of the first portion 408a.

The design of the outer portion described above can provide a structure that increases the area of the outer wiring without risk of arc discharge. In addition, the above design and structure can respond to the same resistance requirement by making the width of the first portion 408a narrower, so that the width of the bezel can be narrower. Accordingly, it is possible to provide a display device with improved product reliability and aesthetics through the power wiring structure.

Although the embodiments of the present specification have been described in detail with reference to the accompanying drawings, the present specification is not necessarily limited to these embodiments, and various modifications may be made within the scope without departing from the technical spirit thereof. Accordingly, the embodiments disclosed in the present specification are for explanation rather than limiting the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Each feature of the various embodiments of the present invention may be partially or wholly combined or combined with each other, and may be technically variously linked and operated by those skilled in the art, and each embodiment may be implemented independently of each other or together in a related relationship. may be carried out. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

Claims (13)

a base layer including a display area in which an array of pixels is arranged and a non-display area surrounding the display area;
a thin film transistor disposed in the display area on the base layer;
a planarization layer disposed on the thin film transistor to planarize an upper portion of the thin film transistor;
an organic light emitting diode disposed on the planarization layer; and
a bank disposed on the organic light emitting device in an area other than a light emitting area;
and a power supply line disposed in the non-display area of the base layer and transmitting power used to drive the pixel;
A portion of the power wiring is covered with an inorganic layer, and an area other than the partial area is not covered with the inorganic layer. The method of claim 1,
The power wiring is
a first portion extending around the display area and a second portion extending from the first portion toward an outermost edge of the base layer;
An organic light emitting display device wherein an entire area of the first portion and a partial area of the second portion of the power wiring are covered with an inorganic layer, and the remaining area of the second portion is not covered with an inorganic layer. 3. The method of claim 2,
The thin film transistor
a gate electrode disposed on the base layer;
a gate insulating layer disposed on the gate electrode;
a semiconductor layer disposed on the gate insulating layer; and
a source electrode and a drain electrode disposed on the gate insulating layer and covering a portion of the semiconductor layer;
Including, an organic light emitting display device. 4. The method of claim 3,
and a protective layer covering the source electrode and the drain electrode. 5. The method of claim 4,
The organic light emitting device,
a first electrode disposed on the planarization layer and electrically connected to the drain electrode through a contact hole;
an organic light emitting layer disposed on the first electrode; and
and a second electrode disposed on the organic light emitting layer. 6. The method of claim 5,
and an encapsulation layer disposed on the second electrode and covering the display area and the non-display area. 7. The method of claim 6,
The encapsulation layer is
An organic light emitting display device, wherein an inorganic layer or an organic layer and an inorganic layer are alternately stacked. 8. The method of claim 7,
The inorganic layer is
The organic light emitting display device of claim 1, which covers except for a margin required in a process of cutting the outermost edge from the outermost edge of the base layer. 9. The method of claim 8,
and a barrier film disposed on the encapsulation layer to encapsulate the base layer. 10. The method of claim 9,
The power wiring is
The organic light emitting display device, which is formed of the same material as the source electrode and the drain electrode in the same process. 11. The method of claim 10,
The power wiring is
and a wiring connected to a metal layer extending along the outermost side of the planarization layer to transmit base power to the cathode of the organic light emitting diode. 12. The method of claim 11,
The power wiring is
and a pad wire connected to the pad disposed in the non-display area. 13. The method of claim 12,
The power wiring is
and a buffer layer disposed on the second portion corresponding to a boundary between an open region and a closed region of a mask used in a process of covering the inorganic layer on the power wiring.

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