KR20210052527A - Solder paste application method and mask - Google Patents

Abstract

The method of applying the solder paste to the object to be applied (B) is an application region in which at least a part is located in the joint region (P) so as to form an uncoated region (N) in the joint region (P) of the object (B). (T) is provided with a step of applying a solder paste, wherein the application region (T) is a plurality of peripheral regions (A1) arranged at intervals in the circumferential direction around the center (O) of the bonding region (P) Have.

Description

Solder paste application method and mask

The present invention relates to a method and a mask for applying a solder paste.

This application claims priority based on Japanese Patent Application No. 2018-166395 for which it applied to Japan on September 5, 2018, and uses the content here.

Conventionally, a solder paste is widely used for surface mounting (SMT: Surface Mount Technology) in which electronic components such as LGA (Land grid array) and BGA (Ball grid grid array) are mounted on the surface of a printed circuit board or the like. The solder paste is produced by mixing solder powder with the flux. In surface mounting, first, a solder paste is applied to the surface of the printed circuit board on which the pads (electrodes) are provided. At this time, the solder paste is applied to the pad, and the application range is equal to that of the pad. Next, the electronic component is placed on the surface of the printed circuit board so that the pad of the printed circuit board and the land (electrode) of the electronic component face each other. At this time, the solder paste is located between the printed circuit board and both electrodes of the electronic component. Finally, the printed circuit board on which the electronic components are placed is heated (reflowed) in a reflow furnace, and the solder powder of the solder paste is melted and bonded to each other. By connecting electrically, the surface mounting is completed. In order to ensure an appropriate electrical connection, it is necessary that the resistance value of the solder connecting the two electrodes is equal to or less than a predetermined value. Further, even when an impact or the like is applied to the printed circuit board after surface mounting, the solder is required to have a predetermined strength in order to maintain an appropriate electrical connection without being damaged.

In order to apply a solder paste to the surface of a printed circuit board, for example, screen printing using a mask shown in Patent Document 1 is used.

Patent Document 1: Japanese Laid-Open Patent Publication No. 2001-77521

A so-called void may be contained in the solder connecting the two electrodes after the reflow process. The voids are voids formed in the solder, and the voids are filled with a gas formed by vaporization of a resin component of the flux, a solvent of the flux, or the like. When a void is formed, the electrical resistance between both electrodes increases, and there is a possibility that proper electrical connection cannot be secured. In addition, voids cause a decrease in the strength of the solder, and there is a possibility that the electrical connection between the two electrodes cannot be maintained when an impact or the like is applied. Further, relatively small voids sometimes do not cause such problems, and since the voids causing the above problems are relatively large voids, in the field of surface mounting, it is required to suppress the size of the generated voids.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a solder paste coating method and a mask capable of suppressing the size of the void even when voids are formed in the solder during surface mounting.

In order to solve the said subject, this invention employs the following means.

A first aspect of the present invention is a method of applying a solder paste to an object to be applied, wherein a solder paste is applied to an application region in which at least a part is located in the joint region so as to form an uncoated region within the joint region of the object to be applied. A step is provided, and the application region has a plurality of peripheral regions arranged at intervals in the circumferential direction around the center of the bonding region.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed to face each other with the center of the bonding region interposed therebetween.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed to extend in a direction crossing the opposite direction of the plurality of peripheral regions.

In the first aspect of the present invention, the gap between the plurality of peripheral regions may be 30% or more and 70% or less of the maximum diameter of the bonding region.

In the first aspect of the present invention, the gap between the plurality of peripheral regions may be 85.7% or more and 200% or less of the width of each peripheral region in the opposite direction of the plurality of peripheral regions.

In the first aspect of the present invention, the number of the plurality of peripheral regions may be 2 to 6.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged at equal intervals in the circumferential direction.

In the first aspect of the present invention, the plurality of peripheral regions have a first region and a second region having different lengths in the circumferential direction, and the first region and the second region alternate in the circumferential direction. It is okay to be placed as.

In the first aspect of the present invention, opposite sides of the plurality of peripheral regions adjacent to each other in the circumferential direction may be parallel to each other.

In the first aspect of the present invention, the application region may further have a central region located radially inside the plurality of peripheral regions.

In the first aspect of the present invention, the opposite sides of the central region and each peripheral region may be parallel to each other.

In the first aspect of the present invention, the area of the central region may be 44.4% or more and 278% or less of the area of each peripheral region.

In the first aspect of the present invention, the plurality of peripheral regions may be partially disposed to be in contact with each other.

In the first aspect of the present invention, the width of each peripheral region in the circumferential direction may gradually increase as it goes radially outward from the center of the bonding region.

In the first aspect of the present invention, even if the ratio of the gap between the plurality of peripheral regions opened radially outward from the center of the joint region to the total circumference of the joint region is 11.5% or more. Okay.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed so as to overlap the outer edge of the bonding region.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed in the bonding region.

A second aspect of the present invention is a method of applying a solder paste to an object to be applied, wherein a solder paste is applied to an application region in which at least a part is located in the joint region so as to form a non-coated region within the joint region of the object to be applied. A step is provided, and the application region includes a center of the bonding region and has an extended region disposed extending in one direction.

In the second aspect of the present invention, the extended region may be disposed so as to overlap the outer edge of the bonding region.

In the second aspect of the present invention, the extending region may be disposed within the bonding region.

In the second aspect of the present invention, the application region may further include a plurality of lateral regions disposed across the extending region in a direction intersecting the longitudinal direction of the extending region.

In the second aspect of the present invention, the opposite sides of the extending region and each lateral region may be parallel to each other.

In the second aspect of the present invention, the plurality of side regions may be disposed so as to overlap the outer edge of the bonding region.

In the second aspect of the present invention, the plurality of side regions may be disposed in the bonding region.

A third aspect of the present invention is a mask used in the method of applying a solder paste according to the first or second aspect, and an opening is formed at a position corresponding to the application region.

According to the above aspect of the present invention, even when a void is formed in the solder in surface mounting, the size of the void can be suppressed. For this reason, it is possible to secure an appropriate electrical connection between the object to be coated such as a substrate and both electrodes of the electronic component, and to prevent a decrease in the strength of the solder connecting the two electrodes. Therefore, the substrate after surface mounting is resistant to impact. Etc. can be provided.

1 is a schematic diagram showing a solder printing apparatus according to an embodiment of the present invention.
2A is a plan view of a substrate as an object to be applied according to an embodiment of the present invention.
2B is a plan view of a mask used for screen printing according to an embodiment of the present invention.
3 is a schematic diagram showing each step of a method of applying a solder paste according to an embodiment of the present invention.
4 is a schematic diagram showing a step after a solder paste application step in surface mounting.
5 is a plan view showing a solder paste application area in Example 1. FIG.
6 is a plan view showing a solder paste application area in Example 2. FIG.
7 is a plan view showing a solder paste application area in Example 3. FIG.
8 is a plan view showing a solder paste application area in Example 4. FIG.
9 is a plan view showing a solder paste application area in Example 5. FIG.
10 is a plan view showing a solder paste application area in Example 6. FIG.
11 is a plan view showing a solder paste application area in Example 7. FIG.
12 is a plan view showing a solder paste application area in Example 8. FIG.
13 is a plan view showing a solder paste application area in Example 9. FIG.
14 is a plan view showing a solder paste application area in Example 10;
15 is a plan view showing a solder paste application area in Example 11. FIG.
16 is a plan view showing a solder paste application area in Example 12;
17 is a plan view showing a solder paste application area in Example 13. FIG.
18 is a plan view showing a solder paste application area in Example 14;
19 is a plan view showing a solder paste application area in Example 15;
20 is a plan view showing a solder paste application area in Example 16;
21 is a plan view showing a solder paste application area in Example 17;
22 is a plan view showing a solder paste application area in Example 18;
23 is a plan view showing a solder paste application area in Example 19;
24 is a plan view showing a solder paste application area in Example 20;
25 is a plan view showing a solder paste application area in Example 21;
26 is a plan view showing a solder paste application area in Example 22;
27 is a plan view showing a solder paste application region in Example 23;
28 is a plan view showing a solder paste application region in Example 24;
29 is a plan view showing a solder paste application area in Example 25;
30 is a plan view showing a solder paste application area in Example 26;

Hereinafter, a solder printing apparatus and a method of applying a solder paste according to an embodiment of the present invention will be described with reference to the accompanying drawings.

The solder printing apparatus 1 of the present embodiment is a screen printing apparatus using a mask M. As shown in FIG. 1, the solder printing apparatus 1 is positioned vertically above the substrate support 2 and the substrate B as the object to which the solder paste S is applied. It is provided with a printing unit 3 to be arranged, a substrate support 2 and a housing 4 accommodating the printing unit 3. The mask M is held at a predetermined position in the housing 4 by a mask support portion (not shown) fixed to the housing 4 or the like.

The substrate support 2 can move the stage 21 and the stage 21 supported from vertically downward so that the mounting surface of the substrate B faces vertically upward, while being able to move the stage 21 in a horizontal direction and a vertical direction. It is provided with a stage moving part 22 that can be rotated around an axis extending in a direction. The stage 21 is provided with a clamp member 23 for holding the substrate B. Further, the solder printing apparatus 1 is provided with a substrate transfer unit (not shown) for carrying in and out of the substrate B between the substrate support 2 and the outside of the housing 4.

The printing unit 3 includes a squeegee 31 for moving the solder paste S from the surface (upper surface) of the mask M, a vertical moving device 32 capable of lifting the squeegee 31, and , A horizontal movement device 33 capable of horizontally moving the vertical movement device 32 is provided. The squeegee 31 is a member for pressing and spreading the solder paste S supplied on the mask M by moving in the +X direction in the horizontal direction while contacting the surface of the mask M. The squeegee 31 is connected to the vertical movement device 32. The squeegee 31 may be a plate member made of a single material such as metal, resin, rubber, or the like, or may be a plate member in which a portion of a metal plate or the like in contact with the mask M is covered with resin or rubber. The squeegee 31 is disposed so as to be inclined vertically downward toward the -X direction opposite to the +X direction. The inclination angle of this squeegee 31 may be manually or automatically adjustable.

The vertical movement device 32 is supported by the horizontal movement device 33, and is comprised including a ball screw, for example. The vertical movement device 32 can press the lower end of the squeegee 31 against the surface of the mask M with a predetermined force. The horizontal movement device 33 is fixed to the housing 4, a linear guide 34 for guiding the vertical movement device 32 in the horizontal direction, and a ball screw provided parallel to the linear guide 34 A motor 35 for rotating (not shown) is provided. The horizontal moving device 33 can move the vertical moving device 32 connected to the ball screw via a nut member in the horizontal direction by driving the motor 35. Further, the horizontal movement device 33 moves the vertical movement device 32 in the horizontal direction while the squeegee 31 presses the mask M downward by the vertical movement device 32, The squeegee 31 may be moved in the horizontal direction while pressing the mask M. In addition, the solder printing apparatus 1 is provided with a dispenser (not shown) for supplying the solder paste S onto the mask M.

The housing 4 has sufficient rigidity to support the mask support portion or the printing portion 3. The housing 4 may have a structure in which the interior can be airtight. In addition, when applying the solder paste S in a reduced pressure atmosphere, an exhaust device such as a vacuum pump and an air release valve may be provided in the housing 4.

2A is a plan view of the substrate B, and FIG. 2B is a plan view of the mask M. In the present embodiment, the "plan view" refers to a view viewed from a direction perpendicular to the mounting surface of the substrate B and the upper surface of the mask M.

As shown in Fig. 2A, the substrate B to which the solder paste S is applied in the present embodiment is a printed substrate made of a rigid plate-like substrate, and a plurality of pads P are formed on at least one plate surface. ) (Electrodes, junction regions) are arranged. This one plate surface is a mounting surface on which an electronic component E, which will be described later, is mounted. As a material of the pad P, copper, gold, silver, etc. are mentioned. A solder resist having a property of repelling molten solder is applied to regions other than the plurality of pads P of the mounting surface of the substrate B.

As shown in Fig. 2B, the mask M used in the present embodiment is made of a metal plate such as stainless steel, and has a plurality of openings H penetrating in the thickness direction. The thickness of the mask M is, for example, 30 µm to 200 µm, but it may be appropriately changed depending on how much of the solder paste S is applied on the substrate B. In a conventional screen printing mask, an opening is formed in a region equal to that of the pad at a position opposite to the pad of the substrate, but the opening H of the present embodiment is different from the pad P of the substrate B. It has a different plan view shape. That is, to the mask M of the present embodiment, a solder paste S is applied to the coated area in which at least a part is located in the pad P so as to form an uncoated area in the pad P of the substrate B. An opening (H) is formed for it. In other words, the opening H is formed in an equivalent shape at a position corresponding to the application region. The shape of the opening H in the mask M of the present embodiment, that is, the shape of a region where the solder paste S applied to the substrate B is applied, will be described in detail in Examples 1 to 26 described later. In the mask M shown in FIG. 2B, two rectangular openings H are formed for one pad P, and these openings H are opposed to each other with the center of the pad P interposed therebetween. It is arranged facing.

The solder paste S used in this embodiment is not particularly limited, and may be appropriately selected according to the mode of use, such as the application atmosphere, temperature, and the opening size and shape of the mask M. As described above, the solder paste is produced by mixing the solder powder with the flux. As the solder powder, copper, tin, silver, and alloys thereof are used, and the shape of the solder powder may be either spherical or irregular. The flux includes, for example, a resin such as rosin, a solvent for adjusting viscosity, etc., an activator for cleaning the surface of the electrode, and a thixotropic agent for adjusting viscosity, adhesion and thixotropie properties, etc., These contents may be appropriately adjusted according to the mode of use.

Next, a method of applying the solder paste S using the solder printing apparatus 1 of the present embodiment will be described with reference to FIG. 3. In FIG. 3, the configuration of the solder printing apparatus 1 other than the squeegee 31 is omitted.

The substrate B is mounted on the stage 21 by the substrate transfer unit, and the substrate B is held on the stage 21 by the clamp member 23. Subsequently, by the operation of the stage moving part 22, the horizontal position of the substrate B with respect to the fixed mask M and the rotational position around the axis extending in the vertical direction are adjusted, and then the stage moving part 22 The stage 21 is raised from the state shown in Fig. 3(a), and the upper surface (mounting surface) of the substrate B is brought into close contact with the lower surface of the mask M as shown in Fig. 3(b). At this time, since the adjustment of the horizontal position and rotation position of the substrate B by the stage moving part 22 is completed, the opening H of the mask M is appropriate for the pad P of the substrate B. It is placed in a location. That is, when the surface on which the pad P of the substrate B is provided and the mask M are in contact, it corresponds to the area (coated area) of the mask M where the solder paste S is applied to the substrate B. The opening H is formed at the (opposite) position.

Subsequently, as shown in Fig. 3C, the solder paste S is supplied by the dispenser onto the mask M, which is the destination of the squeegee 31, that is, to the +X side of the squeegee 31. Further, the squeegee 31 descends by the drive of the vertical movement device 32 and presses the mask M downward with a predetermined force. In this state, the horizontal movement device 33 moves the vertical movement device 32 in the +X direction, so that the squeegee 31 moves in the +X direction while pressing the mask M. Since the solder paste S is supplied to the position where the squeegee 31 travels, it moves in the +X direction as the squeegee 31 moves. Further, since the squeegee 31 is inclined as described above, a force directed vertically downward is applied to the solder paste S along with its movement. For this reason, as shown in FIG. 3(d), the solder paste S is inserted into the opening H of the mask M, filled, and contacts the upper surface (mounting surface) of the substrate B. In addition, since the squeegee 31 moves in the +X direction while pressing the mask M downward, it can move while scraping the solder paste S from the upper surface of the mask M other than the opening H, and thus the solder paste (S) can be supplied only to the opening (H). When the horizontal movement of the squeegee 31 by the horizontal movement device 33 is completed, the solder paste S is filled in the plurality of openings H of the mask M as shown in FIG. 3 (e). This is done.

Subsequently, as shown in FIG. 3(f), the stage moving part 22 lowers the stage 21, so that the substrate B is spaced downward from the lower surface of the mask M. At this time, since the solder paste S filled in the opening H is attached to the upper surface of the substrate B, this solder paste S is also separated from the mask M, and thus the mask M Solder paste (S) is printed on the mounting surface of the substrate (B) in a pattern along the opening (H). Since the opening H of the mask M has a shape as shown in Fig. 2B, the method of applying the solder paste of the present embodiment is to form an uncoated region in the pad P of the substrate B. , A step of applying a solder paste S to an application region in which at least a part of the pad P is located. The substrate B is separated from the lower surface of the mask M, and the solder paste S is printed on the substrate B, thereby completing the process of applying the solder paste of the present embodiment. The board|substrate B to which the solder paste S was applied is carried out from the soldering printing apparatus 1 by the said board|substrate conveyance part.

Next, a process after the application process of the solder paste of the present embodiment in surface mounting will be described with reference to FIG. 4.

First, as shown in Fig. 4A, the electronic component E is mounted on the mounting surface of the substrate B to which the solder paste S has been applied. The electronic component (E) may be LGA or BGA. A plurality of lands L (electrodes) are provided on the bottom surface (a surface facing the substrate B) of the electronic component E so as to correspond to the plurality of pads P of the substrate B. In the process shown in FIG. 4A, the electronic component E is mounted on the substrate B so that the pad P of the substrate B and the land L of the electronic component E face each other. At this time, the solder paste S is located between the pad P of the substrate B and the land L of the electronic component E.

Subsequently, as shown in Fig. 4B, the substrate B on which the electronic component E is placed is heated in a reflow furnace (not shown), and the solder powder in the solder paste S is melted to form a Bonded, and the molten solder contacts both electrodes of the substrate (B) and the electronic component (E). At this time, by the action of the flux contained in the solder paste (S), the wettability of the molten solder to the pad (P) is improved, and the molten solder is repelled to surfaces other than the pad (P) of the substrate (B). Since the solder resist is applied, the molten solder flows toward the inside of the pad P in the radial direction. That is, even when the solder paste S is applied to two regions as in the present embodiment, they are integrated in the solder reflow process included in the two regions. Thereafter, the molten solder is cooled and solidified to electrically connect the substrate B and both electrodes of the electronic component E by the solder S1. In this way, surface mounting of the electronic component E to the substrate B is completed.

Next, with reference to the drawings, a plurality of specific examples in the method of applying the solder paste of the present embodiment will be described. In addition, in order to compare with these examples, comparative examples corresponding to conventional coating methods were also examined.

In Examples 1 to 26 below, a solder paste application region is described using FIGS. 5 to 30 showing a plan view of the mounting surface of the substrate B, and each plan view is one of the substrate B as a bonding region. It is an enlarged view of the pad P of. In each example, the planar shape of the pad P was made into a circular shape with a diameter of 1.0 mm. In the following description, the direction passing through the center of the pad P and crossing the axis orthogonal to the mounting surface of the substrate B is referred to as the radial direction, and the circumferential direction of the axis is referred to as the circumferential direction. In addition, for convenience, the vertical direction of the paper in each drawing may be simply referred to as "the vertical direction", and the horizontal direction of the paper may be simply referred to as "the left and right direction".

In these Examples and Comparative Examples, the clearance ratio GR, the application area ratio AR, and the maximum void area ratio VR described below were confirmed.

The clearance ratio GR refers to the ratio of the clearance between the plurality of peripheral regions A1 to be described later to the entire circumference of the pad P, which is opened from the center of the pad P toward the outer side in the radial direction. In other words, if it is possible to draw two straight lines extending radially outward from the center of the pad P and not included in both the peripheral area A1, 360° of the angle between these two straight lines The ratio to is taken as the gap ratio GR. In the case where a plurality of pairs of two straight lines in which the peripheral region A1 is not included can be drawn in the meantime, the ratio of the sum of the angles between the two straight lines of each pair to 360° is taken as the clearance ratio GR. In addition, in the calculation of the clearance ratio GR, the existence of the center region A2 to be described later is not considered.

The application area ratio AR refers to the ratio of the entire coating area of the solder paste applied to one pad P to the area of the pad P. In addition, the circumferential ratio π was set to 3.14.

In confirming the maximum void area ratio VR, two test boards were prepared in which 36 pads P were arranged for each example, and solder connections were made to electronic components having the same number of lands, respectively, for each example. A total of 72 solder connection samples of the pads P were obtained. For this solder connection, the method of surface mounting shown in Figs. 3 and 4 was used. The ratio of the area of the voids (area in plan view) to the area of one pad (P) (hereinafter referred to as the void area ratio) was calculated for each of the 72 pads (P), and the largest The void area ratio was referred to as the "maximum void area ratio" in each example. The planar shape of the land of the electronic component was made equal to that of the pad P.

(Comparative example)

In the comparative example, a solder paste was applied to the pad P having a diameter of 1.0 mm in the same area as that of the pad P. This comparative example is represented by "Ref" in Table 1 shown later. In this comparative example, since a plurality of peripheral regions do not exist, the clearance ratio GR cannot be calculated, and the applied area ratio AR is 100%. Moreover, the maximum void area ratio VR was 43.5%.

(Example 1)

An area where the solder paste is applied in Example 1 will be described with reference to FIG. 5.

In the first embodiment, a solder paste is applied to the application region T in which at least a part is located in the pad P so as to form the uncoated region N in the pad P of the substrate B. In Fig. 5, a halftone dot is applied to the region to which the solder paste is applied (the same applies to other Figs. 6 to 30). The application region T has a plurality (two) of peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P. Each peripheral area A1 has a rectangular shape extending in one direction, the length in the long longitudinal direction is 0.7 mm, and the width in the short longitudinal direction orthogonal to the long longitudinal direction is 0.35 mm.

The plurality of peripheral regions A1 are disposed to face each other with the center O of the pad P interposed therebetween.

The plurality of peripheral regions A1 are arranged to extend in a direction orthogonal to the opposite direction of the plurality of peripheral regions A1 (the vertical direction of the paper in FIG. 5 ). That is, each peripheral region A1 extends in the horizontal direction of the paper. Further, a plurality of peripheral regions A1 may be disposed to extend in a direction crossing the opposite direction.

The size of the gap (the gap in the opposite direction) between the plurality of peripheral regions A1 is 0.7 mm. For this reason, the gap between the plurality of peripheral regions A1 is 70% of the maximum diameter (1.0 mm) of the pad P and 200% of the width of each peripheral region A1 in the opposite direction.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The opposite sides a and b of the plurality of peripheral regions A1 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

The plurality of peripheral regions A1 are disposed to overlap the outer edge of the pad P. That is, a part of each peripheral region A1 is located outside of the pad P in the radial direction. Further, a configuration in which all of the plurality of peripheral regions A1 are disposed in the pad P may be used.

When the application area T of this embodiment is divided into 4 by two straight lines that pass through the center O and extend in the vertical and horizontal directions, for example, a straight line extending from the center O to the right side of the paper ( Since the division between L1) and the straight line (L2) extending upward from the center (O) is the same or mirror image as the other three divisions, the angle θ _{G to the 90° between the straight lines (L1, L2)} The ratio of was taken as the clearance ratio GR in this example. In addition, the angle θ _G is the angle between the straight line L1 and the straight line L3 extending radially outward from the center O and in contact with the lower right vertex of the peripheral area A1 on the upper side of the paper. . The peripheral area A1 is not arranged between the straight lines L1 and L3. Therefore, the clearance ratio GR in this embodiment is (arctan(0.35/0.35)/90°)=50%.

The coating area ratio AR of this example is (0.7×0.35×2)/(0.5 ² ×π)=62.4%.

The maximum void area ratio in this example was 2.3%.

(Example 2)

An area where the solder paste is applied in Example 2 will be described with reference to FIG. 6. In the second embodiment, only configurations different from those of the first embodiment will be described below, and descriptions of other configurations will be omitted.

The size of the gap (the gap in the opposite direction) between the plurality of peripheral regions A1 is 0.3 mm. For this reason, the gap between the plurality of peripheral regions A1 is 30% of the maximum diameter (1.0 mm) of the pad P, and is 85.7% of the width of each peripheral region A1 in the opposite direction.

The clearance ratio GR in this example is (arctan(0.15/0.35)/90°) = 25.8%.

The maximum void area ratio in this example was 13.8%.

(Example 3)

An area where the solder paste is applied in Example 3 will be described with reference to FIG. 7. In the third embodiment, only configurations different from those of the first embodiment will be described below, and descriptions of other configurations will be omitted.

The size of the gap (the gap in the opposite direction) between the plurality of peripheral regions A1 is 0.4 mm. For this reason, the gap between the plurality of peripheral regions A1 is 40% of the maximum diameter (1.0 mm) of the pad P, and is 114% of the width of each peripheral region A1 in the opposite direction.

The clearance ratio GR in this example is (arctan(0.2/0.35)/90°)=33%.

The maximum void area ratio in this example was 11.7%.

(Example 4)

A solder paste application area in Example 4 will be described with reference to FIG. 8. In the fourth embodiment, only configurations different from those of the first embodiment will be described below, and descriptions of other configurations will be omitted.

The size of the gap (the gap in the opposite direction) between the plurality of peripheral regions A1 is 0.5 mm. For this reason, the gap between the plurality of peripheral regions A1 is 50% of the maximum diameter (1.0 mm) of the pad P, and is 143% of the width of each peripheral region A1 in the opposite direction.

The clearance ratio GR in this example is (arctan(0.25/0.35)/90°) = 39.5%.

The maximum void area ratio in this example was 7.0%.

(Example 5)

An area where the solder paste is applied in Example 5 will be described with reference to FIG. 9. In the fifth embodiment, only configurations different from those of the first embodiment will be described below, and descriptions of other configurations will be omitted.

The size of the gap (the gap in the opposite direction) between the plurality of peripheral regions A1 is 0.6 mm. For this reason, the gap between the plurality of peripheral regions A1 is 60% of the maximum diameter (1.0 mm) of the pad P, and is 171% of the width of each peripheral region A1 in the opposite direction.

The clearance ratio GR in this example is (arctan(0.3/0.35)/90°)=45.1%.

The maximum void area ratio in this example was 4.2%.

(Review of Examples 1 to 5)

The maximum void area ratio VR of Examples 1 to 5 all became lower than that of the comparative example. For this reason, in all of Examples 1-5, it turns out that the size of the created void was able to be suppressed.

The cause of suppressing the size of the void is examined below. When the molten solder powders are bonded to each other in the reflow process, the resin component of the flux located between the solder powders before melting is pushed outward by bonding of the molten solder. However, when the application area of the solder paste is large, the solder cools and solidifies before the resin component is discharged from the solder, and for this reason, a case where the resin component remains in the solder (i.e., void) is considered. On the other hand, in Examples 1 to 5, the width of each peripheral region A1 is 0.35 mm, and is significantly smaller than the maximum diameter (1.0 mm) of the pad P. For this reason, when the resin component of the flux moves in the short length direction of the peripheral region A1, it is discharged from the molten solder relatively early, so that in each peripheral region A1, the size of the void is suppressed compared to the comparative example. I think.

Further, as shown in Fig. 4, the solder powder in the solder paste applied to the two regions is also integrated in the reflow process. That is, the solder powder melted in the two peripheral regions A1 flows toward the center O of the pad P, and contacts each other near the center of the pad P. Since the flow of the molten solder flowing inward in the radial direction is maintained, the connection point of the molten solder flowing from the two regions expands toward the outside in the radial direction. Since this connection point is expanded toward the outer side in the radial direction, a force is generated to direct the resin component or the like of the flux toward the outer side in the radial direction, and it is considered that the resin component can also be discharged toward the outside of the solder by this force.

In Examples 1 to 5, the gap between the plurality of peripheral regions A1 was 30% or more and 70% or less of the maximum diameter (1.0 mm) of the pad P.

Further, the gap between the plurality of peripheral regions A1 was 85.7% or more and 200% or less of the width of each peripheral region A1 in the opposite direction of the plurality of peripheral regions A1.

(Modification of Examples 1 to 5)

For Examples 1-5, the following modified examples can be considered.

Each peripheral area A1 has a rectangular shape in plan view, but may be an ellipse shape or a long circle shape in plan view. The opposite sides (a, b) of the plurality of peripheral regions (A1) are formed in a linear shape, but a shape in which these opposite sides swell toward the inner side in the radial direction may be sufficient. Any shape is fine. Similarly, the outer side in the radial direction of the peripheral region A1 may be recessed inward in the radial direction or bulge outward in the radial direction.

(Example 6)

An area where the solder paste is applied in the sixth embodiment will be described with reference to FIG. 10.

In the sixth embodiment, a solder paste is applied to the coated region T in which at least a part is located in the pad P so as to form the uncoated region N in the pad P of the substrate B. The coating area T is a plurality of (six) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 has a square shape with a side length of 0.3 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 10.

The plurality of peripheral regions A1 are arranged at substantially equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

Opposite sides a and b of the plurality of peripheral regions A1 adjacent to each other in the circumferential direction are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

The opposite sides c and d between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (c, d) may be non-parallel to each other.

The area of the central area A2 is equal to the area of each peripheral area A1 (100%).

The plurality of peripheral regions A1 are arranged to overlap the outer edge of the pad P. That is, a part of each peripheral region A1 is located outside of the pad P in the radial direction. Further, a configuration in which all of the plurality of peripheral regions A1 are disposed in the pad P may be used.

When the application area T of this embodiment is divided into 4 by two straight lines that pass through the center O and extend in the vertical and horizontal directions, for example, a straight line extending from the center O to the right side of the paper ( Since the division between L1) and the straight line (L2) extending upward from the center (O) is the same or mirror image as the other three divisions, the angle to the 90° between the straight lines (L1, L2) θ _G1 The ratio of the sum and the angle θ _G2 was taken as the clearance ratio GR in this example. The angle θ _G1 is an angle between the straight line L1 and the straight line L3 extending radially outward from the center O and in contact with the vertex of the lower right of the peripheral area A1 at the upper right of the paper, It is represented by arctan(0.1/0.65). The angle θ _G2 is a straight line L4 extending radially outward from the center O and in contact with the vertex of the upper left of the peripheral area A1 above the right-axis of the paper, and extending radially outward from the center O, In addition, as the angle between the straight line L5 in contact with the vertex of the lower right of the peripheral area A1 on the upper side of the paper, it is represented by (arctan(0.35/0.15)-arctan(0.4/0.35)). Therefore, the clearance ratio GR in this embodiment is (θ _G1 +θ _G2 )/90° = 29.7%.

The coating area ratio AR of this example is (0.3 ² x 7)/(0.5 ² x pi) = 80.3%.

The maximum void area ratio in this example was 4.8%.

(Example 7)

A solder paste application region in Example 7 will be described with reference to FIG. 11. In the seventh embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The central area A2 has a square shape with a side length of 0.4 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 11.

The area of the central region A2 is 178% (=0.4 ² /0.3 ² ) of the area of each peripheral region A1.

The clearance ratio GR of the present embodiment is 29.7%, similar to that of the sixth embodiment.

The coating area ratio AR of this example is (0.3 ² x 6 +0.4 ² )/(0.5 ² x pi)=89.2%.

The maximum void area ratio in this example was 3.9%.

(Example 8)

An area where the solder paste is applied in Example 8 will be described with reference to FIG. 12. In the eighth embodiment, only configurations different from those of the sixth embodiment will be described below, and descriptions of other configurations will be omitted.

The central area A2 has a square shape with a side length of 0.5 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 12.

The area of the central region A2 is 278% (=0.5 ² /0.3 ² ) of the area of each peripheral region A1.

The clearance ratio GR of the present embodiment is 29.7%, similar to that of the sixth embodiment.

The coating area ratio AR of this example is (0.3 ² x 6 + 0.5 ² )/(0.5 ² x pi) = 100.6%.

The maximum void area ratio in this example was 13.9%.

(Example 9)

A solder paste application region in Example 9 will be described with reference to FIG. 13. In the ninth embodiment, only configurations different from those of the sixth embodiment will be described below, and descriptions of other configurations will be omitted.

The central area A2 has a square shape with a side length of 0.2 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 13.

The area of the central area A2 is 44.4% (=0.2 ² /0.3 ² ) of the area of each peripheral area A1.

The clearance ratio GR of the present embodiment is 29.7%, similar to that of the sixth embodiment.

The coating area ratio AR of this example is (0.3 ² x 6 + 0.2 ² )/(0.5 ² x pi) = 73.9%.

The maximum void area ratio in this example was 12.3%.

(Example 10)

An area where the solder paste is applied in Example 10 will be described with reference to FIG. 14. In the tenth embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The coating area T is a plurality of (two) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 has a square shape with a side length of 0.3 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 14.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The opposite sides a and b between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

When the application area T of this embodiment is divided into 4 by two straight lines that pass through the center O and extend in the vertical and horizontal directions, for example, a straight line extending from the center O to the right side of the paper ( Since the division between L1) and the straight line (L2) extending upward from the center (O) is the same or mirror image as the other three divisions, the angle θ _{G to the 90° between the straight lines (L1, L2)} The ratio of was taken as the clearance ratio GR in this example. The angle θ _G is an angle between the straight line L1 and the straight line L3 extending radially outward from the center O and in contact with the lower right vertex of the peripheral region A1 on the upper side of the paper. The peripheral area A1 is not arranged between the straight lines L1 and L3. Therefore, the clearance ratio GR in this example is (arctan(0.35/0.15)/90°)=74.2%.

The coating area ratio AR of this example is (0.3 ² × 3)/(0.5 ² × π) = 34.4%.

The maximum void area ratio in this example was 3.1%.

(Example 11)

An area where the solder paste is applied in Example 11 will be described with reference to FIG. 15. In the eleventh embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The coating area T is a plurality of (three) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 15.

The plurality of peripheral regions A1 are arranged at substantially equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The opposite sides a and b between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

When the application area T of this embodiment is divided into two straight lines extending in the vertical direction after passing through the center O, since the right division of the line is a mirror image of the left division, from the center O _{The ratio of the sum of the angles θ G1} , θ _G2 and θ _G3 to 180° between the straight line L1 extending upward and the straight line L2 extending downward from the center O is the clearance ratio GR in this embodiment. I did it. The angle θ _G1 is a straight line L3 extending from the center O to the right side of the paper, and a straight line extending radially outward from the center O and in contact with the lower right vertex of the peripheral area A1 on the upper side of the paper ( It is the angle between L4) and it is expressed as arctan(0.35/0.15). The angle θ _G2 is an angle between a straight line L2 and a straight line L5 extending radially outward from the center O and in contact with the vertex of the lower left of the peripheral area A1 at the lower right of the paper, (90°-arctan(0.45/0.35)). The angle θ _G3 is an angle between the straight line L3 and the straight line L6 extending radially outward from the center O and in contact with the vertex of the upper right of the peripheral area A1 at the lower right of the paper, arctan(0.15/0.65)). Therefore, the clearance ratio GR in this example is (θ _G1 +θ _G2 +θ _G3 )/90°=65.4%.

The coating area ratio AR of this example is (0.3 ² × 4)/(0.5 ² × π) = 45.9%.

The maximum void area ratio in this example was 4.0%.

(Example 12)

A solder paste application area in Example 12 will be described with reference to FIG. 16. In the twelfth embodiment, only configurations different from those of the sixth embodiment will be described below, and descriptions of other configurations will be omitted.

The coating area T is a plurality of (4) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 has a square shape with a side length of 0.3 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 16.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The opposite sides a and b between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

When the application area T of this embodiment is divided into 4 by two straight lines that pass through the center O and extend in the vertical and horizontal directions, for example, a straight line extending from the center O to the right side of the paper ( Since the division between L1) and the straight line (L2) extending upward from the center (O) is the same or mirror image as the other three divisions, the angle θ _{G to the 90° between the straight lines (L1, L2)} The ratio of was taken as the clearance ratio GR in this example. The angle θ _G is a straight line L3 extending radially outward from the center O and in contact with the upper left vertex of the peripheral area A1 on the right side of the paper, and extending radially outward from the center O, and It is the angle between the straight line L4 in contact with the vertex of the lower right of the peripheral area A1 on the upper side of the paper. The peripheral area A1 is not arranged between the straight lines L3 and L4. Therefore, the clearance ratio GR in this embodiment is (arctan(0.35/0.15)-arctan(0.15/0.35))=48.4%.

The application area ratio AR of this example is (0.3 ² × 5)/(0.5 ² × π) = 571%.

The maximum void area ratio in this example was 2.6%.

(Example 13)

An area where the solder paste is applied in Example 13 will be described with reference to FIG. 17. In the thirteenth embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The coating area T is a plurality of (4) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Further, the plurality of peripheral regions A1 has a first region A11 and a second region A12 having different lengths in the circumferential direction, and the first region A11 and the second region A12 are in the circumferential direction. They are arranged alternately. The 1st area|region A11 and the 2nd area|region A12 are provided each two. The first region A11 has a rectangular shape extending in one direction, the length in the long longitudinal direction is 0.6 mm, and the width in the short longitudinal direction orthogonal to the long longitudinal direction is 0.3 mm. Both the second area A12 and the center area A2 have a square shape with a side length of 0.3 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of first areas A11, the plurality of second areas A12, and the center area A2 is shown in FIG. 17.

The opposite sides a and b between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

The clearance ratio GR in this example is calculated in the same manner as in Example 12, and is (arctan(0.35/0.15)-arctan(0.3/0.35))=29.1%.

The coating area ratio AR of this example is (0.6×0.3×2+0.3 ² ×3)/(0.5 ² ×π)=34.6%.

The maximum void area ratio in this example was 1.8%.

(Example 14)

An area where the solder paste is applied in Example 14 will be described with reference to FIG. 18. In the fourteenth embodiment, only configurations different from those of the sixth embodiment will be described below, and descriptions of other configurations will be omitted.

The coating area T is a plurality of (six) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 has a square shape with a side length of 0.3 mm. However, in the peripheral area A1, a portion outside the outer edge of the pad P in the radial direction is excluded. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 18.

Opposite sides a and b of the plurality of peripheral regions A1 adjacent to each other in the circumferential direction are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

The opposite sides c and d between the central region A2 and each peripheral region A1 are parallel to each other. In addition, the opposite sides (c, d) may be non-parallel to each other.

The clearance ratio GR in this example was calculated in the same manner as in Example 6, but since the angle θ _G1 is represented by arcsin (0.05/0.5), the clearance ratio GR is (θ _G1 +θ _G2 )/90° =11.5%.

The application area ratio AR of this example is about 43%.

The maximum void area ratio in this example was 13.8%.

(Examination of Examples 6 to 14)

The maximum void area ratio VR of Examples 6 to 14 all became lower than that of the comparative example. For this reason, it turns out that in all of Examples 6-14, the size of the void|occur|produced void was able to be suppressed.

The cause of suppressing the size of the void is examined below. First, since the peripheral region A1 and the central region A2 are smaller than the application region of the comparative example, it is considered that the resin component of the flux is easily discharged from the molten solder early, as in Examples 1 to 5.

Further, in Examples 6 to 14, all of them have a central region A2, but the solder powder in the solder paste applied to the central region A2 flows outward in the radial direction after melting. In addition, the ratio of the gap between the plurality of peripheral areas A1, which opens from the center O of the pad P toward the outer side in the radial direction, to the total circumference of the pad P, is calculated as the gap ratio GR. Examples 6-14 In all examples, it was found that the openings were opened from the center O toward the outer side in the radial direction through the gap G. For this reason, it is thought that the molten solder from the central region A2 can appropriately flow outward in the radial direction through the gap G, and thereby, the resin component of the flux can be discharged to the outside in the radial direction. .

In Examples 6-14, the area of the central region A2 was 44.4% or more and 278% or less of the area of each peripheral region A1.

(Example 15)

An area where the solder paste is applied in Example 15 will be described with reference to FIG. 19. In the fifteenth embodiment, only configurations different from those of the twelfth embodiment will be described below, and descriptions of other configurations will be omitted.

The fifteenth embodiment has a configuration excluding the center region A2 from the twelfth embodiment.

The clearance ratio GR in this example is the same as in Example 12, and is 48.4%.

The coating area ratio AR of this example is (0.3 ² x 4)/(0.5 ² x pi) = 45.7%.

The maximum void area ratio in this example was 13.4%.

(Example 16)

A solder paste application region in Example 16 will be described with reference to FIG. 20. In the sixteenth embodiment, only configurations different from those of the thirteenth embodiment are described below, and descriptions of other configurations are omitted.

The sixteenth embodiment has a configuration excluding the center area A2 from the thirteenth embodiment.

The clearance ratio GR in this example is the same as in Example 13, and is 29.1%.

The coating area ratio AR of this example is (0.6×0.3×2+0.3 ² ×2)/(0.5 ² ×π)=23.2%.

The maximum void area ratio in this example was 13.8%.

(Review of Examples 15 and 16)

The maximum void area ratio VR of Examples 15 and 16 all became lower than that of the comparative example. For this reason, it turns out that in both Examples 15 and 16, the size of the created voids was able to be suppressed.

If the cause of the suppression of the size of the void is examined below, since the peripheral area (A1) and the center area (A2) are smaller than the application area of the comparative example, the resin component of the flux is easily discharged from the molten solder early. The thing is thought to be the same as in Examples 1-5.

(Example 17)

An area where the solder paste is applied in Example 17 will be described with reference to FIG. 21. In the seventeenth embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The coating area T is a plurality of (six) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 have a circular shape with a diameter of 0.3 mm. The center of each peripheral region A1 is located on the outer peripheral edge of the pad P. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 21.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The area of the central area A2 is equal to the area of each peripheral area A1 (100%).

The plurality of peripheral regions A1 are arranged to overlap the outer edge of the pad P. That is, a part of each peripheral region A1 is located outside of the pad P in the radial direction. Further, a configuration in which all of the plurality of peripheral regions A1 are disposed in the pad P may be used.

The clearance ratio GR in this example is calculated. The angle θ _C is a straight line (L1) extending radially outward from the center (O) and passing through the center of the peripheral area (A1) on the upper right side of the paper, and extending radially outward from the center (O), and It is an angle between the straight line L2 in contact with the upper right peripheral area A1, and is represented by arcsin (0.15/0.5). A peripheral area A1 is located between the straight lines L1 and L2. For this reason, the clearance ratio GR in this example is (180°-6×θ _C )/180°=41.8%.

The coating area ratio AR of this example is (0.15 ² x pi x 7)/(0.5 ² x pi) = 63%.

The maximum void area ratio in this example was 10.9%.

(Example 18)

An area where the solder paste is applied in Example 18 will be described with reference to FIG. 22. In the eighteenth embodiment, only the configuration different from that of the seventeenth embodiment will be described below, and descriptions of other configurations will be omitted.

The central area A2 has a circular shape with a diameter of 0.4 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 22.

The area of the center area A2 is 178% of the area of each peripheral area A1.

The clearance ratio GR in this example is 41.8% as in Example 17.

The coating area ratio AR of this example is (0.15 ² x pi x 6 +0.2 ² x pi)/(0.5 ² x pi)=43.1%.

The maximum void area ratio in this example was 4.6%.

(Example 19)

A solder paste application region in Example 19 will be described with reference to FIG. 23. In the 19th embodiment, only configurations different from those of the 17th embodiment will be described below, and descriptions of other configurations will be omitted.

The central area A2 has a circular shape with a diameter of 0.5 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 23.

The area of the center area A2 is 278% of the area of each peripheral area A1.

The clearance ratio GR in this example is 41.8% as in Example 17.

The coating area ratio AR of this example is (0.15 ² x pi x 6 +0.25 ² x pi)/(0.5 ² x pi)=48.7%.

The maximum void area ratio in this example was 12.4%.

(Example 20)

An area where the solder paste is applied in Example 20 will be described with reference to FIG. 24. In the twentieth embodiment, only configurations different from those of the seventeenth embodiment will be described below, and descriptions of other configurations will be omitted.

The central area A2 has a circular shape with a diameter of 0.2 mm. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 24.

The area of the center area A2 is 44.4% of the area of each peripheral area A1.

The clearance ratio GR in this example is 41.8% as in Example 17.

The coating area ratio AR of this example is (0.15 ² x pi x 6 + 0.1 ² x pi)/(0.5 ² x pi) = 35.7%.

The maximum void area ratio in this example was 17.8%.

(Example 21)

An area where the solder paste is applied in Example 21 will be described with reference to FIG. 25. In the twenty-first embodiment, only configurations different from those of the sixth embodiment are described below, and descriptions of other configurations are omitted.

The coating area T is a plurality of (two) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 have a circular shape with a diameter of 0.3 mm. The center of each peripheral area A1 is located on the outer periphery of the pad P. The center region A2 is arranged so that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 25.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The clearance ratio GR in this example is (180°-2×θ _C )/180°=80.6%, referring to Example 17.

The coating area ratio AR of this example is (0.15 ² x pi x 3)/(0.5 ² x pi) = 27%.

The maximum void area ratio in this example was 3.8%.

(Example 22)

An area to which the solder paste is applied in Example 22 will be described with reference to FIG. 26. In the twenty-second embodiment, only the configuration different from that of the sixth embodiment will be described below, and descriptions of other configurations will be omitted.

The coating area T is a plurality of (4) peripheral areas A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and the plurality of peripheral areas A1 It has a central area (A2) located inside the radial direction. Each of the peripheral area A1 and the central area A2 have a circular shape with a diameter of 0.3 mm. The positional relationship between the plurality of peripheral regions A1 and the central region A2 is shown in FIG. 26.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The clearance ratio GR of this example is (180°-4×θ _C )/180°=61.2%, referring to Example 17.

The coating area ratio AR of this example is (0.15 ² x pi x 5)/(0.5 ² x pi) = 45%.

The maximum void area ratio in this example was 4.9%.

(Review of Examples 17 to 22)

The maximum void area ratio VR of Examples 17 to 22 all became lower than that of the comparative example. For this reason, it is understood that in all of Examples 17 to 22, the size of the generated voids could be suppressed.

The cause of suppressing the size of the void is examined below. First, since the peripheral region A1 and the central region A2 are smaller than the application region of the comparative example, it is considered that the resin component of the flux is easily discharged from the molten solder early, as in Examples 1 to 5.

Further, in Examples 17 to 22, all have the central region A2, but the solder powder in the solder paste applied to the central region A2 flows outward in the radial direction after melting. In addition, the ratio of the gap between the plurality of peripheral areas A1, which opens from the center O of the pad P toward the outer side in the radial direction, to the total circumference of the pad P, is calculated as the gap ratio GR. Examples 17 to 22 In all examples, it was found that the openings were opened from the center (O) toward the outer side in the radial direction through the gap (G). For this reason, it is thought that the molten solder from the central region (A2) can appropriately flow outward in the radial direction through the gap (G), and thereby, the resin component of the flux can be directed outward in the radial direction and discharged. do.

In Examples 17 to 22, the area of the central region A2 was 44.4% or more and 278% or less of the area of each peripheral region A1.

(Example 23)

An area where the solder paste is applied in Example 23 will be described with reference to FIG. 27.

In the 23rd embodiment, solder paste is applied to the coating area T in which at least a part is located in the pad P so as to form the uncoated area N in the pad P of the substrate B. The application region T has a plurality (two) of peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P. The two peripheral regions A1 are arranged to be in contact with each other at a part of the inner side in the radial direction. In this embodiment, the contact points of the two peripheral regions A1 are arranged at the same position as the center O in plan view. The shape of each peripheral area A1 is a right-angled isosceles triangle with a vertex positioned at the center O and a vertex angle of 90°. The length of the bottom side (the side opposite to the vertex) of each peripheral area A1 is 1.0 mm. Further, the distance between the bases of the two peripheral regions A1 is also 1.0 mm. The width of each peripheral region A1 in the circumferential direction gradually expands from the center O of the pad P toward the outer side in the radial direction.

The plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction. In addition, it is not necessary that the plurality of peripheral regions A1 are arranged at equal intervals in the circumferential direction.

The plurality of peripheral regions A1 are arranged to overlap the outer edge of the pad P. That is, a part of each peripheral region A1 is located outside of the pad P in the radial direction. Further, a configuration in which all of the plurality of peripheral regions A1 are disposed in the pad P may be used.

The clearance ratio GR in this example is 50%.

The coating area ratio AR of this example is (1.0 ² /2)/(0.5 ² ×π) = 63.7%.

The maximum void area ratio in this example was 12.5%.

(Example 24)

A solder paste application region in Example 24 will be described with reference to FIG. 28. In the 24th embodiment, only configurations different from those of the 23rd embodiment will be described below, and descriptions of other configurations will be omitted.

The length of the base of each peripheral area A1 is 1.3 mm. Further, the distance between the bases of the two peripheral regions A1 is also 1.3 mm.

The coating area ratio AR of this example is (1.3 ² /2)/(0.5 ² ×π) = 107.6%.

The maximum void area ratio in this example was 14.6%.

(Review of Examples 23 and 24)

The maximum void area ratio VR of Examples 23 and 24 all became lower than that of the comparative example. For this reason, it turns out that in both Examples 23 and 24, the size of the created void was able to be suppressed.

The cause of suppressing the size of the void is examined below. First, since the peripheral region A1 is smaller than the application region of the comparative example, it is considered that the resin component of the flux is easily discharged from the molten solder early, as in Examples 1 to 5.

In addition, although Examples 23 and 24 do not have a central region, the inner portion of the peripheral region A1 in the radial direction reaches the central portion of the pad P. For this reason, the solder powder in the solder paste applied to the inner portion in the radial direction of the peripheral region A1 may flow outward in the radial direction after melting and flow in the left-right direction of the paper. Further, by calculating as the clearance ratio GR, it was found that in all of Examples 23 and 24, the openings were opened from the center O to the radially outward direction through the gap G. For this reason, the molten solder from the radially inner portion of the peripheral region A1 can appropriately flow outward in the radial direction through the gap G, thereby directing the resin component of the flux to the radially outward direction. I think it can be discharged.

(Modification of Examples 23 and 24)

For Examples 23 and 24, the following modifications can be considered.

In these embodiments, two peripheral regions A1 are provided, but the number of peripheral regions A1 may be three or more. In this case, as the width in the circumferential direction of each peripheral region A1 goes outward in the radial direction, the ratio of expansion may be decreased. Further, the contact points of the two peripheral regions A1 may be disposed at a position different from the center O of the pad P in plan view.

(Example 25)

An area where the solder paste is applied in Example 25 will be described with reference to FIG. 29.

In the twenty-fifth embodiment, solder paste is applied to the coated region T in which at least a part is located in the pad P so as to form the uncoated region N in the pad P of the substrate B. The coating area T includes the center O of the pad P and has a continuous area A3 arranged to extend in one direction (in this embodiment, the left-right direction of the paper). The planar shape of the extended region A3 is a rectangle, the length in the long longitudinal direction is 1.3 mm, and the width in the short longitudinal direction is 0.3 mm.

The extended region A3 is disposed so as to overlap the outer edge of the pad P. In other words, a part of the extended region A3 is located outside the pad P in the radial direction. In this embodiment, both ends of the extended region A3 in the longitudinal direction are located outside the pad P in the radial direction. Further, a configuration in which all the extended regions A3 are arranged in the pad P may be sufficient, and only one end of the extended region A3 in the long longitudinal direction may be located outside the radial direction of the pad P.

In this embodiment, since the extended region A3 extends to the outer side in the radial direction of the pad P, the clearance ratio GR cannot be calculated.

The coating area ratio AR of this example is (1.3×0.3)/(0.5 ² ×π)=49.7%.

The maximum void area ratio in this example was 17.5%.

(Example 26)

A solder paste application region in Example 26 will be described with reference to FIG. 30. In the twenty-sixth embodiment, only configurations different from those of the twenty-fifth embodiment will be described below, and descriptions of other configurations will be omitted.

The application region T further has a plurality of (two) lateral regions A4 disposed with the extending region A3 interposed therebetween in a direction intersecting the lengthwise direction of the extending region A3. The planar shape of each lateral region A4 is a square with one side of 0.3 mm in length, and one side thereof extends in the vertical direction of the paper. The positional relationship between the plurality of lateral regions A4 and extended regions A3 is shown in FIG. 30.

The opposite sides a and b of the extended region A3 and each side region A4 are parallel to each other. In addition, the opposite sides (a, b) may be non-parallel to each other.

The plurality of lateral regions A4 are disposed to overlap the outer edge of the pad P. That is, a part of each lateral region A4 is located outside of the pad P in the radial direction. Further, a configuration in which all of the plurality of lateral regions A4 are disposed in the pad P may be used.

The coating area ratio AR of this example is (1.3×0.3+0.3 ² ×2)/(0.5 ² ×π)=72.6%.

The maximum void area ratio in this example was 15.0%.

(Review of Examples 25 and 26)

The maximum void area ratio VR of Examples 25 and 26 all became lower than that of the comparative example. For this reason, it turns out that in both Examples 25 and 26, the size of the created void was able to be suppressed.

If the cause of the suppression of the size of the void is examined below, since the extended region A3 and the lateral region A4 are smaller than the application region of the comparative example, the resin component of the flux is easily discharged from the molten solder early. The thing is thought to be the same as in Examples 1-5.

(Modification of Examples 25 and 26)

For Examples 25 and 26, the following modified examples can be considered.

For example, the number of the plurality of side regions A4 may be three or more.

Table 1 shows the clearance ratio GR, the application area ratio AR, and the maximum void area ratio VR of Examples 1 to 26 described above.

(Table 1)

The maximum void area ratio VR of Examples 1 to 26 all became lower than that of the comparative example. For this reason, it is understood that in all of the examples, the size of the generated voids was suppressed. Therefore, it is possible to secure an appropriate electrical connection between the object to be coated such as a substrate and both electrodes of the electronic component, and also prevent a decrease in the strength of the solder connecting the two electrodes. Can provide.

In the above, although one embodiment of the present invention has been described, the present invention is not limited to the above embodiment. Addition, omission, substitution, and other changes of configurations are possible without departing from the spirit of the present invention.

For example, in the above-described embodiment, the planar shape of the pad P on the substrate B as the object to be applied is circular, but the shape is not limited thereto, and may be, for example, a rectangular or polygonal shape.

In the above embodiment, a printed substrate made of a rigid plate-like substrate is used as the object to be applied, but a flexible substrate may be used as the object to be applied to the solder paste. In addition, when directly connecting another electronic component to one electronic component, a solder paste may be applied to the electrode surface using the one electronic component as an object to be coated. The object to be applied may be any member as long as a solder paste can be applied.

In the above embodiment, screen printing using the mask M is used when applying the solder paste to the object to be applied, but using a dispenser having a discharge nozzle movable on the substrate, the same as those shown in Examples 1 to 26 above. A method of directly applying the solder paste to the application region without using a mask or the like may be used.

In addition, the present invention may include the following aspects.

A fourth aspect of the present invention is a mask for applying a solder paste to an object to be applied, and is opened at a position corresponding to an application region in which at least a part is located in the joint region so as to form a non-coated region within the joint region of the object Is formed, and the opening has a plurality of peripheral openings arranged at intervals in the circumferential direction around the center of the bonding region.

A fifth aspect of the present invention is a mask for applying a solder paste to an object to be applied, wherein an opening is provided at a position corresponding to an application region in which at least a part is located in the joint region so as to form an uncoated region within the joint region of the object It is formed, and the opening includes a center of the bonding region and has an extended opening arranged to extend in one direction.

(Industrial availability)

The present invention can be applied to a method of applying a solder paste to an object to be applied such as a printed circuit board, and a mask used for the application, and even when a void is formed in the solder in surface mounting, the size of the void can be suppressed. .

A1: peripheral area A11: first area
A12: second area A2: center area
A3: Serial area A4: Lateral area
B: Substrate (object to be applied) N: Non-coated area
O: Center P: Pad (joint area)
S: Solder paste T: Application area

Claims (25)

As a method of applying a solder paste to an object to be applied,
A step of applying a solder paste to a coating area in which at least a part is located in the bonding area so as to form an uncoated area in the bonding area of the object to be applied,
The coating area includes a plurality of peripheral areas arranged at intervals in a circumferential direction around a center of the bonding area. The method according to claim 1,
The plurality of peripheral regions are disposed to face each other with the center of the bonding region interposed therebetween. The method according to claim 2,
The plurality of peripheral regions are disposed to extend in a direction crossing the opposite direction of the plurality of peripheral regions. The method according to claim 2 or 3,
The gap between the plurality of peripheral regions is 30% or more and 70% or less of the maximum diameter of the bonding region. The method according to any one of claims 2 to 4,
The gap between the plurality of peripheral regions is 85.7% or more and 200% or less of a width of each peripheral region in a direction opposite to the plurality of peripheral regions. The method according to claim 1,
The number of the plurality of peripheral regions is 2 to 6, the method of applying a solder paste. The method according to claim 1 or 6,
The plurality of peripheral regions are arranged at equal intervals in the circumferential direction. The method according to any one of claims 1, 6, 7,
The plurality of peripheral regions have a first region and a second region having different lengths in the circumferential direction,
The first region and the second region are alternately arranged in the circumferential direction. The method according to any one of claims 1 to 8,
The method of applying a solder paste, wherein opposite sides of the plurality of peripheral regions adjacent to each other in the circumferential direction are parallel to each other. The method according to any one of claims 1 to 9,
The coating region further has a central region positioned radially inside the plurality of peripheral regions. The method of claim 10,
The method of applying a solder paste, wherein opposite sides of the central region and each of the peripheral regions are parallel to each other. The method according to claim 10 or 11,
The area of the central area is 44.4% or more and 278% or less of the area of each peripheral area. The method according to claim 1,
A method of applying a solder paste, wherein the plurality of peripheral regions are partially disposed in contact with each other. The method of claim 13,
A method of applying a solder paste, wherein a width of each peripheral region in the circumferential direction gradually expands from the center of the bonding region toward the outer side in the radial direction. The method according to any one of claims 1 to 14,
A method of applying a solder paste, wherein a ratio of a gap between the plurality of peripheral regions opened from the center of the joint region toward the outer side in the radial direction relative to the entire circumference of the joint region is 11.5% or more. The method according to any one of claims 1 to 15,
The plurality of peripheral regions are disposed to overlap the outer edge of the bonding region. The method according to any one of claims 1 to 15,
The plurality of peripheral regions are disposed in the bonding region. As a method of applying a solder paste to an object to be applied,
A step of applying a solder paste to a coating area in which at least a part is located in the bonding area so as to form an uncoated area in the bonding area of the object to be applied,
The coating area includes a center of the bonding area and has an extended area disposed extending in one direction. The method of claim 18,
The solder paste application method, wherein the extended region is disposed to overlap the outer edge of the bonding region. The method of claim 18,
The solder paste application method, wherein the extended region is disposed in the bonding region. The method according to any one of claims 18 to 20,
The coating region further has a plurality of lateral regions disposed with the extended region interposed therebetween in a direction intersecting the lengthwise direction of the extended region. The method of claim 21,
The method of applying a solder paste, wherein opposite sides of the extended region and each side region are parallel to each other. The method of claim 21 or 22,
A method of applying a solder paste, wherein the plurality of side regions are disposed to overlap the outer edge of the bonding region. The method of claim 21 or 22,
The plurality of lateral regions are disposed in the bonding region, a method of applying a solder paste. As a mask used in the method of applying the solder paste according to any one of claims 1 to 24,
A mask having an opening formed at a position corresponding to the application area.

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