CN112913339A

CN112913339A - Method for coating solder paste and mask

Info

Publication number: CN112913339A
Application number: CN201980069254.XA
Authority: CN
Inventors: 井上剑太; 浅见爱; 高木和顺; 杉浦达也
Original assignee: Senju Metal Industry Co Ltd
Current assignee: Senju Metal Industry Co Ltd
Priority date: 2018-09-05
Filing date: 2019-09-04
Publication date: 2021-06-04
Also published as: KR20210052527A; JPWO2020050330A1; WO2020050330A1; TWI833798B; JP7438116B2; TW202034752A

Abstract

The present invention provides a coating method for coating a solder paste on a coating object (B), the coating method comprises the following steps: and a step of applying solder paste to an application region (T) at least partially located in a joint region (P) of an object (B) to be applied, so as to form a non-application region (N) in the joint region (P), the application region (T) having a plurality of peripheral regions (A1) arranged at intervals in the circumferential direction around the center (O) of the joint region (P).

Description

Method for coating solder paste and mask

Technical Field

The present invention relates to a method of coating a solder paste and a mask.

The present application claims priority based on Japanese patent application No. 2018-166395, filed on 9/5/2018, the contents of which are incorporated herein by reference.

Background

In the past, solder paste has been widely used for Surface Mounting (SMT) in which electronic components such as LGA (land grid array) and BGA (ball grid array) are mounted on the Surface of a printed circuit board or the like. Solder paste is made by mixing solder powder with flux. In surface mounting, first, a solder paste is applied to a surface of a printed board on which pads (electrodes) are provided. At this time, the solder paste is coated on the pad in the same area as the pad. Next, the electronic component is placed on the surface of the printed board so that the pads of the printed board and the lands (electrodes) of the electronic component face each other. At this time, the solder paste is located between two electrodes of the printed circuit board and the electronic component. Finally, the printed board on which the electronic component is mounted is heated (reflowed) in a reflow furnace, and solder powder of the solder paste is melted and bonded to each other, and then cured again, whereby both electrodes are electrically connected to complete surface mounting. In order to ensure proper electrical connection, the resistance value of the solder connecting the electrodes needs to be equal to or lower than a predetermined value. In addition, solder is required to have a predetermined strength in order to maintain appropriate electrical connection without breaking even when a printed circuit board after surface mounting is subjected to an impact or the like.

For applying a solder paste to the surface of a printed circuit board, for example, screen printing using a mask as disclosed in patent document 1 is used.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2001-77521

Disclosure of Invention

The solder connecting the two electrodes after the reflow step may contain so-called voids. The void is formed in the solder, and a gas formed by vaporizing a resin component of the flux, a solvent of the flux, and the like is filled in the void. If a void is formed, the resistance between the electrodes increases, and there is a possibility that proper electrical connection cannot be secured. Further, the voids cause a decrease in the strength of the solder, and when an impact or the like is applied, there is a possibility that the electrical connection between the electrodes cannot be maintained. Further, such a problem may not occur with a relatively small gap, and since the gap causing the above problem is a relatively large gap, it is required to suppress the size of the generated gap in the field of surface mounting.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a method of applying a solder paste and a mask, which can suppress the size of a void even when the void is formed in solder in surface mounting.

In order to solve the above problems, the present invention adopts the following means.

A first aspect of the present invention provides a method of applying solder paste to an object to be applied, the method including: and applying a solder paste to an application region at least partially located within a joint region of an object to be applied so as to form a non-application region within the joint region, the application region having a plurality of peripheral regions arranged at intervals in a circumferential direction around a center of the joint region.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged to face each other with the center of the joining region interposed therebetween.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged to extend in a direction intersecting with a direction in which the plurality of peripheral regions oppose each other.

In the first aspect of the present invention, the gap between the plurality of peripheral regions may be 30% to 70% of the maximum diameter of the joining region.

In the first aspect of the present invention, the gap between the plurality of peripheral regions may be 85.7% or more and 200% or less of the width of each peripheral region in the opposing direction of the plurality of peripheral regions.

In the first aspect of the present invention, the number of the plurality of peripheral regions may be 2 to 6.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged at equal intervals in the circumferential direction.

In the first aspect of the present invention, the plurality of peripheral regions include first regions and second regions having different lengths in the circumferential direction, and the first regions and the second regions are alternately arranged in the circumferential direction.

In the first aspect of the present invention, the opposing sides of the plurality of peripheral regions adjacent in the circumferential direction may be parallel to each other.

In the first aspect of the present invention, the coating region may further have a central region located radially inward of the plurality of peripheral regions.

In the first aspect of the present invention, the opposing sides of the central region and the peripheral regions may be parallel to each other.

In the first aspect of the present invention, the area of the central region may be 44.4% or more and 278% or less of the area of each peripheral region.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed so that a part of the peripheral regions are connected to each other.

In the first aspect of the present invention, the circumferential width of each peripheral region may gradually increase from the center of the joint region toward the radially outer side.

In the first aspect of the present invention, a ratio of a gap between the plurality of peripheral regions, which is open radially outward from a center of the joining region, to a whole periphery of the joining region may be 11.5% or more.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged so as to overlap with an outer edge of the joining region.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed in the joining region.

A second aspect of the present invention provides a method of applying solder paste to an object to be applied, the method including: and applying a solder paste to an application region at least partially located in a bonding region of an object to be applied so as to form a non-application region in the bonding region, the application region having an extension region including a center of the bonding region and arranged to extend in one direction.

In the second aspect of the present invention, the extension region may be disposed so as to overlap with an outer edge of the joining region.

In the second aspect of the present invention, the extension region may be disposed in the joining region.

In the second aspect of the present invention, the application region may further include a plurality of side regions disposed across the extension region in a direction intersecting with a longitudinal direction of the extension region.

In the second aspect of the present invention, the opposite sides of the extension region and the side regions may be parallel to each other.

In the second aspect of the present invention, the plurality of side regions may be arranged to overlap with an outer edge of the joining region.

In the second aspect of the present invention, the plurality of side regions may be disposed in the joining region.

A third aspect of the present invention provides a mask used in the solder paste application method of the first or second aspect, wherein an opening is formed at a position corresponding to the application region.

According to the aspect of the present invention, even when a void is formed in the solder in the surface mounting, the size of the void can be suppressed. Therefore, it is possible to ensure appropriate electrical connection between the object to be coated such as a substrate and the electrodes of the electronic component, and to prevent a decrease in the strength of the solder connecting the electrodes, and thus it is possible to provide a surface-mounted substrate or the like which is resistant to impact.

Drawings

Fig. 1 is a schematic view showing a solder printing apparatus according to an embodiment of the present invention.

Fig. 2A is a plan view of a substrate as an object to be coated according to an embodiment of the present invention.

Fig. 2B is a plan view of a mask for screen printing according to an embodiment of the present invention.

Fig. 3 is a schematic view showing the respective steps of a solder paste coating method according to an embodiment of the present invention.

Fig. 4 is a schematic view showing steps after a solder paste application step in surface mounting.

Fig. 5 is a plan view showing a coating area of the solder paste in example 1.

Fig. 6 is a plan view showing a coating area of the solder paste in example 2.

Fig. 7 is a plan view showing a coating area of the solder paste in example 3.

Fig. 8 is a plan view showing a coating area of the solder paste in example 4.

Fig. 9 is a plan view showing a coating area of the solder paste in example 5.

Fig. 10 is a plan view showing a coating area of the solder paste in example 6.

Fig. 11 is a plan view showing a coating area of the solder paste in example 7.

Fig. 12 is a plan view showing a coating area of the solder paste in example 8.

Fig. 13 is a plan view showing a coating area of the solder paste in example 9.

Fig. 14 is a plan view showing a coating area of the solder paste in example 10.

Fig. 15 is a plan view showing a coating area of the solder paste in example 11.

Fig. 16 is a plan view showing a coating area of the solder paste in example 12.

Fig. 17 is a plan view showing a coating area of the solder paste in example 13.

Fig. 18 is a plan view showing a coating area of the solder paste in example 14.

Fig. 19 is a plan view showing a coating area of the solder paste in example 15.

Fig. 20 is a plan view showing a coating area of the solder paste in example 16.

Fig. 21 is a plan view showing a coating area of the solder paste in example 17.

Fig. 22 is a plan view showing a coating area of the solder paste in example 18.

Fig. 23 is a plan view showing a coating area of solder paste in example 19.

Fig. 24 is a plan view showing a coating area of the solder paste in example 20.

Fig. 25 is a plan view showing a coating area of the solder paste in example 21.

Fig. 26 is a plan view showing a coating area of solder paste in example 22.

Fig. 27 is a plan view showing a coating area of solder paste in example 23.

Fig. 28 is a plan view showing a coating area of the solder paste in example 24.

Fig. 29 is a plan view showing a coating area of solder paste in example 25.

Fig. 30 is a plan view showing a coating area of solder paste in example 26.

Detailed Description

Next, a solder printing apparatus and a method of applying solder paste according to an embodiment of the present invention will be described with reference to the drawings.

The solder printing apparatus 1 of the present embodiment is a screen printing apparatus using a mask M. As shown in fig. 1, the solder printing apparatus 1 includes: a substrate support part 2 which supports a substrate B as an object to which a solder paste S is applied; a printing unit 3 disposed vertically above the substrate support unit 2; and a housing 4 that houses the substrate support portion 2 and the printing portion 3. The mask M is held at a predetermined position in the housing 4 by a mask support portion (not shown) fixed to the housing 4 or the like.

The substrate support portion 2 includes: a table 21 that supports the substrate B from vertically below such that the mounting surface of the substrate B faces vertically above; and a table moving unit 22 that can move the table 21 in the horizontal direction and the vertical direction and can rotate about an axis extending in the vertical direction. A chuck member 23 for holding the substrate B is provided on the table 21. Further, the solder printing apparatus 1 is provided with a substrate transfer unit (not shown) for carrying in and out the substrate B between the substrate support unit 2 and the outside of the housing 4.

The printing section 3 includes: a squeegee 31 for moving the solder paste S on the surface (upper surface) of the mask M; a vertical moving device 32 capable of raising and lowering the squeegee 31; and a horizontal moving device 33 capable of horizontally moving the vertical moving device 32. The squeegee 31 is a member for pushing away the solder paste S supplied onto the mask M by moving in the + X direction in the horizontal direction while contacting the surface of the mask M. The squeegee 31 is connected to a vertical movement device 32. The squeegee 31 may be a plate member made of a single material such as metal, resin, or rubber, or may be a plate member in which a portion of a metal plate or the like that contacts the mask M is covered with resin or rubber. The squeegee 31 is disposed to be inclined vertically downward as it goes toward the-X direction opposite to the + X direction. The angle of inclination of the squeegee 31 can also be adjusted manually or automatically.

The vertical movement device 32 is supported by a horizontal movement device 33, and is configured to include a ball screw, for example. The vertical movement device 32 can press the lower end of the squeegee 31 against the surface of the mask M with a prescribed force. The horizontal movement device 33 is fixed to the housing 4, and includes a linear guide 34 that guides the vertical movement device 32 in the horizontal direction, and a motor 35 that rotates a ball screw (not shown) provided in parallel with the linear guide 34. The horizontal movement device 33 can move the vertical movement device 32 connected to the ball screw via the nut member in the horizontal direction by driving of the motor 35. Further, the horizontal movement device 33 moves the vertical movement device 32 in the horizontal direction in a state where the mask M is pressed downward by the squeegee 31 by the vertical movement device 32, so that the squeegee 31 can move in the horizontal direction while pressing the mask M. The solder printing apparatus 1 is provided with a dispenser (not shown) for supplying the solder paste S onto the mask M.

The housing 4 has a rigidity sufficient to support the mask supporting portion and the printing portion 3. The housing 4 may have a structure capable of sealing the inside thereof. When the solder paste S is applied in a reduced pressure atmosphere, an exhaust device such as a vacuum pump and an atmosphere opening valve may be provided in the case 4.

Fig. 2A is a plan view of the substrate B, and fig. 2B is a plan view of the mask M. In the present embodiment, the "plan view" refers to a view seen from a direction perpendicular to the mounting surface of the substrate B and the upper surface of the mask M.

As shown in fig. 2A, in the present embodiment, the board B to which the solder paste S is applied is a printed board made of a hard plate-like base material, and a plurality of pads P (electrodes, bonding areas) are arranged on at least one surface of the board. The surface of the first surface is a mounting surface on which an electronic component E described later is mounted. The material of the pad P may be copper, gold, silver, or the like. A region other than the plurality of pads P on the mounting surface of the substrate B is coated with a solder resist having a property of repelling molten solder.

As shown in fig. 2B, the mask M used in the present embodiment is made of a metal plate such as stainless steel, and has a plurality of openings H penetrating in the thickness direction. The thickness of the mask M is, for example, 30 μ M to 200 μ M, but may be changed as appropriate depending on the thickness of the solder paste S applied to the substrate B. In the conventional screen printing mask, an opening is formed in a region equivalent to a land of a substrate at a position facing the land, but the opening H of the present embodiment has a shape in plan view different from the land P of the substrate B. That is, in the mask M of the present embodiment, the opening H for applying the solder paste S to the application region at least partially located in the pad P is formed so as to form the non-application region in the pad P of the substrate B. In other words, the opening H is formed in the same shape at a position corresponding to the application region. The shape of the opening H of the mask M of the present embodiment, that is, the shape of the application region of the solder paste S applied to the substrate B, is described in detail in examples 1 to 26 to be described later. In the mask M shown in fig. 2B, two rectangular openings H are formed for one pad P, and these openings H are arranged to face each other across the center of the pad P.

The solder paste S used in the present embodiment is not particularly limited, and may be appropriately selected depending on the application mode such as the coating atmosphere, the temperature, and the size and shape of the opening of the mask M. As described above, the solder paste is made by mixing solder powder with flux. The solder powder uses copper, tin, silver, an alloy thereof, or the like, and the shape of the solder powder may be any of spherical and amorphous. The flux includes, for example, a resin such as rosin, a solvent for adjusting viscosity or the like, an active agent for cleaning the surface of the electrode, and a thixotropic agent for adjusting viscosity, adhesiveness, thixotropy or the like, and the content thereof can be appropriately adjusted according to the mode of use.

Next, a method of applying the solder paste S using the solder printing apparatus 1 of the present embodiment will be described with reference to fig. 3. In fig. 3, the configuration of the solder printing apparatus 1 other than the squeegee 31 is omitted.

The substrate B is placed on the table 21 by the substrate conveying unit, and is held on the table 21 by the clamp member 23. Next, the horizontal position and the rotational position of the substrate B about the axis extending in the vertical direction with respect to the fixed mask M are adjusted by the operation of the stage moving unit 22, and thereafter, the stage moving unit 22 raises the stage 21 from the state shown in fig. 3(a), and brings the upper surface (mounting surface) of the substrate B into close contact with the lower surface of the mask M as shown in fig. 3 (B). At this time, since the adjustment of the horizontal position and the rotational position of the substrate B by the stage moving portion 22 is completed, the opening H of the mask M is disposed at an appropriate position with respect to the pad P of the substrate B. That is, when the surface of the substrate B on which the pads P are provided is in contact with the mask M, the mask M has the opening H formed at a position corresponding to (facing) a region (application region) where the solder paste S is applied to the substrate B.

Next, as shown in fig. 3(c), the solder paste S is supplied onto the mask M of the traveling target of the squeegee 31, that is, the + X side of the squeegee 31, by the dispenser. Further, the squeegee 31 is lowered by driving the vertical movement device 32, and presses the mask M downward with a predetermined force. In this state, the horizontal movement device 33 moves the vertical movement device 32 in the + X direction, and thereby the squeegee 31 moves in the + X direction while pressing the mask M. The solder paste S is supplied to a position of a travel destination of the squeegee 31, and therefore the solder paste S moves in the + X direction along with the movement of the squeegee 31. In addition, since the squeegee 31 is inclined as described above, the solder paste S is applied with a force directed vertically downward along with the movement of the squeegee 31. Therefore, as shown in fig. 3 d, the solder paste S is pressed into and filled in the opening H of the mask M, and comes into contact with the upper surface (mounting surface) of the substrate B. Further, since the squeegee 31 moves in the + X direction while pressing the mask M downward, the squeegee can move while scraping the solder paste S from the upper surface of the mask M other than the opening H, and thus the solder paste S can be supplied only to the opening H. When the horizontal movement of the squeegee 31 by the horizontal movement device 33 is completed, as shown in fig. 3(e), the filling of the plurality of openings H of the mask M with the solder paste S is completed.

Next, as shown in fig. 3(f), the stage 21 is lowered by the stage moving unit 22, whereby the substrate B is separated downward from the lower surface of the mask M. At this time, since the solder paste S filled in the opening H adheres to the upper surface of the substrate B, the solder paste S is also separated from the mask M, whereby the solder paste S is printed on the mount surface of the substrate B in a pattern corresponding to the opening H of the mask M. Since the opening H of the mask M has the shape shown in fig. 2B, the method for applying solder paste of the present embodiment includes a step of applying the solder paste S to the application region at least partially located in the pad P so as to form the non-application region in the pad P of the substrate B. The substrate B is separated from the lower surface of the mask M, and the solder paste S is printed on the substrate B, whereby the solder paste application process of the present embodiment is completed. The substrate B coated with the solder paste S is carried out of the solder printing apparatus 1 by the substrate carrying section.

Next, a process subsequent to the solder paste application process of the present embodiment in surface mounting will be described with reference to fig. 4.

First, as shown in fig. 4(a), an electronic component E is mounted on the mounting surface of the substrate B coated with the solder paste S. The electronic component E may be LGA or BGA. On a bottom surface (a surface facing the substrate B) of the electronic component E, a plurality of lands L (electrodes) are provided so as to correspond to the plurality of pads P of the substrate B. In the step shown in fig. 4(a), the electronic component E is placed on the substrate B such that the pads P of the substrate B and the lands L of the electronic component E face each other. At this time, the solder paste S is located between the pad P of the substrate B and the land L of the electronic component E.

Next, as shown in fig. 4(B), the substrate B on which the electronic component E is placed is heated in a reflow furnace (not shown), the solder powder in the solder paste S is melted and bonded to each other, and the melted solder is brought into contact with both electrodes of the substrate B and the electronic component E. At this time, the wettability of the molten solder with respect to the pad P is improved by the action of the flux contained in the solder paste S, and the solder resist that repels the molten solder is coated on the surface of the substrate B other than the pad P, so that the molten solder flows radially inward of the pad P. That is, even when the solder paste S is applied to the two regions as in the present embodiment, the solder contained in the two regions is integrated in the reflow step. Then, the melted solder is cooled and solidified, whereby the substrate B and the electrodes of the electronic component E are electrically connected by the solder S1. Through the above steps, surface mounting of the electronic component E on the substrate B is completed.

Next, a plurality of specific examples of the solder paste application method of the present embodiment will be explained with reference to the drawings. In addition, in order to compare with these examples, comparative examples corresponding to conventional coating methods were also examined.

In examples 1 to 26 below, the application areas of the solder paste are described with reference to fig. 5 to 30 showing plan views of the mounting surface of the board B, each plan view being an enlarged view of 1 pad P of the board B as a bonding area. In each embodiment, the top view shape of the pad P is a circle having a diameter of 1.0 mm. In the following description, a direction intersecting an axis passing through the center of the pad P and perpendicular to the mounting surface of the substrate B is referred to as a radial direction, and a direction around the axis is referred to as a circumferential direction. For convenience, the vertical direction on the paper surface of each drawing is simply referred to as "vertical direction" and the horizontal direction on the paper surface is simply referred to as "horizontal direction".

In the examples and comparative examples, the following gap ratio GR, coating area ratio AR, and maximum void area ratio VR were confirmed.

The gap ratio GR is a ratio of a gap between a plurality of peripheral regions a1, which will be described later, that open radially outward from the center of the pad P, to the entire periphery of the pad P. In other words, if two straight lines are drawn which extend from the center of the pad P to the radially outer side and any adjacent region a1 is not included therebetween, the ratio of the angle between the two straight lines to 360 ° is defined as the gap ratio GR. When two straight lines between which the peripheral region a1 is not included depict a plurality of pairs, the ratio of the sum of the angles between the two straight lines of each pair to 360 ° is set as the gap ratio GR. In the calculation of the gap ratio GR, the presence of the central region a2 described later is not considered.

The coating area ratio AR means a ratio of the entire coating area of the solder paste applied to one pad P to the area of the pad P. The circumferential ratio pi is 3.14.

In order to confirm the maximum void area ratio VR, 2 test substrates on which 36 pads P are arranged were prepared in each example, and soldering with an electronic component having the same number of lands was performed to obtain a soldering sample having 72 pads P in total in each example. In this welding, the surface mounting method shown in fig. 3 and 4 is used. The ratio of the area of the generated voids (area in a plan view) to the area of one pad P (hereinafter referred to as void area ratio) was calculated for each of the 72 pads P, and the maximum void area ratio was defined as "maximum void area ratio" in each example. The planar shape of the land of the electronic component is the same as that of the pad P.

Comparative example

The comparative example employed a conventional structure in which a solder paste was applied to a pad P having a diameter of 1.0mm in the same area as the pad P. This comparative example is represented by "Ref" in table 1 shown later. In this comparative example, since there are no plurality of peripheral regions, the gap ratio GR cannot be calculated, and the coating area ratio AR is 100%. The maximum void area ratio VR was 43.5%.

(example 1)

The application area of the solder paste in example 1 is explained with reference to fig. 5.

In embodiment 1, a solder paste is coated on at least a part of the coating region T located in the pad P in such a manner that the non-coating region N is formed in the pad P of the substrate B. In fig. 5, a grid is marked on the area where the solder paste is applied (the same applies to the other fig. 6 to 30). The application region T has a plurality of (two) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P. Each peripheral region a1 is a rectangle extending in one direction, and has a length in the longitudinal direction of 0.7mm and a width in the width direction orthogonal to the longitudinal direction of 0.35 mm.

The plurality of peripheral regions a1 are disposed to face each other with the center O of the pad P interposed therebetween.

The plurality of peripheral regions a1 extend in a direction orthogonal to the facing direction (the vertical direction of the sheet in fig. 5) of the plurality of peripheral regions a 1. That is, each peripheral region a1 extends in the left-right direction of the drawing. The plurality of peripheral areas a1 may be arranged to extend in a direction intersecting the opposing direction.

The size of the gap between the plurality of peripheral areas a1 (the gap in the opposite direction) was 0.7 mm. Therefore, the gap between the plurality of peripheral areas a 1% is 70% of the maximum diameter (1.0mm) of the pad P, and 200% of the width of each peripheral area a1 in the opposing direction.

The plurality of peripheral regions a1 are arranged at equal intervals in the circumferential direction. The plurality of peripheral regions a1 may not be arranged at equal intervals in the circumferential direction.

The opposite sides a, b of the plurality of peripheral regions a1 are parallel to each other. In addition, the opposite sides a, b may not be parallel to each other.

The plurality of peripheral regions a1 are arranged to overlap the outer edge of the pad P. That is, a part of each peripheral region a1 is located radially outward of the pad P. Further, all of the plurality of peripheral areas a1 may be disposed in the pad P.

In the case where the application region T of the present embodiment is divided into four regions by two straight lines passing through the center O and extending in the up-down direction and the left-right direction, for example, a straight line L1 extending from the center O to the right side of the sheet and a straight line L1 extending from the center O to the upper side of the sheetThe area between the lines L2 is the same as or a mirror image of the other three areas, and therefore the angle θ will be_GThe ratio of 90 ° to the straight lines L1 and L2 is the gap ratio GR in the present embodiment. In addition, the angle θ_GThis is an angle between the straight line L1 and a straight line L3 extending radially outward from the center O and tangent to a lower right vertex of the peripheral region a1 on the upper side of the paper. The peripheral region a1 is not disposed between the straight lines L1 and L3. Therefore, the gap ratio GR in the present embodiment is (arctan (0.35/0.35)/90 °) equal to 50%.

The coating area ratio AR in this example was (0.7X 0.35X 2)/(0.5)²×π)＝62.4％。

The maximum void area ratio of this example was 2.3%.

(example 2)

The application area of the solder paste in example 2 is explained with reference to fig. 6. In embodiment 2, only the structure different from that of embodiment 1 will be described below, and the description of the other structures will be omitted.

The size of the gap between the plurality of peripheral areas a1 (the gap in the opposite direction) was 0.3 mm. Therefore, the gap between the plurality of peripheral areas a1 is 30% of the maximum diameter (1.0mm) of the pad P, and 85.7% of the width of each peripheral area a1 in the opposing direction.

The gap ratio GR in this example is (arctan (0.15/0.35)/90 °) to 25.8%.

The maximum void area ratio of this example was 13.8%.

(example 3)

The application area of the solder paste in example 3 is explained with reference to fig. 7. In embodiment 3, only the structure different from that of embodiment 1 will be described below, and the description of the other structures will be omitted.

The size of the gap between the plurality of peripheral areas a1 (the gap in the opposite direction) was 0.4 mm. Therefore, the gap between the plurality of peripheral areas a1 is 40% of the maximum diameter (1.0mm) of the pad P, and 114% of the width of each peripheral area a1 in the opposing direction.

The gap ratio GR in this example is (arctan (0.2/0.35)/90 °) 33%.

The maximum void area ratio of this example was 11.7%.

(example 4)

The application area of the solder paste in example 4 is explained with reference to fig. 8. In embodiment 4, only the structure different from that of embodiment 1 will be described below, and the description of the other structures will be omitted.

The size of the gap between the plurality of peripheral areas a1 (the gap in the opposite direction) was 0.5 mm. Therefore, the gap between the plurality of peripheral areas a1 is 50% of the maximum diameter (1.0mm) of the pad P, and 143% of the width of each peripheral area a1 in the opposing direction.

The gap ratio GR in this example is (arctan (0.25/0.35)/90 °) 39.5%.

The maximum void area ratio of this example was 7.0%.

(example 5)

The application area of the solder paste in example 5 is explained with reference to fig. 9. In embodiment 5, only the structure different from that of embodiment 1 will be described below, and the description of the other structures will be omitted.

The size of the gap between the plurality of peripheral areas a1 (the gap in the opposite direction) was 0.6 mm. Therefore, the gap between the plurality of peripheral areas a1 is 60% of the maximum diameter (1.0mm) of the pad P, and 171% of the width of each peripheral area a1 in the opposing direction.

The gap ratio GR in this example is (arctan (0.3/0.35)/90 °) equal to 45.1%.

The maximum void area ratio of this example was 4.2%.

(examination of examples 1 to 5)

The maximum void area ratios VR of examples 1-5 are all lower than those of comparative examples. Therefore, it can be seen that the size of the generated voids can be suppressed in any of examples 1 to 5.

The reason why the size of the voids can be suppressed is examined below. When the solder powders melted in the reflow step are bonded to each other, the resin component of the flux and the like located between the solder powders before being melted are pushed out to the outside by the bonding of the melted solder. However, it is considered that if the application area of the solder paste is large, the solder cools and solidifies before the resin component is discharged from the solder, and thus the resin component remains in the solder (i.e., voids). On the other hand, in embodiments 1 to 5, each peripheral area a1 has a width of 0.35mm, which is significantly smaller than the maximum diameter (1.0mm) of the pad P. Therefore, when the resin component of the flux or the like moves in the width direction of the peripheral area a1, the flux is discharged from the molten solder earlier, and therefore the size of the voids is suppressed in each peripheral area a1 as compared with the comparative example.

As shown in fig. 4, the solder powder applied to the two areas in the solder paste is also integrated in the reflow step. That is, the solder powder melted in the two peripheral areas a1 flows toward the center O of the pad P, and is connected to each other near the center of the pad P. Since the flow of the molten solder toward the radially inner side is maintained, the connecting portion of the molten solder flowing from the two regions expands toward the radially outer side. Since the connecting portion is expanded radially outward, a force for urging the resin component of the flux and the like radially outward is generated, and the resin component can be discharged outward toward the solder by the force.

In examples 1 to 5, the gap between the plurality of peripheral regions a1 was 30% to 70% of the maximum diameter (1.0mm) of the pad P.

The gap between the plurality of peripheral regions a1 is 85.7% to 200% of the width of each peripheral region a1 in the opposing direction of the plurality of peripheral regions a 1.

(modification of examples 1 to 5)

In examples 1 to 5, the following modifications can be considered.

Each peripheral region a1 is rectangular in plan view, but may be oval or oblong in plan view. The opposing sides a, b of the plurality of peripheral regions a1 are formed linearly, but these opposing sides may be formed so as to bulge inward in the radial direction or may be formed so as to be recessed outward in the radial direction. Similarly, the radially outer side of the peripheral region a1 may be recessed radially inward or may bulge radially outward.

(example 6)

The application area of the solder paste in example 6 is explained with reference to fig. 10.

In embodiment 6, a solder paste is coated on at least a part of the coating region T located in the pad P in such a manner that the non-coating region N is formed in the pad P of the substrate B. The coating region T has a plurality of (6) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was a square with one side having a length of 0.3 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 10.

The plurality of peripheral regions a1 are arranged at substantially equal intervals in the circumferential direction. The plurality of peripheral regions a1 may not be arranged at equal intervals in the circumferential direction.

The opposite sides a, b of the plurality of peripheral regions a1 that are circumferentially adjacent are parallel to each other. In addition, the opposite sides a, b may not be parallel to each other.

The opposite sides c, d of the central region a2 and each peripheral region a1 are parallel to each other. In addition, the opposite sides c, d may not be parallel to each other.

The area of the central region a2 is the same as the area of each peripheral region a1 (100%).

In the case where the application region T of the present embodiment is divided into four regions by two straight lines passing through the center O and extending in the up-down direction and the left-right direction, for example, the region between the straight line L1 extending from the center O to the right side of the sheet and the straight line L2 extending from the center O to the upper side of the sheet is the same as or a mirror image of the other three regions, and therefore the angle θ is set to be equal to or a mirror image of the angle θ_G1And angle theta_G2The ratio of the sum of the two values to 90 ° formed between the straight lines L1 and L2 is defined as the gap ratio GR in the present embodiment. Angle theta_G1A straight line L1 and a peripheral region extending radially outward from the center O and above and to the right of the paperThe angle between the straight line L3 tangent to the lower right vertex of A1 is denoted by arctan (0.1/0.65). Angle theta_G2An angle between a straight line L4 extending radially outward from the center O and tangent to the top left vertex of the peripheral region a1 on the right side of the drawing sheet and a straight line L5 extending radially outward from the center O and tangent to the bottom right vertex of the peripheral region a1 on the upper side of the drawing sheet is represented by (arctan (0.35/0.15) -arctan (0.4/0.35)). Therefore, the gap ratio GR of the present embodiment is (θ)_G1+θ_G2)/90°＝29.7％。

The coating area ratio AR in this example was (0.3)²×7)/(0.5²×π)＝80.3％。

The maximum void area ratio of this example was 4.8%.

(example 7)

The application area of the solder paste in example 7 is explained with reference to fig. 11. In example 7, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The central region a2 is a square with one side having a length of 0.4 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 11.

The area of the central region a2 is 178% (═ 0.4) of the area of each peripheral region a1²/0.3²)。

The gap ratio GR in this example was 29.7% as in example 6.

The coating area ratio AR in this example was (0.3)²×6+0.4²)/(0.5²×π)＝89.2％。

The maximum void area ratio of this example was 3.9%.

(example 8)

The application area of the solder paste in example 8 is explained with reference to fig. 12. In embodiment 8, only the structure different from that of embodiment 6 will be described below, and the description of the other structures will be omitted.

The central region a2 is a square with one side having a length of 0.5 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 12.

The area of the central region a2 is 278% (═ 0.5) of the area of each peripheral region a1²/0.3²)。

The gap ratio GR in this example was 29.7% as in example 6.

The coating area ratio AR in this example was (0.3)²×6+0.5²)/(0.5²×π)＝100.6％。

The maximum void area ratio of this example was 13.9%.

(example 9)

The application area of the solder paste in example 9 is explained with reference to fig. 13. In example 9, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The central region a2 is a square with one side having a length of 0.2 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 13.

The area of the central region a2 was 44.4% (═ 0.2) of the area of each peripheral region a1²/0.3²)。

The gap ratio GR in this example was 29.7% as in example 6.

The coating area ratio AR in this example was (0.3)²×6+0.2²)/(0.5²×π)＝73.9％。

The maximum void area ratio of this example was 12.3%.

(example 10)

The application area of the solder paste in example 10 is explained with reference to fig. 14. In example 10, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (2) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was a square with one side having a length of 0.3 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 14.

The opposite sides a, b of the central region a2 and each peripheral region a1 are parallel to each other. In addition, the opposite sides a, b may not be parallel to each other.

In the case where the application region T of the present embodiment is divided into four regions by two straight lines passing through the center O and extending in the up-down direction and the left-right direction, for example, the region between the straight line L1 extending from the center O to the right side of the sheet and the straight line L2 extending from the center O to the upper side of the sheet is the same as or a mirror image of the other three regions, and therefore the angle θ is set to be equal to or a mirror image of the angle θ_GThe ratio of 90 ° to the straight lines L1 and L2 is the gap ratio GR in the present embodiment. Angle theta_GThis is an angle between the straight line L1 and a straight line L3 extending radially outward from the center O and tangent to a lower right vertex of the peripheral region a1 on the upper side of the paper. The peripheral region a1 is not disposed between the straight lines L1 and L3. Therefore, the gap ratio GR in this embodiment is (arctan (0.35/0.15)/90 °) to 74.2%.

The coating area ratio AR in this example was (0.3)²×3)/(0.5²×π)＝34.4％。

The maximum void area ratio of this example was 3.1%.

(example 11)

The application area of the solder paste in example 11 is explained with reference to fig. 15. In example 11, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (3) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 15.

In the case where the application area T of the present embodiment is divided into 2 by a straight line passing through the center O and extending in the up-down direction, since the area on the right side of the straight line is a mirror image of the area on the left side, the angle θ is set_G1、θ_G2And theta_G3The ratio of the sum of the above-described values to 180 ° formed between a straight line L1 extending upward from the center O and a straight line L2 extending downward from the center O is taken as the gap ratio GR in the present embodiment. Angle theta_G1An angle between a straight line L3 extending from the center O to the right side of the drawing sheet and a straight line L4 extending radially outward from the center O and tangent to a right lower vertex of the peripheral region a1 on the upper side of the drawing sheet is represented by arctan (0.35/0.15). Angle theta_G2The angle between the straight line L2 and the straight line L5 extending radially outward from the center O and tangent to the lower left vertex of the lower right peripheral region a1 of the sheet is represented by (90 ° -arctan (0.45/0.35)). Angle theta_G3The angle between the straight line L3 and the straight line L6 extending radially outward from the center O and tangent to the upper right vertex of the peripheral region a1 at the lower right of the paper surface is denoted by arctan (0.15/0.65). Therefore, the gap ratio GR of the present embodiment is (θ)_G1+θ_G2+θ_G3)/90°＝65.4％。

The coating area ratio AR in this example was (0.3)²×4)/(0.5²×π)＝45.9％。

The maximum void area ratio of this example was 4.0%.

(example 12)

The application area of the solder paste in example 12 is explained with reference to fig. 16. In example 12, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (4) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was a square with one side having a length of 0.3 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 16.

In the case where the application region T of the present embodiment is divided into four regions by two straight lines passing through the center O and extending in the up-down direction and the left-right direction, for example, the region between the straight line L1 extending from the center O to the right side of the sheet and the straight line L2 extending from the center O to the upper side of the sheet is the same as or a mirror image of the other three regions, and therefore the angle θ is set to be equal to or a mirror image of the angle θ_GThe ratio of 90 ° to the straight lines L1 and L2 is the gap ratio GR in the present embodiment. Angle theta_GThis is an angle between a straight line L3 extending radially outward from the center O and tangent to the upper left vertex of the peripheral region a1 on the right side of the drawing sheet, and a straight line L4 extending radially outward from the center O and tangent to the lower right vertex of the peripheral region a1 on the upper side of the drawing sheet. The peripheral region a1 is not disposed between the straight lines L3 and L4. Therefore, the gap ratio GR in this embodiment is (arctan (0.35/0.15) -arctan (0.15/0.35)) -48.4%.

The coating area ratio AR in this example was (0.3)²×5)/(0.5²×π)＝57.1％。

The maximum void area ratio of this example was 2.6%.

(example 13)

The application area of the solder paste in example 13 is explained with reference to fig. 17. In example 13, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T includes a plurality of (4) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. The plurality of peripheral regions a1 have first and second regions a11 and a12 having different circumferential lengths, and the first and second regions a11 and a12 are alternately arranged in the circumferential direction. Two first regions a11 and two second regions a12 are provided. The 1 st region a11 is a rectangle extending in one direction, and has a length in the longitudinal direction of 0.6mm and a width in the width direction orthogonal to the longitudinal direction of 0.3 mm. Both the 2 nd area a12 and the central area a2 were squares with one side having a length of 0.3 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship among the plurality of 1 st regions a11, the plurality of 2 nd regions a12, and the central region a2 is shown in fig. 17.

The gap ratio GR in this example was calculated as in example 12, and was equal to 29.1% (arctan (0.35/0.15) — arctan (0.3/0.35)).

The coating area ratio AR in this example was (0.6X 0.3X 2+ 0.3)²×3)/(0.5²×π)＝34.6％。

The maximum void area ratio of this example was 1.8%.

(example 14)

The application area of the solder paste in example 14 is explained with reference to fig. 18. In example 14, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (6) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was a square with one side having a length of 0.3 mm. However, a portion of the peripheral area a1 radially outward from the outer edge of the pad P is excluded. The positional relationship of the plurality of peripheral regions a1 and the central region a2 with respect to each other is shown in fig. 18.

The gap ratio GR of the present example was calculated by the same method as in example 6 above, but the angle θ_G1Expressed by arcsin (0.05/0.5), the gap ratio GR is (θ)_G1+θ_G2)/90°＝11.5％。

The coating area ratio AR of the present example was about 43%.

The maximum void area ratio of this example was 13.8%.

(examination of examples 6 to 14)

The maximum void area ratios VR of examples 6 to 14 are all lower than those of comparative examples. Therefore, it can be seen that the size of the generated voids can be suppressed in any of examples 6 to 14.

The reason why the size of the voids can be suppressed is examined below. First, since the peripheral region a1 and the central region a2 were smaller than the coated region of the comparative example, the resin component of the flux and the like were easily discharged from the molten solder at an early stage, which is the same as in examples 1 to 5.

In examples 6 to 14, all of the solder paste had the central region a2, but the solder powder applied to the central region a2 flowed radially outward after melting. Further, it is understood that the ratio of the gap between the plurality of peripheral regions a1, which is open radially outward from the center O of the pad P, to the entire periphery of the pad P is calculated as the gap ratio GR, and in any of embodiments 6 to 14, the gap is open radially outward from the center O with the gap G therebetween. Therefore, it is considered that the molten solder from the central region a2 can appropriately flow radially outward through the gap G, and the resin component of the flux and the like can be discharged radially outward.

In examples 6 to 14, the area of the central region a2 was 44.4% or more and 278% or less of the area of each peripheral region a 1.

(example 15)

The application area of the solder paste in example 15 is explained with reference to fig. 19. In example 15, only the structure different from that of example 12 will be described below, and the description of the other structures will be omitted.

Example 15 has a structure obtained by excluding the center region a2 from example 12.

The gap ratio GR in this example was 48.4% as in example 12.

The coating area ratio AR in this example was (0.3)²×4)/(0.5²×π)＝45.7％。

The maximum void area ratio of this example was 13.4%.

(example 16)

The application area of the solder paste in example 16 is explained with reference to fig. 20. In example 16, only the structure different from that of example 13 will be described below, and the description of the other structures will be omitted.

Example 16 has a structure obtained by excluding the central region a2 from example 13.

The gap ratio GR in this example was 29.1% as in example 13.

The coating area ratio AR in this example was (0.6X 0.3X 2+ 0.3)²×2)/(0.5²×π)＝23.2％。

The maximum void area ratio of this example was 13.8%.

(examination of examples 15 and 16)

The maximum void area ratios VR of examples 15 and 16 are all lower than those of comparative example. Therefore, it is understood that the size of the generated voids can be suppressed in both examples 15 and 16.

When the reason why the size of the voids can be suppressed is examined below, it is considered that since the peripheral region a1 or the central region a2 is smaller than the application region of the comparative example, the resin component of the flux and the like are easily discharged from the molten solder at an early stage, which is the same as in examples 1 to 5.

(example 17)

The application area of the solder paste in example 17 is explained with reference to fig. 21. In example 17, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (6) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was circular with a diameter of 0.3 mm. The center of each peripheral area a1 is located on the outer periphery of the pad P. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 21.

The gap ratio GR in the present embodiment is calculated. Angle theta_CAn angle between a straight line L1 extending radially outward from the center O and passing through the center of the upper right peripheral region a1 of the drawing and a straight line L2 extending radially outward from the center O and touching the upper right peripheral region a1 of the drawing is represented by arcsin (0.15/0.5). The peripheral region a1 is located between the straight lines L1, L2. Therefore, the gap ratio GR of the present embodiment is (180-6 × θ)_C)/180°＝41.8％。

The coating area ratio AR in this example was (0.15)²×π×7)/(0.5²×π)＝63％。

The maximum void area ratio of this example was 10.9%.

(example 18)

The application area of the solder paste in example 18 is explained with reference to fig. 22. In example 18, only the structure different from that of example 17 will be described below, and the description of the other structures will be omitted.

The central region a2 is circular with a diameter of 0.4 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship of the plurality of peripheral regions a1 and the central region a2 with respect to each other is shown in fig. 22.

The area of the central region a2 is 178% of the area of each peripheral region a 1.

The gap ratio GR in this example was 41.8% as in example 17.

The coating area ratio AR in this example was (0.15)²×π×6+0.2²×π)/(0.5²×π)＝43.1％。

The maximum void area ratio of this example was 4.6%.

(example 19)

The application area of the solder paste in example 19 is explained with reference to fig. 23. In example 19, only the structure different from that of example 17 will be described below, and the description of the other structures will be omitted.

The central region a2 is circular with a diameter of 0.5 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The mutual positional relationship of the plurality of peripheral regions a1 and the central region a2 is shown in fig. 23.

The area of the central region a2 was 278% of the area of each peripheral region a 1.

The gap ratio GR in this example was 41.8% as in example 17.

The coating area ratio AR in this example was (0.15)²×π×6+0.25²×π)/(0.5²×π)＝48.7％。

The maximum void area ratio of this example was 12.4%.

(example 20)

The application area of the solder paste in example 20 is explained with reference to fig. 24. In example 20, only the structure different from that of example 17 will be described below, and the description of the other structures will be omitted.

The central region a2 is circular with a diameter of 0.2 mm. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship of the plurality of peripheral regions a1 and the central region a2 with respect to each other is shown in fig. 24.

The area of the central region a2 was 44.4% of the area of each peripheral region a 1.

The gap ratio GR in this example was 41.8% as in example 17.

The coating area ratio AR in this example was (0.15)²×π×6+0.1²×π)/(0.5²×π)＝35.7％。

The maximum void area ratio of this example was 17.8%.

(example 21)

The application area of the solder paste in example 21 will be explained with reference to fig. 25. In example 21, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T has a plurality of (2) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was circular with a diameter of 0.3 mm. The center of each peripheral area a1 is located on the outer periphery of the pad P. The central region a2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship of the plurality of peripheral regions a1 and the central region a2 with respect to each other is shown in fig. 25.

The gap ratio GR of this embodiment is (180 deg. -2 x theta) with reference to the above-mentioned embodiment 17_C)/180°＝80.6％。

The coating area ratio AR in this example was (0.15)²×π×3)/(0.5²×π)＝27％。

The maximum void area ratio of this example was 3.8%.

(example 22)

The application area of the solder paste in example 22 is explained with reference to fig. 26. In example 22, only the structure different from that of example 6 will be described below, and the description of the other structures will be omitted.

The application region T includes a plurality of (4) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region a2 located radially inward of the plurality of peripheral regions a 1. Each of the peripheral region a1 and the central region a2 was circular with a diameter of 0.3 mm. The positional relationship of the plurality of peripheral regions a1 and the central region a2 with respect to each other is shown in fig. 26.

The gap ratio GR of this embodiment is (180 deg. -4 x theta) with reference to the above-mentioned embodiment 17_C)/180°＝61.2％。

The coating area ratio AR in this example was (0.15)²×π×5)/(0.5²×π)＝45％。

The maximum void area ratio of this example was 4.9%.

(examination of examples 17 to 22)

The maximum void area ratios VR of examples 17 to 22 were all lower than those of comparative examples. Therefore, it is understood that the size of the generated voids can be suppressed in any of examples 17 to 22.

In examples 17 to 22, all of the solder paste had the central region a2, but the solder powder applied to the central region a2 flowed radially outward after melting. Further, it is understood that the ratio of the gap between the plurality of peripheral regions a1, which is open radially outward from the center O of the pad P, to the entire periphery of the pad P is calculated as the gap ratio GR, and in any of examples 17 to 22, the gap is open radially outward from the center O with the gap G therebetween. Therefore, it is considered that the molten solder from the central region a2 can appropriately flow radially outward through the gap G, and the resin component of the flux and the like can be discharged radially outward.

In examples 17 to 22, the area of the central region A2 was 44.4% or more and 278% or less of the area of each peripheral region A1.

(example 23)

The application area of the solder paste in example 23 is explained with reference to fig. 27.

In example 23, a solder paste was applied to at least a part of the application area T located in the pad P in such a manner that the non-application area N was formed in the pad P of the substrate B. The application region T has a plurality of (two) peripheral regions a1 arranged at intervals G in the circumferential direction around the center O of the pad P. The two peripheral regions a1 are arranged so as to be connected to each other at a portion on the radially inner side. In the present embodiment, the connecting portion of the two peripheral areas a1 is arranged at the same position as the center O in plan view. Each peripheral area a1 is shaped as an isosceles right triangle having a vertex at the center O and a vertex angle of 90 degrees. The length of the bottom side (the side opposite to the apex) of each peripheral area a1 was 1.0 mm. In addition, the distance between the bottom edges of the two peripheral areas a1 was also 1.0 mm. The circumferential width of each peripheral region a1 gradually increases from the center O of the pad P toward the radially outer side.

The gap ratio GR in this example is 50%.

The coating area ratio AR in this example was (1.0)²/2)/(0.5²×π)＝63.7％。

The maximum void area ratio of this example was 12.5%.

(example 24)

The application area of the solder paste in example 24 is explained with reference to fig. 28. In example 24, only the structure different from that of example 23 will be described below, and the description of the other structures will be omitted.

The length of the bottom side of each peripheral area a1 was 1.3 mm. In addition, the distance between the bottom edges of the two peripheral areas a1 is also 1.3 mm.

The coating area ratio AR of the present example was (1.3²/2)/(0.5²×π)＝107.6％。

The maximum void area ratio of this example was 14.6%.

(examination of examples 23 and 24)

The maximum void area ratios VR of examples 23 and 24 are all lower than those of comparative example. Therefore, it is understood that the size of the generated voids can be suppressed in both examples 23 and 24.

The reason why the size of the voids can be suppressed is examined below. First, since the peripheral area a1 is smaller than the coated area of the comparative example, the resin component of the flux and the like are easily discharged from the molten solder at an early stage, which is the same as in examples 1 to 5.

In addition, examples 23, 24 do not have the central region, but the radially inner portion of the peripheral region a1 reaches the central portion of the pad P. Therefore, the solder powder in the solder paste applied to the radially inner portion of the peripheral area a1 flows in the right and left direction on the paper surface toward the radially outer side after being melted. In addition, it is understood that both of examples 23 and 24 are opened from the center O toward the radial outside with a gap G therebetween by calculating the gap ratio GR. Therefore, it is considered that the molten solder from the radially inner portion of the peripheral region a1 can appropriately flow radially outward through the gap G, and the resin component of the flux and the like can be discharged radially outward.

(variants of examples 23 and 24)

In examples 23 and 24, the following modifications are conceivable.

In these embodiments, two peripheral regions a1 are provided, but the number of peripheral regions a1 may be 3 or more. In this case, the circumferential width of each peripheral region a1 may be increased radially outward at a smaller ratio. The connection positions of the two peripheral areas a1 may be arranged at positions different from the center O of the pad P in a plan view.

(example 25)

The application area of the solder paste in example 25 is explained with reference to fig. 29.

In example 25, a solder paste was applied to at least a part of the application area T located in the pad P in such a manner that the non-application area N was formed in the pad P of the substrate B. The application region T has an extension region a3 that includes the center O of the pad P and is disposed to extend in one direction (in the present embodiment, the paper surface left-right direction). The extended region a3 has a rectangular shape in plan view, and has a length in the longitudinal direction of 1.3mm and a width in the width direction of 0.3 mm.

The extension a3 is disposed to overlap the outer edge of the pad P. That is, a part of the extension area a3 is located radially outward of the pad P. In the present embodiment, both longitudinal end portions of the extension area a3 are located radially outward of the pad P. Further, the entire extension region A3 may be disposed in the pad P, or only one end portion in the longitudinal direction of the extension region A3 may be located radially outward of the pad P.

In the present embodiment, the extension region a3 reaches the radially outer side of the pad P, and therefore, the gap ratio GR cannot be calculated.

The coating area ratio AR in this example was (1.3X 0.3)/(0.5)²×π)＝49.7％。

The maximum void area ratio of this example was 17.5%.

(example 26)

The application area of the solder paste in example 26 is explained with reference to fig. 30. In example 26, only the structure different from that of example 25 will be described below, and the description of the other structures will be omitted.

The application region T further has a plurality of (2) side regions a4 disposed across the extension region A3 in a direction intersecting the longitudinal direction of the extension region A3. The shape of each side region a4 in plan view is a square with one side having a length of 0.3mm, and one side extends in the vertical direction on the paper surface. The positional relationship between the plurality of side regions a4 and the extension region A3 is shown in fig. 30.

The opposite sides a, b of the extension region A3 and each side region a4 are parallel to each other. In addition, the opposite sides a, b may not be parallel to each other.

The plurality of side regions a4 are arranged to overlap the outer edge of the pad P. That is, a part of each side region a4 is located radially outward of the pad P. Further, all of the plurality of side regions a4 may be disposed in the pad P.

The coating area ratio AR in this example was (1.3X 0.3+ 0.3)²×2)/(0.5²×π)＝72.6％。

The maximum void area ratio of this example was 15.0%.

(examination of examples 25 and 26)

The maximum void area ratios VR of examples 25 and 26 are all lower than those of comparative example. Therefore, it is understood that the size of the generated voids can be suppressed in both examples 25 and 26.

When the reason why the size of the voids can be suppressed is examined below, it is considered that the resin component of the flux and the like are easily discharged from the molten solder at an early stage because the extension region A3 and the side region a4 are smaller than the application region of the comparative example, which is the same as in examples 1 to 5.

(variants of examples 25 and 26)

In examples 25 and 26, the following modifications are conceivable.

For example, the number of the plurality of side regions a4 may be 3 or more.

The gap ratios GR, the coating area ratios AR, and the maximum void area ratios VR in examples 1 to 26 are shown in table 1.

[ Table 1]

Examples	Gap ratio GR [ ]]	Coating area ratio AR [% ]]	Maximum void area ratio VR [% ]]
				Ref	-	100.0	43.5
1	50.0	62.4	2.3
				2	25.8	62.4	13.8
3	33.0	62.4	11.7
				4	39.5	62.4	7.0
5	45.1	62.4	4.2
				6	29.7	80.3	4.8
7	29.7	89.2	3.9
				8	29.7	100.6	13.9
9	29.7	73.9	12.3
				10	74.2	34.4	3.1
11	65.4	45.9	4.0
				12	48.4	57.1	2.6
13	29.1	34.6	1.8
				14	11.5	43.0	13.8
15	48.4	45.7	13.4
				16	29.1	23.2	13.8
17	41.8	63.0	10.9
				18	41.8	43.1	4.6
19	41.8	48.7	12.4
				20	41.8	35.7	17.8
21	80.6	27.0	3.8
				22	61.2	45.0	4.9
23	50.0	63.7	12.5
				24	50.0	107.6	14.6
25	-	49.7	17.5
				26	-	72.6	15.0

The maximum void area ratios VR of examples 1 to 26 are all lower than those of comparative examples. Therefore, it can be seen that in all the embodiments, the size of the generated voids can be suppressed. Therefore, it is possible to ensure appropriate electrical connection between an object to be coated such as a substrate and both electrodes of an electronic component, and to prevent a decrease in strength of solder connecting both electrodes, and thus to provide an impact-resistant surface-mounted substrate or the like.

While one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment. Additions, omissions, substitutions, and other changes in the structure can be made without departing from the spirit of the invention.

For example, in the above embodiment, the shape of the pad P on the substrate B as the object to be coated is circular in a plan view, but the invention is not limited thereto, and may be, for example, rectangular or polygonal.

In the above embodiment, the printed board made of a hard plate-like base material is used as the object to be coated, but a flexible board may be used as the object to be coated with the solder paste. When another electronic component is directly connected to one electronic component, the one electronic component may be an object to be coated, and solder paste may be applied to the electrode surface. The object to be coated may be any member as long as it can be coated with solder paste.

In the above-described embodiment, the screen printing using the mask M is used when applying the solder paste to the object to be coated, but a method of directly applying the solder paste to the coating area as shown in the above-described examples 1 to 26 without using a mask or the like may be used using a dispenser having a discharge nozzle that is movable on the substrate.

The present invention may include the following embodiments.

A fourth aspect of the present invention provides a mask for applying a solder paste to an object to be applied, the mask having an opening formed at a position corresponding to an application region at least a part of which is located within a bonding region so that a non-application region is formed within the bonding region of the object to be applied, the opening having a plurality of peripheral openings arranged at intervals in a circumferential direction around a center of the bonding region.

A fifth aspect of the present invention provides a mask for applying a solder paste to an object to be applied, wherein an opening having an extended opening extending in one direction and including a center of a bonding region is formed in a position corresponding to an application region at least a part of which is located in the bonding region so that a non-application region is formed in the bonding region of the object to be applied.

INDUSTRIAL APPLICABILITY

The present invention is applicable to a method of applying solder paste to an object to be applied such as a printed circuit board, and a mask used for the application, and can suppress the size of a void even when the void is formed in solder in surface mounting.

Description of the symbols

Peripheral region of A1

A11 first region

A12 second region

Central region of A2

Extended area of A3

Side area of A4

B substrate (coating object)

N non-coated area

O center

P pad (bonding region)

S solder paste

T coating zone

Claims

1. A method for applying solder paste to an object to be applied, the method comprising: a step of applying a solder paste to a coating region at least partially located in a bonding region of an object to be coated so as to form a non-coating region in the bonding region,

the coating region has a plurality of peripheral regions arranged at intervals in a circumferential direction around a center of the joining region.

2. A method of applying solder paste according to claim 1, wherein the plurality of peripheral regions are arranged to face each other with a center of the joining region interposed therebetween.

3. A method of applying solder paste according to claim 2, wherein the plurality of peripheral regions are arranged so as to extend in a direction intersecting with a direction of opposition of the plurality of peripheral regions.

4. A method of applying a solder paste according to claim 2 or 3, wherein a gap between the plurality of peripheral regions is 30% or more and 70% or less of a maximum diameter of the joining region.

5. A method of applying a solder paste according to any one of claims 2 to 4, wherein the gap between the plurality of peripheral regions is 85.7% or more and 200% or less of the width of each peripheral region in the opposing direction of the plurality of peripheral regions.

6. A coating method of a solder paste according to claim 1, wherein the number of the plurality of peripheral areas is 2 to 6.

7. A method of applying solder paste according to claim 1 or 6, wherein the plurality of peripheral areas are arranged at equal intervals in the circumferential direction.

8. A method of applying solder paste according to claim 1, 6 or 7, wherein the plurality of peripheral regions have first regions and second regions different in length in the circumferential direction, the first regions and the second regions being alternately arranged in the circumferential direction.

9. A coating method of a solder paste according to any one of claims 1 to 8, wherein opposite sides of the plurality of peripheral areas adjacent in the circumferential direction are parallel to each other.

10. A method of coating of solder paste according to any one of claims 1 to 9, wherein the coating region further has a central region located radially inward of the plurality of peripheral regions.

11. A paste coating method according to claim 10, wherein the opposite sides of the central area and each peripheral area are parallel to each other.

12. A method of applying a solder paste according to claim 10 or 11, wherein the area of the central region is 44.4% or more and 278% or less of the area of each peripheral region.

13. A coating method of a solder paste according to claim 1, wherein the plurality of peripheral areas are arranged so as to be partially connected to each other.

14. A paste spreading method according to claim 13, wherein the circumferential width of each peripheral area gradually expands from the center of the joint area toward a radially outer side.

15. A method of applying solder paste according to any one of claims 1 to 14, wherein a proportion of gaps between the plurality of peripheral regions, which open from the center of the joining region toward the radially outer side, with respect to the entire circumference of the joining region is 11.5% or more.

16. A method of applying solder paste according to any one of claims 1 to 15, wherein the plurality of peripheral regions are arranged so as to overlap with an outer edge of the joining region.

17. A method of applying solder paste according to any one of claims 1 to 15, wherein the plurality of peripheral regions are arranged within the joint region.

18. A method for applying solder paste to an object to be applied, the method comprising: a step of applying a solder paste to a coating region at least partially located in a bonding region of an object to be coated so as to form a non-coating region in the bonding region,

the coating region has an extension region including the center of the bonding region and extending in one direction.

19. A method of applying solder paste according to claim 18, wherein the extension region is arranged so as to overlap with an outer edge of the joining region.

20. A method of applying solder paste according to claim 18, wherein the extension region is arranged within the joining region.

21. A method of applying solder paste according to any one of claims 18 to 20, wherein the application region further has a plurality of side regions arranged across the extended region in a direction intersecting with a longitudinal direction of the extended region.

22. A paste spreading method according to claim 21, wherein the opposite sides of said extension area and each side area are parallel to each other.

23. A method of applying solder paste according to claim 21 or 22, wherein the plurality of side regions are arranged so as to overlap with an outer edge of the joining region.

24. A method of applying solder paste according to claim 21 or 22, wherein the plurality of side areas are arranged within the joint area.

25. A mask used in the method for coating a solder paste according to any one of claims 1 to 24, wherein an opening is formed at a position corresponding to the coating region.