KR20200114980A - Display pannel and driving method of the display panel - Google Patents

Abstract

Disclosed is a display panel. A display panel including a plurality of pixels includes: a plurality of light emitting elements configured to constitute each pixel of the plurality of pixels; and a plurality of pixel circuits for driving the plurality of light emitting elements, wherein the plurality of pixel circuits includes a first pixel circuit for pulse width modulation (PWM)-driving a first light emitting element among the plurality of light emitting elements, and a second pixel circuit for pulse amplitude modulation (PAM)-driving a second light emitting element among the plurality of light emitting elements, thereby securing a range of PWM data voltages capable of stably expressing gray levels.

Description

Display panel and its driving method {DISPLAY PANNEL AND DRIVING METHOD OF THE DISPLAY PANEL}

The present disclosure relates to a display panel and a method of driving the display panel, and more particularly, to a display panel in which a light emitting element constitutes a pixel and a method of driving the display panel.

In recent years, a display panel that displays an image through light-emitting elements such as red LED (Light Emitting Diode), green LED, and blue LED has been developed. In this case, each pixel of the display panel is composed of a plurality of sub-pixels, and each sub-pixel is composed of a light emitting device. In this case, the light emitting device may be implemented as a micro LED.

In such a display panel, when the gradation of sub-pixels is expressed through the PAM (Pulse Amplitude Modulatio) driving method, not only the gradation of the emitted light but also the wavelength changes according to the amplitude of the driving current, reducing the color reproducibility of the image There was a problem. 1 shows a wavelength change according to the magnitude (or amplitude) of driving current flowing through a blue LED, a green LED, and a red LED.

In addition, when sub-pixels are implemented through light-emitting elements, a pixel circuit for driving them is required for each light-emitting element. In this case, when the pixel circuit occupies a large area in the display panel, there is a problem that a high-resolution display panel cannot be provided.

An object of the present disclosure is a display panel capable of providing a high-resolution display panel by optimizing the design of a driving circuit for driving an LED, which is an inorganic light emitting element mounted on a substrate, for an input video signal and improving color reproducibility. And it is to provide a driving method thereof.

In addition, an object of the present disclosure is to provide a display panel capable of securing a range of a PWM data voltage capable of stably expressing gray levels, and a driving method thereof.

A display panel including a plurality of pixels according to an exemplary embodiment of the present disclosure for achieving the above object includes a plurality of light emitting devices constituting each pixel and a plurality of pixel circuits for driving the plurality of light emitting devices. The plurality of pixel circuits include a first pixel circuit for driving a pulse width modulation (PWM) of a first light emitting element among the plurality of light emitting elements, and a pulse amplitude modulation (PAM) of a second light emitting element among the plurality of light emitting elements. And a second pixel circuit for driving.

In this case, the plurality of light emitting devices include a red (R) light emitting device, a green (G) light emitting device, and a blue (B) light emitting device, the first light emitting device includes the green light emitting device, and the second The light-emitting device may include the red light-emitting device and the blue light-emitting device.

Also, the size of the first pixel circuit may be larger than the size of the second pixel circuit.

In addition, each of the plurality of light emitting devices emits light based on a driving current provided from a pixel circuit for driving each light emitting device among the plurality of pixel circuits, and the first pixel circuit transmits light to the first pixel circuit. A first driving current having an amplitude corresponding to the applied PAM data voltage is provided to the first light-emitting element for a time corresponding to the PWM data voltage applied to the first pixel circuit, and the second pixel circuit is the second A second driving current having an amplitude corresponding to the PAM data voltage applied to the pixel circuit may be provided to the second light emitting device.

In addition, the gradation of light emitted from the first light emitting device is controlled by a time when the first driving current is provided to the first light emitting device according to the magnitude of the PWM data voltage, and is emitted from the second light emitting device. The gray level of light may be controlled by the amplitude of the second driving current according to the magnitude of the PAM data voltage.

In addition, each of the plurality of light emitting devices may be a micro LED.

Meanwhile, the first pixel circuit changes the voltage of the terminal of the first pixel circuit according to the sweep voltage applied to the first pixel circuit to convert a driving current of a pulse width corresponding to the PWM data voltage to the first light emitting element. In addition, the sweep voltage may be a voltage that changes from the first voltage to the second voltage and then linearly changes from the second voltage.

In this case, the first pixel circuit includes a transistor, and a pulse width of the driving current may be controlled by performing a switching operation of the transistor based on a voltage of the gate terminal of the transistor that is changed according to the sweep voltage. .

In addition, the sweep voltage may be a voltage that increases with time from the second voltage during the light emission period after the step increases from the first voltage to the second voltage before the light emission period of the first light emitting device.

Further, the voltage of the gate terminal of the driving transistor increases by the difference between the second voltage and the first voltage according to the increase of the sweep voltage, and decreases from the increased voltage according to the decrease of the sweep voltage, and the driving The pulse width of the current may be determined based on a time until the reduced voltage of the gate terminal reaches a specific voltage.

In addition, the specific voltage may be a voltage determined based on a driving voltage for driving the first pixel circuit.

In addition, the difference between the first voltage and the second voltage may correspond to a range of the PWM data voltage for expressing a gray level of light emitted from the first inorganic light emitting device.

Meanwhile, a method of driving a display panel including a plurality of pixel circuits in which each of a plurality of pixels includes a plurality of light emitting devices and a plurality of pixel circuits for driving the plurality of light emitting devices according to an exemplary embodiment of the present disclosure is performed. Including the step of driving a pulse width modulation (PWM) of the first light emitting device through a first pixel circuit, and driving a pulse amplitude modulation (PAM) of the second light emitting device of the plurality of light emitting devices through a second pixel circuit do.

In this case, the plurality of light emitting devices include a red (R) light emitting device, a green (G) light emitting device, and a blue (B) light emitting device, the first light emitting device includes the green light emitting device, and the second The light-emitting device may include the red light-emitting device and the blue light-emitting device.

Also, the size of the first pixel circuit may be larger than the size of the second pixel circuit.

In addition, each of the plurality of light emitting devices emits light based on a driving current provided from a pixel circuit for driving each light emitting device among the plurality of pixel circuits, and the first pixel circuit transmits light to the first pixel circuit. A first driving current having an amplitude corresponding to the applied PAM data voltage is provided to the first light-emitting element for a time corresponding to the PWM data voltage applied to the first pixel circuit, and the second pixel circuit is the second A second driving current having an amplitude corresponding to the PAM data voltage applied to the pixel circuit may be provided to the second light emitting device.

In addition, the gradation of light emitted from the first light emitting device is controlled by a time when the first driving current is provided to the first light emitting device according to the magnitude of the PWM data voltage, and is emitted from the second light emitting device. The gray level of light may be controlled by the amplitude of the second driving current according to the magnitude of the PAM data voltage.

In addition, each of the plurality of light emitting devices may be a micro LED.

Meanwhile, the first pixel circuit changes the voltage of the terminal of the first pixel circuit according to the sweep voltage applied to the first pixel circuit to convert a driving current of a pulse width corresponding to the PWM data voltage to the first light emitting element. In addition, the sweep voltage may be a voltage that changes from the first voltage to the second voltage and then linearly changes from the second voltage.

In addition, the first pixel circuit may include a transistor, and may control the pulse width of the driving current by performing a switching operation of the transistor based on a voltage of the gate terminal of the transistor that is changed according to the sweep voltage.

In addition, the sweep voltage may be a voltage that increases with time from the second voltage during the light emission period after the step increases from the first voltage to the second voltage before the light emission period of the first light emitting device.

In addition, the voltage of the gate terminal of the driving transistor increases by the difference between the second voltage and the first voltage as the sweep voltage increases, and decreases from the increased voltage as the sweep voltage decreases, and the driving The pulse width of the current may be determined based on a time until the reduced voltage of the gate terminal reaches a specific voltage.

In addition, the specific voltage may be a voltage determined based on a driving voltage for driving the first pixel circuit.

In addition, a difference between the first voltage and the second voltage may correspond to a range of the PWM data voltage for expressing a gray level of light emitted from the first inorganic light emitting device.

As described above, according to various embodiments of the present disclosure, it is possible to prevent the wavelength of light emitted by the inorganic light emitting device included in the display panel from changing according to the gray scale.

In addition, it is possible to correct spots or colors of inorganic light emitting elements constituting the display panel, and even when configuring a large-area display panel by combining module-type display panels, differences in brightness or color between each display panel module can be corrected. I can.

In addition, it is possible to design more optimized pixel circuits, thereby providing a high-resolution display panel.

In addition, it is possible to secure a range of PWM data voltages capable of stably expressing gray levels.

1 is a graph showing a wavelength change according to the magnitude of driving current flowing through a blue LED, a green LED, and a red LED;
2 is a diagram illustrating a pixel structure of a display panel according to an embodiment of the present disclosure;
3 is a diagram illustrating a pixel structure of a display panel according to an embodiment of the present disclosure;
4 is a cross-sectional view of a display panel according to an embodiment of the present disclosure;
5 is a block diagram illustrating a configuration of a display panel according to an embodiment of the present disclosure;
6 is a block diagram illustrating a configuration of a display panel according to an embodiment of the present disclosure;
7 is a block diagram illustrating a configuration of a pixel circuit according to an embodiment of the present disclosure;
8 is a block diagram illustrating a configuration of a pixel circuit according to an embodiment of the present disclosure;
9 to 11 are circuit diagrams of a pixel circuit according to an embodiment of the present disclosure;
12 is a diagram illustrating a method of determining a pulse width of a driving current according to an embodiment of the present disclosure;
13 is a block diagram illustrating a configuration of a pixel circuit according to an embodiment of the present disclosure;
14 is a circuit diagram of an internal compensation circuit according to an embodiment of the present disclosure;
15 is a diagram for explaining a range of a sweep voltage and a PWM data voltage according to an embodiment of the present disclosure;
16 is a detailed circuit diagram of a pixel circuit according to an embodiment of the present disclosure;
17 is a timing diagram of various signals for driving the pixel circuit of FIG. 16 according to an embodiment of the present disclosure;
18 is a detailed circuit diagram of a pixel circuit according to an embodiment of the present disclosure;
19 is a timing diagram of various signals for driving the pixel circuit of FIG. 18 according to an embodiment of the present disclosure;
20 is a configuration diagram of a display device according to an embodiment of the present disclosure, and
21 is a flowchart illustrating a method of driving a display panel according to an exemplary embodiment of the present disclosure.

In describing the present disclosure, when it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present disclosure, a detailed description thereof will be omitted. In addition, redundant description of the same configuration will be omitted.

The suffix "unit" for the constituent elements used in the following description is given or used interchangeably in consideration of only the ease of writing the specification, and does not itself have a distinct meaning or role from each other.

Terms used in the present disclosure are used to describe embodiments, and are not intended to limit and/or limit the present disclosure. Singular expressions include plural expressions unless the context clearly indicates otherwise.

In the present disclosure, terms such as'include' or'have' are intended to designate the presence of features, numbers, steps, actions, components, parts, or a combination thereof described in the specification, but one or more other features. It is to be understood that the presence or addition of elements or numbers, steps, actions, components, parts, or combinations thereof, does not preclude in advance.

Expressions such as "first," "second," "first," or "second," used in the present disclosure may modify various elements, regardless of order and/or importance, and one element It is used to distinguish it from other components and does not limit the components.

Some component (eg, a first component) is "(functionally or communicatively) coupled with/to)" to another component (eg, a second component) or " When referred to as "connected to", it should be understood that the certain component may be directly connected to the other component or may be connected through another component (eg, a third component). On the other hand, when it is mentioned that it is "directly connected" or "directly connected" to a certain component (eg, a first other component (eg, a second component)), between the certain component and the other component It may be understood that no other component (eg, a third component) exists in the.

Terms used in the embodiments of the present disclosure may be interpreted as meanings commonly known to those of ordinary skill in the art, unless otherwise defined.

Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

2 is a diagram illustrating a pixel structure of the display panel 1000 according to an exemplary embodiment of the present disclosure. As shown in FIG. 2, the display panel 1000 may include a plurality of pixels 10 arranged in a matrix form.

In this case, each pixel 10 may include a plurality of sub-pixels 10-1 to 10-3. For example, one pixel 10 of the display panel 1000 is a red (Red, R) subpixel (10-1), a green (Green, G) subpixel (10-2), and blue (Blue, B) ) It may include three types of sub-pixels such as the sub-pixel 10-3. That is, a set of R subpixels, G subpixels, and B subpixels may constitute one unit pixel of the display panel 1000.

In this case, the sub-pixel may include a light emitting device. Here, the light emitting device may be an inorganic light emitting device manufactured using an inorganic material, different from an OLED (Organic Light Emitting Diode) manufactured using an organic material. Specifically, the light emitting device may be a Light Emitting Diode (LED), in particular, a Micro Light Emitting Diode (LED) (u-LED or micro-LED). Here, the micro LED refers to an ultra-small inorganic light emitting device having a size of 100 micrometers or less that emits light by itself without a backlight or a color filter.

Accordingly, the R sub-pixel may include an R micro LED, the G sub-pixel may include a G micro LED, and the B sub-pixel may include a B micro LED.

Meanwhile, referring to FIG. 2, it is shown that the R, G, and B sub-pixels 10-1 to 10-3 are arranged in an L shape with the left and right inverted within one pixel 10, but this is an example. , The sub-pixels 10-1 to 10-3 may be arranged in various forms.

For example, as illustrated in FIG. 3, R, G, and B sub-pixels 10-1 to 10-3 may be arranged in a line in the pixel 10 ′. However, such an arrangement form of sub-pixels is only an example, and a plurality of sub-pixels may be arranged in various forms within each pixel according to exemplary embodiments.

Meanwhile, in the above-described example, it has been described that the pixel is composed of three types of sub-pixels, that is, R, G, and B sub-pixels, but is not limited thereto. For example, a pixel may be implemented as 4 types of sub-pixels such as R, G, B, and W (white), and, of course, according to an embodiment, the pixel may further include any number of different types of sub-pixels. .

Meanwhile, referring to FIG. 2, it can be seen that one pixel area 20 in the display panel 1000 includes an area 10 occupied by a pixel and the remaining area 11 around it.

In this case, the area 10 occupied by the pixel may be regarded as an area occupied by a plurality of sub-pixels constituting the pixel and a driving circuit for driving each sub-pixel.

That is, the region 10 occupied by the pixel is a pixel circuit for driving the R light-emitting element and the R light-emitting element, a pixel circuit for driving the G light-emitting element and the G light-emitting element, and a pixel for driving the B light-emitting element and the B light-emitting element. Circuitry. Meanwhile, various circuits for driving the pixel circuit may be included in the remaining region 11.

In this case, the pixel circuit may be formed on the substrate of the display panel 1000. Specifically, FIG. 4 is a cross-sectional view of a display panel according to an exemplary embodiment of the present disclosure. In FIG. 4, for convenience of explanation, only one pixel included in the display panel 1000 is illustrated, and subpixels within the pixel are illustrated as being arranged in a line.

Referring to FIG. 4, the display panel 1000 may include a substrate 30, a driving circuit layer 40, and R, G, B light emitting devices 50-1 to 50-3.

In this case, the pixel circuit (not shown) for driving the light emitting device is implemented with a TFT (Thin Film Transistor) and a capacitor, and may be included in the driving circuit layer 40 formed on the substrate 30. That is, although not clearly shown in the drawings, the driving circuit layer 40 includes a pixel circuit for driving the R light-emitting element 50-1, a pixel circuit for driving the G light-emitting element 50-2, and B light emission. It may include a pixel circuit for driving the device 50-3.

On the other hand, the substrate 30 may be implemented as glass. In this way, the display panel 1000 on which the driving circuit layer 40 and the light emitting devices 50-1 to 50-3 are formed on the glass On Glass) type display panel. In this case, the glass and the driving circuit layer 40 formed on the glass may be collectively referred to as a TFT panel or a glass substrate. However, this is only an example, and the substrate may be implemented with various materials.

Further, R, G, B light emitting devices 50-1 to 50-3 may be disposed on the driving circuit layer 40. In this case, the light emitting device may be mounted or disposed on the driving circuit layer 40 to be electrically connected to the pixel circuit.

For example, the R light-emitting element 50-1 is electrically connected to the electrode 1 formed on the pixel circuit for driving the R light-emitting element 50-1, and the G light-emitting element 50-2 is G It is electrically connected to the electrode 2 formed on the pixel circuit for driving the light-emitting element 50-2, and the B light-emitting element 50-3 is on a pixel circuit for driving the B light-emitting element 50-3. It can be electrically connected to the electrode 3 formed in.

Meanwhile, the light emitting devices 50-1 to 50-3 may be implemented as a flip chip type micro LED. However, the present invention is not limited thereto, and according to an embodiment, the light emitting devices 50-1 to 50-3 may be a lateral type or a vertical type micro LED.

Meanwhile, according to an embodiment of the present disclosure, the display panel 1000 includes a MUX circuit for selecting any one of a plurality of subpixels 10-1 to 10-3 constituting the pixel 10, Electrostatic discharge (ESD) circuit for preventing static electricity from occurring in the display panel 1000, at least a gate driver for driving pixels arranged in a matrix form on the display panel 1000 in units of horizontal lines (or rows) , A data driver (or source driver) to provide a data voltage (e.g., Pulse Amplitude Modulation (PAM) data voltage or Pulse Width Modulation (PWM) data voltage) to each pixel or each sub-pixel), etc. It may further include.

5 is a block diagram illustrating a configuration of a display panel according to an exemplary embodiment of the present disclosure.

Referring to FIG. 5, the display panel 1000 may include a light emitting device 100 and a pixel circuit 200.

The light-emitting element 100 constitutes a sub-pixel of the display panel 1000. Specifically, the display panel 1000 includes a plurality of pixels arranged in a matrix form, and each pixel may include a plurality of subpixels. Accordingly, a plurality of light emitting devices may be included for each pixel.

In this case, the display panel 1000 may include a plurality of types of light emitting devices, and the type of the sub-pixel may be determined according to the type of the light emitting device.

Specifically, the display panel 1000 includes a red (R) light emitting device emitting red light, a green (G) light emitting device emitting green light, and a blue (B) emitting device emitting blue light. I can. In this case, the pixels of the display panel 1000 are composed of R, G, and B subpixels, wherein the R light emitting element constitutes an R subpixel, the G light emitting element constitutes a G subpixel, and the B light emitting element constitutes a B subpixel. You can configure the pixels.

Meanwhile, the light emitting device 100 may be a micro LED. In this case, the R sub-pixel may include an R micro LED, the G sub-pixel may include a G micro LED, and the B sub-pixel may include a B micro LED.

Meanwhile, the light-emitting device 100 may emit light according to a driving current provided by the pixel circuit 200.

Specifically, the light-emitting device 100 may emit light with different luminance according to an amplitude or a pulse width of a driving current provided by the pixel circuit 200. Here, the pulse width of the driving current may be expressed as a duty ratio of the driving current or a driving time (or duration) of the driving current.

For example, the light-emitting device 100 may emit light with a higher luminance as the amplitude of the driving current increases, and the longer the pulse width (ie, the higher the duty ratio or the longer the driving time), the higher the luminance. It is not limited.

The pixel circuit 200 may drive the light emitting device 100. Specifically, the pixel circuit 200 may drive the light emitting device 100 in order to control the gray level of light emitted by the light emitting device 100. In this case, according to an embodiment of the present disclosure, according to the type of the light emitting device, a specific type of light emitting device is driven through a pixel circuit for PWM driving, and another type of light emitting device is generated through a pixel circuit for driving PAM. It can be driven, which will be described in more detail later.

Meanwhile, according to an exemplary embodiment of the present disclosure, the pixel circuit 200 may drive the light emitting device 100 to express gray levels in units of sub-pixels. As described above, since the display panel 1000 is composed of sub-pixels in units of the light emitting device 100, unlike a liquid crystal display (LCD) panel that uses a plurality of LEDs emitting light in the same single color as a backlight, a pixel circuit Reference numeral 200 may drive the light emitting device 100 to represent a gray scale in units of sub-pixels.

To this end, each sub-pixel of the display panel 1000 may include a light emitting device 100 and a pixel circuit 200 for driving the light emitting device 100. That is, for each light emitting device 100, a pixel circuit 200 for driving the same may exist. Specifically, for each pixel, the display panel 1000 may include a pixel circuit for driving the R light-emitting element, a pixel circuit for driving the G light-emitting element, and a pixel circuit for driving the B light-emitting element.

After all, according to an embodiment of the present disclosure, as shown in FIG. 6, the display panel 1000 includes a plurality of pixels, and each pixel 10 is composed of a plurality of sub-pixels 10-1 to 10-3. Can be. Specifically, each pixel 10 includes a plurality of pixel circuits 200-1 to 200 for driving the plurality of light emitting devices 100-1 to 100-3 and the plurality of light emitting devices 100-1 to 100-3. -3) may be included. In this case, the plurality of light emitting devices 100-1 to 100-3 may include an R light emitting device, a G light emitting device, and a B light emitting device.

In addition, each of the plurality of light-emitting elements 100-1 to 100-3 has light based on a driving current provided from a pixel circuit for driving each light-emitting element among the plurality of pixel circuits 200-1 to 200-3. Can emit light. That is, the light-emitting element 100-1 emits light based on a driving current provided from the pixel circuit 200-1, and the light-emitting element 100-2 is a driving current provided from the pixel circuit 200-2. Based on the light emission, the light emitting device 100-3 may emit light based on a driving current provided from the pixel circuit 200-3.

Meanwhile, according to an embodiment of the present disclosure, the display panel 1000 may drive the light emitting device in different ways according to the type of the light emitting device. For example, in the display panel 1000, a specific type of light emitting device may be driven by a PAM method, and another specific type of light emitting device may be driven by a PWM method. To this end, the display panel 1000 may include a pixel circuit capable of driving a light emitting device using a PAM method and a pixel circuit capable of driving a light emitting device using a PWM method.

Specifically, the plurality of pixel circuits 200-1 to 200-3 include a first pixel circuit and a plurality of light emitting elements 100 for PWM driving a first light emitting element among the plurality of light emitting elements 100- to 100-3. A second pixel circuit for driving the PAM of the second light emitting device of-to 100-3) may be included. In this case, the size of the first pixel circuit may be larger than the size of the second pixel circuit.

In addition, the first light emitting device may include a G light emitting device, and the second light emitting device may include an R light emitting device and a B light emitting device.

Specifically, the first pixel circuit provides a first driving current having an amplitude corresponding to the PAM data voltage applied to the first pixel circuit for a time period corresponding to the PWM data voltage applied to the first pixel circuit. can do. In this case, the gradation of light emitted from the first light emitting device may be controlled by a time when the first driving current is provided to the first light emitting device according to the magnitude of the PWM data voltage.

Further, the second pixel circuit may provide a second driving current having an amplitude corresponding to the PAM data voltage applied to the second pixel circuit to the second light emitting device. In this case, the gray level of light emitted from the second light emitting device may be controlled by the amplitude of the second driving current according to the magnitude of the PAM data voltage.

That is, the first pixel circuit may drive the G light-emitting element among the light-emitting elements included in the display panel 1000 by using the PWM driving method. In this case, for each G light emitting device, a first pixel circuit for driving the G light emitting device may be included in the display panel 1000.

In addition, the second pixel circuit may drive the R light emitting device and the B light emitting device among the light emitting devices included in the display panel 1000 by using the PAM driving method. In this case, for each R light-emitting element, a second pixel circuit for driving the R light-emitting element is included in the display panel 1000, and for each B light-emitting element, a second pixel circuit for driving the B light-emitting element is the display panel It may be included in (1000).

Meanwhile, hereinafter, the above-described pixel circuit will be described in more detail.

7 and 8 are diagrams for describing a pixel circuit according to an exemplary embodiment of the present disclosure.

First, as shown in FIG. 7, the first pixel circuit 700 may provide a driving current to the light emitting device 100. Here, the light-emitting device 100 may include a G light-emitting device.

In this case, the first pixel circuit 700 receives, for example, a PAM data voltage and a PWM data voltage from a data driver (not shown) and controls the amplitude and pulse width of the driving current driving the light emitting element 100 together. The light emitting device 100 may be driven by providing a driving current controlled by both amplitude and pulse width to the light emitting device 100.

To this end, the first pixel circuit 700 may include a PWM driving circuit 710 and a PAM driving circuit 720 as shown in FIG. 7.

Here, that the amplitude and pulse width of the driving current are controlled "together" does not mean that the first pixel circuit 700 controls the amplitude and the pulse width of the driving current at the same time. It means that driving and PAM driving are used together.

That is, the PAM driving circuit 720 may control the amplitude of the driving current provided to the light emitting device 100 based on the PAM data voltage. In addition, the PWM driving circuit 710 may control the pulse width of the driving current provided to the light emitting element 100 based on the PWM data voltage.

Specifically, the PAM driving circuit 720 provides a driving current having an amplitude corresponding to the PAM data voltage to the light emitting element 100. In this case, the PWM driving circuit 710 calculates the driving time of the driving current provided by the PAM driving circuit 720 to the light emitting device 100 (that is, the driving current having an amplitude corresponding to the PAM data voltage) to the PWM data voltage. By controlling the basis, the pulse width of the driving current is controlled.

In this case, according to an embodiment of the present disclosure, the PAM data voltage may be collectively applied to all pixels (or all sub-pixels) included in the display panel 1000, and the PAM data voltage applied collectively is It can be the same voltage.

In this case, the first pixel circuit 700 controls the gradation of light emitted from the light emitting device 100 by a PWM driving method. That is, the PWM driving method is a method of expressing gray levels according to the light emission time of the light emitting device 100. Accordingly, when the light emitting device 100 is driven by the PWM driving method, even if the amplitude of the driving current is the same, various gray scales can be expressed by varying the light emission time.

Specifically, a data driver (not shown) provides the first pixel circuit 700 with a PWM data voltage for expressing gray levels through PWM driving, and the first pixel circuit 700 provides the driving current according to the PWM data voltage. By controlling the driving time, it is possible to control the gray level of light emitted from the light emitting device 100.

In this case, the first pixel circuit 700 may also be referred to as a PWM pixel circuit in that the gray scale of the light emitting element 100 is expressed through a PWM driving method.

As described above, according to an exemplary embodiment of the present disclosure, the first pixel circuit 700 drives the light emitting device 100 through the PWM driving method. Accordingly, as described above in FIG. 1, by driving the LED in the PAM driving method, the problem of reducing color reproducibility due to the change in the wavelength of light emitted by the LED (especially micro LED) can be solved.

However, as described above, the first pixel circuit 700 has a somewhat larger size in that it includes the PWM driving circuit 710 and the PAM driving circuit 720.

Accordingly, when the first pixel circuit 700 is used to drive each of the light emitting elements included in all pixels of the display panel 1000, the pixel per inch (PPI) is lowered, and thus, high resolution (eg, 8K ) Is not suitable.

Accordingly, according to an embodiment of the present disclosure, the G light emitting element having a relatively large wavelength change (or wavelength shift) according to the driving current is PWM driven through the first pixel circuit 700, and the R The light-emitting element and the light-emitting element B are driven by PAM as described later.

As shown in FIG. 8, the second pixel circuit 800 may provide a driving current to the light emitting device 100. Here, the light emitting device 100 may include an R light emitting device and a B light emitting device.

In this case, the second pixel circuit 800 controls the amplitude of the driving current driving the light emitting element 100 by receiving the PAM data voltage from, for example, a data driver (not shown), and controlling the amplitude of the driving current By providing as the light emitting device 100, the light emitting device 100 may be driven.

To this end, the second pixel circuit 800 may include a PAM driving circuit 810 as shown in FIG. 8.

That is, the PAM driving circuit 810 may control the amplitude of the driving current provided to the light emitting device 100 based on the PAM data voltage. Specifically, the PAM driving circuit 810 may provide a driving current having an amplitude corresponding to the PAM data voltage to the light emitting device 100.

That is, the data driver (not shown) provides the PAM data voltage for expressing the gradation through PAM driving to the second pixel circuit 800, and the second pixel circuit 800 provides the amplitude of the driving current according to the PAM data voltage. By controlling the gradation of the light emitted from the light emitting device 100 can be controlled.

In this case, the second pixel circuit 800 may also be referred to as a PAM pixel circuit in that the gray scale of the light emitting device 100 is expressed through a PAM driving method.

As described above, according to an embodiment of the present disclosure, the G light emitting device included in the display panel 1000 is driven through the PWM pixel circuit, and the R light emitting device and the B light emitting device included in the display panel 1000 are PAM pixels. Drive through the circuit. Accordingly, while solving the problem that the color reproducibility decreases due to the change in the wavelength of light according to the gradation, the total area occupied by the pixel circuit is smaller than when all light emitting circuits are driven through the PWM pixel circuit. It is possible to provide a display panel 1000 of.

9 to 11 are circuit diagrams of a pixel circuit according to an embodiment of the present disclosure.

First, FIGS. 9 and 10 show an example of the first pixel circuit, that is, the PWM pixel circuits 900 and 1100. The PWM pixel circuits 900 and 1100 include PWM driving circuits 910 and 1110 and PAM driving circuits 920 and 1120, and may provide driving current to the light emitting device 100 through these driving circuits.

Specifically, the PAM driving circuits 920 and 1120 may control the amplitude of the driving current provided to the light emitting device 100 based on the applied PAM data voltage Sig. In addition, the PWM driving circuits 910 and 1110 may control the driving time of the driving current provided to the light emitting device 100 by the PAM driving circuits 920 and 1120 based on the applied PWM data voltage Sig. . That is, the PWM driving circuits 910 and 1110 control the pulse width of the driving current based on the applied PWM data voltage Sig.

In this case, the PAM data voltage and the PWM data voltage may be applied to the PAM driving circuit and the PWM driving circuit, respectively, by time division.

Accordingly, the PWM pixel circuits 900 and 1100 may provide a driving current having a pulse width corresponding to the PWM data voltage for expressing the gray scale for each pixel to the light emitting device 100, and the light emitting device 100 may be a PWM pixel It may emit light according to the driving current provided from the circuits 900 and 1100.

Meanwhile, FIG. 11 shows an example of a second pixel circuit, that is, a PAM pixel circuit 1200. The PAM pixel circuit 1200 includes a PAM driving circuit 1210, and may provide a driving current to the light emitting device 100 through the PAM driving circuit 1210.

Specifically, the PAM driving circuit 1210 may control the amplitude of the driving current provided to the light emitting device 100 based on the applied PAM data voltage Sig.

Accordingly, the PAM pixel circuit 1200 may provide a driving current having an amplitude corresponding to the PAM data voltage for expressing a gray level for each pixel to the light emitting device 100, and the light emitting device 100 may be It can emit light according to the driving current provided from ).

9 to 11, in that the PWM pixel circuits 900 and 1100 include the PWM driving circuits 910 and 1110 and the PAM driving circuits 920 and 1120, 13 transistors (ie, T1 to T13) ) And two capacitors (ie, C1, C2). In contrast, since the PAM pixel circuit 1200 includes only the PAM driving circuit 1210, it may be implemented with seven transistors (ie, T1 to T7) and one capacitor (ie, C2). As such, the PAM pixel circuit 1200 may be implemented with a size smaller than that of the PWM pixel circuits 900 and 1100.

Therefore, rather than forming all the pixel circuits with the PWM pixel circuits 900 and 1100, the pixel circuits for driving the G light-emitting elements are formed with the PWM pixel circuits 900 and 1100, and the R and B light-emitting elements are driven. In the case of forming the pixel circuit for the PAM pixel circuit 1200, it occupies a smaller area in the display panel 1000. For example, when all the pixel circuits are formed by the PWM pixel circuits 900 and 1100, the area of the entire pixel circuit is 48000 µm2, whereas the pixel circuit for driving the R and B light emitting elements is the PAM pixel circuit 1200. When the pixel circuit for driving the G light-emitting element is formed with the PWM pixel circuits 900 and 1100, the area of the entire pixel circuit is 29000 µm2, which can be reduced by 40%.

Accordingly, according to an exemplary embodiment of the present disclosure, it is possible to provide a high-resolution display panel 1000 while solving a problem in which color reproducibility is decreased due to a change in wavelength according to gray scale.

However, the circuit shown in FIGS. 9 to 11 is only an example, and the PWM pixel circuit may be implemented as various types of circuits including a PWM driving circuit and a PAM driving circuit, and the PAM pixel circuit is PAM driving. It goes without saying that it can be implemented in various types of circuits including circuits.

In the above-described example, the pixel is composed of three types of sub-pixels, that is, R, G, and B sub-pixels. In this case, the pixel circuit for driving the G light-emitting element is implemented as a PWM pixel circuit, and It has been described that the pixel circuit and the pixel circuit for driving the B light-emitting element are implemented as a PAM pixel circuit.

Meanwhile, according to an embodiment, even when a pixel is composed of four types of sub-pixels, such as R, G, B, and W sub-pixels, a pixel circuit for driving the G light-emitting element is implemented as a PWM pixel circuit, and R emission The pixel circuit for driving the device and the pixel circuit for driving the B light emitting device may be implemented as a PAM pixel circuit. In this case, the pixel circuit for driving the W light emitting device may be implemented as a PWM pixel circuit.

Meanwhile, the first pixel circuit (that is, the PWM pixel circuit) according to an embodiment of the present disclosure changes the voltage of the terminal of the first pixel circuit according to the sweep voltage applied to the first pixel circuit to generate the PWM data voltage. A driving current having a pulse width corresponding to may be provided to the first light emitting device.

Here, the first pixel circuit may include a transistor, and a terminal of the first pixel circuit may be a gate terminal of the transistor. In this case, the first pixel circuit may control the pulse width of the driving current by performing a switching operation of the transistor based on the voltage of the gate terminal of the transistor that changes according to the sweep voltage.

Meanwhile, the sweep voltage is a voltage that is externally applied to change the voltage of the gate terminal of the transistor, and increases by steps from the first voltage to the second voltage before the emission time of the first light-emitting element, and then the second voltage during the emission period. It may be a voltage that decreases with time. In this case, the sweep voltage may be reduced from the second voltage to the first voltage during the light emission period.

Accordingly, the voltage at the gate terminal of the transistor may increase by a difference between the second voltage and the first voltage as the sweep voltage increases, and may decrease from the increased voltage as the sweep voltage decreases.

In this case, the pulse width of the driving current may be determined based on a time until the voltage of the gate terminal to be reduced reaches a specific voltage. Here, the specific voltage may be a voltage determined based on a driving voltage for driving the first pixel circuit.

Specifically, when the PWM data voltage is applied, the first pixel circuit may apply a voltage based on the PWM data voltage to the gate terminal of the transistor. Thereafter, before the start of the light emission time, if a step-rising sweep voltage is applied to the first pixel circuit, due to the coupling effect, the voltage at the gate terminal of the transistor may increase by the step-rising voltage value.

For example, referring to FIG. 12, when the sweep voltage increases by steps as shown in ①, the voltage applied to the gate terminal of the transistor increases in steps according to the sweep voltage as shown in ②.

Meanwhile, when the light emission period starts, the first pixel circuit may provide a driving current to the first light emitting device according to the voltage of the gate terminal of the transistor. For example, as shown in FIG. 12, when the voltage of the gate terminal raised according to the sweep voltage is greater than a specific voltage (V ₁ ), the first pixel circuit transfers a driving current to the first light emitting element using a transistor in an off state. Can provide.

Meanwhile, when the light emission time starts, a sweep voltage that gradually decreases with time may be applied to the first pixel circuit. Even in this case, the voltage at the gate terminal of the transistor changes according to the sweep voltage. That is, when a decreasing sweep voltage is applied, the voltage at the gate terminal of the transistor gradually decreases according to the sweep voltage.

For example, referring to FIG. 12, when the sweep voltage decreases in a triangular waveform shape as shown in ③, the increased gate terminal voltage decreases in a triangular waveform shape according to the sweep voltage as shown in ④.

In this case, when the voltage of the gate terminal of the transistor to be reduced reaches a specific voltage V ₁ , the first pixel circuit may perform a switching operation of the transistor. For example, the first pixel circuit may turn on a transistor in an off state. In this way, when the switching operation of the transistor is performed, the first pixel circuit may stop supplying the driving current to the first light emitting device.

Accordingly, as shown in FIG. 12, the pulse width of the driving current may be determined.

Meanwhile, the difference between the first voltage and the second voltage may correspond to a range of the PWM data voltage for expressing the gradation of light emitted from the first light-emitting device. Hereinafter, in detail with the driving method of the first pixel circuit Let's explain it.

13 is a block diagram of a first pixel circuit according to an embodiment of the present disclosure.

The first pixel circuit 700 includes a PAM driving circuit 720 and an internal compensation circuit for compensating a threshold voltage of the transistor and the PWM driving circuit 710, respectively.

For example, as shown in FIG. 13, the PAM driving circuit 720 may include a transistor T8 and a second internal compensation circuit 72.

The transistor T8 may provide a driving current having a different amplitude to the light emitting element 100 according to the magnitude of the voltage applied to the gate terminal C. Specifically, the PAM driving circuit 720 may provide a driving current having an amplitude corresponding to the applied PAM data voltage to the light emitting device 100 through the transistor T8.

In this case, the threshold voltage of the transistor T8 may be a problem. Specifically, a plurality of sub-pixels exist in the display panel 1000, and a transistor T8 is present in each sub-pixel. In theory, transistors fabricated under the same conditions should have the same threshold voltage, but even if transistors are actually fabricated under the same conditions, a difference may occur in the threshold voltage, and the same is true for the transistors T8 included in the display panel 1000. .

As described above, when there is a difference between the threshold voltages of the transistors T8 corresponding to each sub-pixel, the transistors T8 generate driving currents of different amplitudes by the difference in the threshold voltage even when the same PAM data voltage is applied to the gate terminal. It is provided to each light emitting device 100, which may appear as a spot on an image.

Accordingly, it is necessary to compensate for a threshold voltage deviation between the transistors T8 included in the display panel 1000.

The second internal compensation circuit 72 is a component for compensating the threshold voltage of the transistor T8. Specifically, when the PAM data voltage is applied, the PAM driving circuit 720 applies a voltage based on the applied PAM data voltage and the threshold voltage of the transistor T8 through the second internal compensation circuit 72 of the transistor T8. It can be applied to the gate terminal C. Accordingly, the transistor T8 can provide the driving current having an amplitude corresponding to the magnitude of the applied PAM data voltage to the light emitting device 100, regardless of the threshold voltage of the transistor T8.

Accordingly, it is possible to overcome a problem caused by a threshold voltage deviation between the transistors T8 included in the display panel 1000.

Meanwhile, the PWM driving circuit 710 may also include a transistor T3 and a first internal compensation circuit 71 as shown in FIG. 13.

The transistor T3 is connected to the gate terminal C of the transistor T8 and controls the voltage of the gate terminal of the transistor T8, thereby controlling the pulse width of the driving current. Specifically, the transistor T3 is driven by turning off the transistor T8 when a time corresponding to the PWM data voltage elapses after the light emitting element 100 starts to emit light according to the driving current provided through the transistor T8. The pulse width of the current can be controlled.

On the other hand, transistors T3 that exist for each sub-pixel of the display panel 1000 also have a threshold voltage variation, and if this is not compensated, even if the same PWM data voltage is applied to the transistors T3, the threshold voltage is This is a problem because driving currents having different pulse widths by the difference are provided to each light emitting device 100.

The first internal compensation circuit 71 is a component for compensating the threshold voltage of the transistor T3. Specifically, when the PWM data voltage is applied, the PWM driving circuit 710 provides a voltage based on the applied PWM data voltage and the threshold voltage of the transistor T3 through the first internal compensation circuit 71, the transistor T3. Can be applied to the gate terminal (A). Accordingly, the transistor T3 can provide the driving current having a pulse width corresponding to the magnitude of the applied PWM data voltage to the light emitting element 100, regardless of the threshold voltage of the transistor T3.

Meanwhile, the operation of the internal compensation circuit will be described in more detail below with reference to FIG. 14.

14 is a circuit diagram of an internal compensation circuit according to an embodiment of the present disclosure.

As described above, the PWM driving circuit 710 may include a first internal compensation circuit 71 for compensating the threshold voltage of the transistor T3.

When the PWM data voltage is applied, the first internal compensation circuit 71 applies a voltage corresponding to the sum of the applied PWM data voltage and the threshold voltage of the transistor T3 to the gate terminal C of the transistor T3, The threshold voltage of (T3) is compensated.

To this end, as shown in FIG. 14, the first internal compensation circuit 71 has a transistor T4 and a drain terminal connected between the gate terminal and the drain terminal of the transistor T3 and the source terminal of the transistor T3. And a transistor T2 having a gate terminal connected to the gate terminal of the transistor T4.

Specifically, when the transistors T2 and T4 are turned on according to the control signal SPWM[n] applied to the gate terminals of the transistors T2 and T4, the PWM data voltage applied to the source terminal of the transistor T2 is reduced. 1 It is input to the internal compensation circuit 71.

At this time, when the voltage of the gate terminal A of the transistor T3 is in a low state, the transistor T3 is completely turned on. Accordingly, the input PWM data voltage is applied to the gate terminal A of the transistor T3 while passing through the transistor T2, the transistor T3, and the transistor T4 in sequence. At this time, the gate terminal of the transistor T3 The voltage of (A) does not rise to the input PWM data voltage, but rises to a voltage corresponding to the sum of the PWM data voltage and the threshold voltage of the transistor T3.

This is because when the PWM data voltage is first applied to the first internal compensation circuit 71, the voltage of the gate terminal A of the transistor T3 is in a low state, and the transistor T3 is completely turned on, so that a sufficient current flows. The voltage at the gate terminal A of the transistor T3 rises smoothly, but the voltage difference between the gate terminal and the source terminal of the transistor T3 decreases as the voltage at the gate terminal A of the transistor T3 increases. This is because, as a result, when the voltage difference between the gate terminal and the source terminal of the transistor T3 reaches the threshold voltage of the transistor T3, the transistor T3 is turned off and the flow of current is stopped.

That is, since the PWM data voltage is applied to the source terminal of the transistor T3, the voltage at the gate terminal A of the transistor T3 rises up to the sum of the PWM data voltage and the threshold voltage of the transistor T3. . In this way, the threshold voltage of the transistor T3 may be compensated by the first internal compensation circuit 71.

Meanwhile, the configuration and operation of the second internal compensation circuit 72 are similar to those of the first internal compensation circuit 71.

That is, in the second internal compensation circuit 72, as shown in FIG. 14, the transistor T9 and the drain terminal connected between the gate terminal and the drain terminal of the transistor T8 are connected to the source terminal of the transistor T8. The gate terminal includes a transistor T7 connected to the gate terminal of the transistor T9.

In addition, the second internal compensation circuit 72 also operates in the same manner as the first internal compensation circuit 71, so that the PAM data voltage and the threshold voltage of the transistor T8 are applied to the gate terminal C of the transistor T8. A voltage corresponding to the sum may be applied.

As described above, according to an embodiment of the present disclosure, the PWM driving circuit 710 automatically sets (or applies) the applied PWM data voltage to the gate terminal A of the transistor T3. The threshold voltage is internally compensated, which is the same for the PAM driving circuit 720.

On the other hand, the term "internal compensation" indicates that the threshold voltage of the transistor is compensated by itself inside the driving circuit during the operation of the driving circuit. In this internal compensation method, the data voltage itself to be applied to the driving circuit from outside the driving circuit It is distinct from an external compensation method that compensates for the threshold voltage of the transistor.

As described above, since the threshold voltages of the transistors T3 and T8 are internally compensated, according to an embodiment of the present disclosure, the PAM data voltage is applied to pixels included in the display panel 1000 to display one image frame. When setting, it is possible to collectively apply the PAM data voltage to the corresponding pixel. Accordingly, it is possible to sufficiently secure a light-emitting period in which the light-emitting element 100 emits light among the entire time period for displaying one image frame.

Meanwhile, in the exemplary embodiment of the present disclosure described above, the PWM data voltage is sequentially applied line by line to pixels included in the display panel 1000 in order to express grayscale for each pixel.

Meanwhile, hereinafter, the operation of the first pixel circuit 700 according to the sweep voltage will be described in more detail.

Specifically, when the PWM data voltage is applied, the first driving circuit 710 may apply a voltage based on the PWM data voltage and the threshold voltage of the transistor T3 to the gate terminal A of the transistor T3. Here, the voltage applied to the gate terminal A may be a sum of the PWM data voltage and the threshold voltage of the transistor T3.

Further, when the PAM data voltage is applied, the PAM driving circuit 720 may apply a voltage based on the PAM data voltage and the threshold voltage of the transistor T8 to the gate terminal C of the transistor T8. Here, the voltage applied to the gate terminal C may be a sum of the PAM data voltage and the threshold voltage of the transistor T8.

Thereafter, when a step-rising sweep voltage is applied to the PWM driving circuit 710, the voltage applied to the gate terminal A of the transistor T3 is stepped up by the increased voltage value. In this case, the magnitude of the sweep voltage applied to the PWM driving circuit 710 may be maintained as a step-up voltage value until the light emission period starts.

Thereafter, when the light emission period starts, the PAM driving circuit 720 provides a driving current having an amplitude corresponding to the PAM data voltage to the light emitting element 100 through the on-state transistor T8, and the light emitting element 100 Starts to glow.

At this time, the sweep voltage applied to the PWM driving circuit 710 gradually decreases from the step-up voltage value to the initial voltage value. Accordingly, the voltage of the gate terminal A of the transistor T3 gradually decreases according to the sweep voltage.

On the other hand, when the voltage of the gate terminal A of the transistor T3 raised according to the sweep voltage is greater than the sum of the driving voltage VDD applied to the source terminal of the transistor T3 and the threshold voltage of the transistor T3 , The transistor T3 is in an off state. Accordingly, in the off-state transistor T3, the voltage of the gate terminal A, which is reduced according to the sweep voltage, is the sum of the voltage of the source terminal and the threshold voltage of the transistor T3 (that is, the driving voltage VDD + Until the transistor T3 reaches the threshold voltage), the off state is maintained (for reference, in the case of a PMOSFET, the threshold voltage may have a negative value).

Thereafter, when the voltage of the gate terminal A of the transistor T3 reaches the sum of the driving voltage VDD and the threshold voltage of the transistor T3, the transistor T3 is turned on, and accordingly, the transistor T3 The driving voltage VDD applied to the source terminal of) is applied to the gate terminal C of the transistor T8 through the drain terminal.

On the other hand, since the driving voltage VDD is applied to the source terminal of the transistor T8, when the driving voltage VDD is applied to the gate terminal C of the transistor T8, the gate terminal C of the transistor T8 The voltage of the source terminal exceeds the sum of the voltage of the source terminal and the threshold voltage of the transistor T8 (that is, the driving voltage VDD + the threshold voltage of the transistor T8), so that the transistor T8 in the ON state is turned off. (For reference, in the case of a PMOSFET, the threshold voltage may have a negative value). Accordingly, when the transistor T8 is turned off, the driving current no longer flows, and the light emitting element 100 stops emitting light.

In this way, the first pixel circuit 700 may control the voltage of the gate terminal A of the transistor according to the sweep voltage, thereby controlling the pulse width of the driving current.

Meanwhile, in FIG. 13 described above, it is shown that the driving voltage VDD is applied to the PWM driving circuit 710 and the PAM driving circuit 720 through one line, but this is only an example, and the driving voltage VDD May be applied to the PWM driving circuit 710 and the PAM driving circuit 720 through separate lines. That is, the PWM driving voltage VDD_PWM may be applied to the PWM driving circuit 710 through one line, and the PAM driving voltage VDD_PAM may be applied to the PAM driving circuit 720 through the other line.

Meanwhile, according to an embodiment of the present disclosure, since the pulse width of the driving current is controlled using the above-described sweep voltage, it is possible to secure a range of PWM data voltages capable of stably expressing gray levels. have.

Specifically, when the PWM data voltage is applied, a voltage having the sum of the PWM data voltage and the threshold voltage of the transistor T3 is applied to the gate terminal A of the transistor T3. Then, when the sweep voltage is applied, the voltage of the gate terminal A increases according to the step increase of the sweep voltage, and thereafter, the voltage of the increased gate terminal A gradually decreases as the sweep voltage decreases.

In this case, the driving current is the voltage of the gate terminal A of the transistor T3, which is changed according to the sweep voltage, between the voltage of the source terminal of the transistor T3 (that is, the driving voltage VDD) and the transistor T3. It may be provided to the light emitting device 100 during a time period greater than the sum of the threshold voltages.

Accordingly, the PWM data voltage that makes the voltage of the gate terminal A of the transistor T3 when the step is raised is the sum of the driving voltage VDD and the threshold voltage of the transistor T3 is set to the minimum gray scale (for example, , Black), and the voltage of the gate terminal (A) of the transistor (T3) before step-up is the driving voltage (VDD) and the threshold voltage of the transistor (T3) The PWM data voltage to be the sum of the values can be set as the PWM data voltage for expressing the maximum gray scale (eg, full gray (ie, white)).

In this case, a difference between the PWM data voltage for expressing the minimum gray level and the PWM data voltage for expressing the maximum gray level, that is, a range of the PWM data voltage may be a voltage value at which the sweep voltage increases by steps.

Therefore, when the voltage value at which the sweep voltage increases by steps is properly set according to the gray scale range to be expressed, inverse gamma does not occur, and each gray level can be expressed through a stable PWM data voltage.

For example, it is assumed that the driving voltage (VDD or VDD_PAM) is 12.4V, and the maximum voltage value of the PWM data voltage provided by the data driver is 15V.

Meanwhile, in order to express the gradation of 1024, the range of the PWM data voltage is preferably 6V or more, and according to an embodiment of the present disclosure, as shown in FIG. 15, the voltage value at which the sweep voltage increases by steps is 6V. Can be set to For example, the sweep voltage may have a voltage waveform stepping up from an initial voltage of 0V to 6V and then gradually decreasing from 6V to 0V.

Accordingly, the range of the PWM data voltage may be 6V, the PWM data voltage for the minimum grayscale (ie, black) may be 6.4V, and the PWM data voltage for the maximum grayscale (ie, full gray) may be 12.4V.

Meanwhile, ① in FIG. 15 shows the voltage waveform of the gate terminal A of the transistor T3 according to the sweep voltage when a PWM data voltage of 6.4V is applied to the first pixel circuit.

Specifically, referring to ① of FIG. 15, the voltage of the gate terminal A increases by 6V from 6.4V+V _TH to 12.4V+V _TH , and then gradually decreases to become 6.4V+V _TH .

In this case, the voltage of the gate terminal A is the voltage of the source terminal of the transistor T3 (that is, since the driving voltage is applied to the source terminal, the voltage of the source terminal is 12.4V) and the threshold voltage of the transistor T3 ( In that it does not exceed the sum of V _TH ) (ie, 12.4V + V _TH ), a driving current is not provided to the light-emitting element 100, and thus, the light-emitting element 100 does not emit light.

Meanwhile, 2 of FIG. 15 shows a voltage waveform of the gate terminal A of the transistor T3 according to the sweep voltage when a PWM data voltage of 12.4V is applied to the first pixel circuit.

Specifically, when reference to Figure 15 of ②, the voltage of the gate terminal (A) is elevated by at 6V 12.4V + V _TH is reduced after a 18.4V + V _TH, gradually becomes 12.4V + V _TH.

In this case, during the entire light emission period, the voltage of the gate terminal A is the sum of the voltage of the source terminal of the transistor T3 and the threshold voltage V _TH of the transistor T3 (i.e., 12.4V+V _TH ) Greater than Accordingly, during the entire light emission period, a driving current is provided to the light-emitting element 100, and the light-emitting element 100 can express the maximum gray scale.

As described above, according to an embodiment of the present disclosure, it is possible to secure a range of a PWM data voltage capable of stably expressing a gray level through a sweep voltage of a specific waveform.

Meanwhile, in FIG. 15, it has been described that the sweep voltage increases by 6V steps, but this is only an example, and the sweep voltage is set to increase in steps of 6V or more, so that the PWM data voltage for expressing the minimum and maximum gray levels has a range of 6V or more. Yes, of course.

Hereinafter, the configuration and operation of a pixel circuit according to an embodiment of the present disclosure will be described in more detail through FIGS. 16 to 19.

16 is a detailed circuit diagram of a pixel circuit according to an exemplary embodiment of the present disclosure. First, elements constituting the first pixel circuit 900 and a connection relationship between the elements will be described with reference to FIG. 16. For reference, the pixel circuit shown in FIG. 16 is the same as the pixel circuit shown in FIG. 9.

16 shows a circuit related to one sub-pixel, that is, one light-emitting element 100 and a PWM pixel circuit 900 for driving the one light-emitting element 100.

Referring to FIG. 16, the PWM pixel circuit 900 may include a PWM driving circuit 910 and a PAM driving circuit 920.

Specifically, the PAM driving circuit 920 includes a first transistor T8, a second transistor T9 connected between the drain terminal and the gate terminal of the first transistor T8, and a drain terminal of the first transistor T8. And a third transistor T7 connected to a terminal, a gate terminal connected to a gate terminal of the second transistor T9, and receiving a data signal Sig (ie, a PAM data voltage) through a source terminal.

In this case, the PAM driving circuit 920 is turned on when the PAM data voltage is applied through the source terminal of the third transistor T7 while the second and third transistors T9 and T7 are turned on according to the control signal SPAM. A voltage equal to the sum of the applied PAM data voltage and the threshold voltage of the first transistor T8 through the first transistor T8 and the second transistor T9 is applied to the gate terminal C of the first transistor T8. ).

Meanwhile, in the PWM driving circuit 910, the fourth transistor T3, the fifth transistor T4 connected between the drain terminal and the gate terminal of the fourth transistor T3, and the drain terminal are the source terminals of the fourth transistor T3. And a sixth transistor T2 connected to and having a gate terminal connected to the gate terminal of the fifth transistor T4 and receiving a data signal Sig (ie, a PWM data voltage) through a source terminal.

In this case, the PWM driving circuit 910 applies the PWM data voltage through the source terminal of the sixth transistor T2 while the fifth and sixth transistors T4 and T2 are turned on according to the control signal SPWM(n). Then, a voltage equal to the sum of the applied PWM data voltage and the threshold voltage of the fourth transistor T3 through the turned-on fourth transistor T3 and the fifth transistor T4 is applied to the gate terminal of the fourth transistor T3. Apply to (A).

The seventh transistor T1 has a source terminal connected to a driving voltage terminal (or driving voltage signal) VDD of the PWM pixel circuit 900 and a drain terminal of the sixth transistor T2 and a fourth transistor ( It is commonly connected to the source terminal of T3).

The seventh transistor T1 is turned on/off by the control signal Emi to electrically connect or disconnect the driving voltage terminal VDD and the PWM driving circuit 910.

The eighth transistor T5 has a source terminal connected to the drain terminal of the fourth transistor T3 and a drain terminal connected to the gate terminal of the first transistor T8.

The source terminal of the ninth transistor T6 is commonly connected to the source terminal of the fourth transistor T3, the drain terminal of the sixth transistor T2, and the drain terminal of the seventh transistor T1, and the drain terminal is the first transistor. It is commonly connected to the source terminal of (T8) and the drain terminal of the third transistor (T7).

The eighth transistor T5 and the ninth transistor T6 are turned on/off according to the control signal Emi to electrically connect or disconnect the PWM driving circuit 910 and the PAM driving circuit 920.

The tenth transistor T10 has a source terminal connected to the drain terminal of the first transistor T8 and a drain terminal connected to the anode terminal of the light emitting element 100. The tenth transistor T10 is turned on/off according to the control signal Emi to electrically connect or disconnect the PAM driving circuit 920 and the light emitting element 100.

One end of the first capacitor C1 is commonly connected to the gate terminal of the fourth transistor T3 and the drain terminal of the fifth transistor T4, and the other end is applied with a sweep voltage (ie, Vsweep). .

The drain terminal of the eleventh transistor T11 is commonly connected to the gate terminal of the first transistor T8 and the drain terminal of the second transistor T9, and the source terminal receives the initial voltage Vini.

The twelfth transistor T12 has a source terminal connected to one end of the first capacitor C1 and a drain terminal connected to the source terminal of the eleventh transistor T11.

One end of the second capacitor C2 is connected to the driving voltage terminal VDD, and the other end of the second capacitor C2 is a gate terminal of the first transistor T8, a drain terminal of the second transistor T9, and the eleventh transistor T11. The drain terminal and the drain terminal of the eighth transistor T5 are commonly connected.

The eleventh transistor T11 and the twelfth transistor T12 are turned on according to the control signal VST, so that the initial voltage Vini is applied to the gate terminal C of the first transistor T8 and the fourth transistor T3. It is applied to the gate terminal (A).

After the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3 are initialized, the driving voltage VDD of the eleventh transistor T11 and the twelfth transistor T12 is changed to the second capacitor ( To prevent coupling to the gate terminal C of the first transistor T8 through C2), the control signal VST is applied for a certain period of time even after the driving voltage VDD is applied to one end of the second capacitor C2. ), the initial voltage Vini is applied to the gate terminals C and A of the first and fourth transistors T8 and T3 by maintaining the on state.

The thirteenth transistor T13 is connected between the anode terminal and the cathode terminal of the light emitting device 100.

In the thirteenth transistor T13, before the light emitting element 100 is mounted on the driving circuit layer 40 (ie, the TFT layer) and electrically connected to the PWM pixel circuit 900, whether the PWM pixel circuit 900 is abnormal. It can be turned on according to the control signal (Test) to check. In addition, after the light emitting element 100 is mounted on the TFT layer and electrically connected to the PWM pixel circuit 900, the thirteenth transistor T13 has a control signal (Discharging) in order to discharge charges remaining in the light emitting element 100. ) Can be turned on.

Meanwhile, the cathode terminal of the light emitting device 100 is connected to the ground voltage VSS terminal.

Hereinafter, the operation of the PWM pixel circuit 900 will be described in more detail with reference to FIG. 17.

17 is a timing diagram of various signals for driving the PWM pixel circuit of FIG. 16 according to an embodiment of the present disclosure.

Referring to FIG. 17, in order to display one image frame, the PWM pixel circuit 900 includes an initialization period (Initialize), a sustain period (Hold), a data voltage setting and a threshold voltage (Vth) compensation period, and an emission period. ), the discharge period (LED Discharging) may be driven in the order of the period.

At this time, the data voltage setting and the threshold voltage (Vth) compensation period, as in the example shown in FIG. 17, the PAM data voltage setting, the threshold voltage compensation period (PWM data + Vth compensation) and the PAM data voltage setting of the transistor T3 And a threshold voltage compensation period (PAM data + Vth compensation) of the transistor T8.

The initialization period is a period for initializing the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3. The PWM pixel circuit 900 initializes the C and A terminal voltages to the initial voltage Vini in the initialization period.

Specifically, in the initialization period, since the eleventh and twelfth transistors T11 and T12 are turned on according to the control signal VST, the initial voltage Vini is applied to the first transistor T8 through the eleventh transistor T11. It is applied to the gate terminal C, and applied to the gate terminal A of the fourth transistor T3 through the twelfth transistor T12.

The sustain period is a period for continuously maintaining the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3 in a low state (ie, an initialized state). This is because when the data voltage setting and threshold voltage Vth compensation period starts, the first and fourth transistors T8 and T3 must be turned on.

In the data voltage setting and threshold voltage compensation period, a data voltage is set in the PWM driving circuit 910 and the PAM driving circuit 920, respectively, and the threshold voltages Vth of the first and fourth transistors T8 and T3 are compensated. It is a period for.

According to an embodiment of the present disclosure, as shown in FIG. 17, PWM data voltage setting and threshold voltage compensation of the fourth transistor T3 are performed first, and then PAM data voltage setting and the first transistor T8 are performed. The threshold voltage compensation of may be performed. However, it goes without saying that the order may be changed according to embodiments.

Meanwhile, during the data voltage setting and threshold voltage compensation period, all of the seventh to tenth transistors T1, T5, T6, and T10 are turned off according to the control signal Emi, and thus, the PWM driving circuit 910 and the Each of the PAM driving circuits 920 is independently configured to set a data voltage and compensate for a threshold voltage.

First, in the PWM data voltage setting and the threshold voltage compensation period (PWM data + Vth compensation) of the fourth transistor T3, the PWM data voltage transmitted through the data line (Sig wiring) is the gate terminal of the fourth transistor T3. This is the section that is applied as (A).

Specifically, when the fifth and sixth transistors T4 and T2 are turned on according to the control signal SPWM(n), the PWM data voltage is the sixth transistor T2, the fourth transistor T3, and the fifth transistor ( After passing through T4) in sequence, the compensated voltage (a voltage equal to the sum of the PWM data voltage and the threshold voltage of the fourth transistor T3) is input to node A. Accordingly, the compensated voltage is stored in the first capacitor C1 and node A maintains a floating state.

Meanwhile, the control signal SPWM(n) may be a signal output from a gate driver inside or outside the display panel 1000. In SPWM(n), n denotes the number of a pixel line included in the display panel 1000. Accordingly, the PWM data voltage is sequentially applied to the pixels (or sub-pixels) for each line of a plurality of pixels arranged in a matrix form.

Meanwhile, in the PAM data voltage setting and the threshold voltage compensation period (PAM data + Vth compensation) of the first transistor T8, the PAM data voltage transmitted through the data line (Sig wiring) is applied to the gate terminal of the first transistor T8 ( It is a section that is approved as C).

Specifically, during the PAM data voltage setting and the threshold voltage compensation period of the first transistor T8, since the control signal SPAM is low, the second transistor T9 and the third transistor T7 are turned on.

In this case, similar to the internal compensation principle of the PWM driving circuit 910 described above, since the PAM data voltage is input to the C node through the third transistor T7, the first transistor T8 and the second transistor T9, A voltage equal to the sum of the PAM data voltage and the threshold voltage of the first transistor T8 is input to the C node. The compensated voltage is stored in the second capacitor C2, and the C node maintains a floating state.

Meanwhile, the control signal SPAM may be a signal output from a gate driver inside or outside the display panel 1000. According to an embodiment of the present disclosure, unlike the control signal SPWM(n), the control signal SPAM may be collectively applied to pixels (or subpixels) included in the display panel 1000. have. In this case, according to an embodiment of the present disclosure, the PAM data voltage collectively applied to the subpixels included in the display panel 100 may have the same voltage. However, it is not limited thereto.

The emitting period (Emitting) is a period in which the light emitting device 100 emits light. During the light emission period, the light-emitting element 100 emits light according to the amplitude and pulse width of the driving current provided by the PWM driving circuit 900, thereby expressing a gray scale corresponding to the applied PAM data voltage and the PWM data voltage.

Specifically, during the light emission period, the seventh to tenth transistors T1, T5, T6, and T10 are turned on according to the control signal Emi, so the PWM driving circuit 910 and the PAM driving circuit 920 are electrically connected to each other. In addition, the driving voltage terminal and the light emitting device 100 are electrically connected to each other.

When the light emission period starts, the driving voltage VDD is transmitted to the light emitting device 100 through the seventh transistor T1, the ninth transistor T6, the first transistor T8, and the tenth transistor T10, A potential difference occurs at both ends of the light-emitting element 100 and the light-emitting element 100 starts to emit light. In this case, the driving current for emitting light of the light emitting device 100 has an amplitude corresponding to the PAM data voltage.

Meanwhile, before the light emission period (specifically, after the application of the PAM data voltage is completed, the time period before the seventh to tenth transistors T1, T5, T6, and T10 are turned on according to the control signal Emi), the initial stage A sweep voltage Vsweep stepping up from the voltage value by a specific voltage value is applied to the first capacitor C1. In this case, a coupling voltage is generated at the gate terminal A of the fourth transistor T3 in a floating state through the first capacitor C1. Accordingly, the voltage of node A is increased by a step-up sweep voltage value from a voltage equal to the sum of the PWM data voltage and the threshold voltage of the fourth transistor T3.

Thereafter, when the light emission period starts, the sweep voltage gradually decreases to an initial voltage value, and accordingly, the voltage of node A decreases according to the sweep voltage. On the other hand, the voltage of node A, which was decreased, is the sum of the threshold voltage of the fourth transistor T3 and the driving voltage VDD applied to the source terminal of the fourth transistor T3 through the turned-on seventh transistor T1. Upon arrival, the fourth transistor T3 turns from an off state to an on state.

When the fourth transistor T3 is turned on, the driving voltage VDD is applied to the gate terminal C of the first transistor T8 through the seventh transistor T1, the fourth transistor T3, and the eighth transistor T5. Is passed on. When the driving voltage VDD is applied to the gate terminal C of the first transistor T8, the first transistor T8 is turned off. When the first transistor T8 is turned off, since the driving voltage VDD does not reach the light emitting device 100, light emission of the light emitting device 100 is terminated.

In this way, the PWM driving circuit 910 applies the voltage applied to the gate terminal A of the fourth transistor T3 to the sweep voltage Vsweep from when the driving voltage VDD is applied to the light emitting element 100. Accordingly, the driving current is supplied to the light emitting device 100 until the voltage value is changed to a sum of the driving voltage VDD and the threshold voltage of the fourth transistor T3. That is, the driving current has a pulse width corresponding to the PWM data voltage.

On the other hand, even when the light emission of the light-emitting element 100 is ended, charges remaining in the light-emitting element 100 may exist. For this reason, a problem in that the light-emitting element 100 emit light finely after the light emission is terminated may be caused, and this may be a particularly problem when expressing a low gray scale (eg, black).

Accordingly, the LED Discharging period is a period for discharging charges remaining in the light-emitting element 100 after the light-emitting period is over, and the PWM pixel circuit 900 is configured to perform the thirteenth period according to the control signal Discharging. By turning on the transistor T13, the electric charge remaining in the light emitting element 100 is completely discharged to the ground voltage VSS terminal, thereby solving the above-described problem.

Meanwhile, as described above, the thirteenth transistor T13 checks whether the PWM pixel circuit 900 is abnormal before the light emitting element 100 is mounted on the TFT layer and is electrically connected to the PWM pixel circuit 900. It can also be used for the purpose of. For example, a product developer or manufacturer turns on the eleventh transistor 361 through the control signal Test during the light emission period, and then checks the current flowing through the eleventh transistor 361, so that the PWM pixel circuit 900 It is possible to check whether there is an abnormality (for example, a short circuit or an open circuit).

On the other hand, various data signals (Sig), driving voltage (VDD), ground voltage (VSS), and control signals (Vsweep, Emi, SPWM(n), SPAM, Vini, VST, Test/Discharging) shown in FIG. It may be received from a timing controller (TCON), a processor, a power circuit, a sweep signal providing circuit, a driver circuit (eg, a data driver, a gate driver), and the like.

18 is a detailed circuit diagram of a pixel circuit according to an exemplary embodiment of the present disclosure. First, elements constituting the first pixel circuit 1100 and a connection relationship between the elements will be described with reference to FIG. 18. For reference, the pixel circuit shown in FIG. 18 is the same as the pixel circuit shown in FIG. 10.

18 illustrates a circuit related to one sub-pixel, that is, one light-emitting element 100 and a PWM pixel circuit 1100 for driving the one light-emitting element 100.

Referring to FIG. 18, the PWM pixel circuit 1100 may include a PWM driving circuit 1110 and a PAM driving circuit 1120.

Specifically, the PAM driving circuit 1120 includes a first transistor T8, a second transistor T9 connected between the drain terminal and the gate terminal of the first transistor T8, and a drain terminal of the first transistor T8. And a third transistor T7 connected to a terminal, a gate terminal connected to a gate terminal of the second transistor T9, and receiving a data signal Sig (ie, a PAM data voltage) through a source terminal.

In this case, the PAM driving circuit 1120 is turned on when the PAM data voltage is applied through the source terminal of the third transistor T7 while the second and third transistors T9 and T7 are turned on according to the control signal SPAM. A voltage equal to the sum of the applied PAM data voltage and the threshold voltage of the first transistor T8 through the first transistor T8 and the second transistor T9 is applied to the gate terminal C of the first transistor T8. ).

Meanwhile, in the PWM driving circuit 1110, the fourth transistor T3, the fifth transistor T4 connected between the drain terminal and the gate terminal of the fourth transistor T3, and the drain terminal are the source terminals of the fourth transistor T3. And a sixth transistor T2 connected to and having a gate terminal connected to the gate terminal of the fifth transistor T4 and receiving a data signal Sig (ie, a PWM data voltage) through a source terminal.

In this case, the PWM driving circuit 1110 applies the PWM data voltage through the source terminal of the sixth transistor T2 while the fifth and sixth transistors T4 and T2 are turned on according to the control signal SPWM(n). Then, a voltage equal to the sum of the applied PWM data voltage and the threshold voltage of the fourth transistor T3 through the turned-on fourth transistor T3 and the fifth transistor T4 is applied to the gate terminal of the fourth transistor T3. Apply to (A).

The seventh transistor T1 has a source terminal connected to the PWM driving voltage terminal (or driving voltage signal) VDD_PWM of the PWM pixel circuit 1100, and the drain terminal of the sixth transistor T2 and the fourth transistor. Commonly connected to the source terminal of (T3). The seventh transistor T1 is turned on/off to the control signal Emi to electrically connect or disconnect the PWM driving voltage terminal VDD_PWM and the PWM driving circuit 1110.

The eighth transistor T5 has a source terminal connected to the drain terminal of the fourth transistor T3 and a drain terminal connected to the gate terminal of the first transistor T8. The eighth transistor T5 is turned on/off according to the control signal Emi to electrically connect or disconnect the PWM driving circuit 1110 and the PAM driving circuit 1120.

The ninth transistor T6 has a source terminal connected to the PAM driving voltage terminal VDD_PAM of the PWM pixel circuit 1100, and a drain terminal having a source terminal of the first transistor T8 and a drain terminal of the third transistor T7. Is connected in common. The ninth transistor T6 is turned on/off by the control signal Em to electrically connect or disconnect the PAM driving voltage terminal VDD_PAM and the PAM driving circuit 1120.

The tenth transistor T10 has a source terminal connected to the drain terminal of the first transistor T8 and a drain terminal connected to the anode terminal of the light emitting element 100. The tenth transistor T10 is turned on/off according to the control signal Emi to electrically connect or disconnect the PAM driving circuit 1120 and the light emitting element 100.

One end of the first capacitor C1 is commonly connected to the gate terminal of the fourth transistor T3 and the drain terminal of the fifth transistor T4, and the other end is applied with a sweep voltage (ie, Vsweep). .

The drain terminal of the eleventh transistor T11 is commonly connected to the gate terminal of the first transistor T8 and the drain terminal of the second transistor T9, and the source terminal receives the initial voltage Vini.

The twelfth transistor T12 has a source terminal connected to one end of the first capacitor C1 and a drain terminal connected to the source terminal of the eleventh transistor T11.

One end of the second capacitor C2 is connected to the PWM driving voltage terminal VDD_PWM, and the other end is the gate terminal of the first transistor T8, the drain terminal of the second transistor T9, and the eleventh transistor T11. It is connected in common with the drain terminal of and the drain terminal of the eighth transistor T5.

The eleventh transistor T11 and the twelfth transistor T12 are turned on according to the control signal VST, so that the initial voltage Vini is applied to the gate terminal C of the first transistor T8 and the fourth transistor T3. It is applied to the gate terminal (A).

After the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3 are initialized, the PWM driving voltage VDD_PWM is the second capacitor. In order to prevent coupling to the gate terminal C of the first transistor T8 through (C2), the control signal for a certain period of time even after the PWM driving voltage VDD_PWM is applied to one end of the second capacitor C2. The initial voltage Vini is applied to the gate terminals C and A of the first and fourth transistors T8 and T3 by maintaining the on state according to (VST).

The thirteenth transistor T13 is connected between the anode terminal and the cathode terminal of the light emitting device 100.

The thirteenth transistor T13 is applied to a control signal Test to check whether the PWM pixel circuit 900 is abnormal before the light emitting element 100 is mounted on the TFT layer and electrically connected to the PWM pixel circuit 900. Can be followed. In addition, after the light emitting element 100 is mounted on the TFT layer and electrically connected to the PWM pixel circuit 900, the thirteenth transistor T13 has a control signal (Discharging) in order to discharge charges remaining in the light emitting element 100. ) Can be turned on.

Meanwhile, the cathode terminal of the light emitting device 100 is connected to the ground voltage VSS terminal.

Hereinafter, the operation of the PWM pixel circuit 1100 will be described in more detail with reference to FIG. 19.

19 is a timing diagram of various signals for driving the PWM pixel circuit of FIG. 18 according to an embodiment of the present disclosure.

Referring to FIG. 19, in order to display one image frame, the PWM pixel circuit 1100 includes an initialization period (Initialize), a holding period (Hold), a data voltage setting and a threshold voltage (Vth) compensation period, and an emission period. ), the discharge period (LED Discharging) may be driven in the order of the period.

At this time, the data voltage setting and the threshold voltage (Vth) compensation period, as in the example shown in FIG. 19, the PAM data voltage setting, the threshold voltage compensation period (PWM data + Vth compensation) and the PAM data voltage setting of the transistor T3 And a threshold voltage compensation period (PAM data + Vth compensation) of the transistor T8.

The initialization period is a period for initializing the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3. The PWM pixel circuit 1100 initializes the C and A terminal voltages to the initial voltage Vini in the initialization period.

Specifically, in the initialization period, since the eleventh and twelfth transistors T11 and T12 are turned on according to the control signal VST, the initial voltage Vini is applied to the first transistor T8 through the eleventh transistor T11. It is applied to the gate terminal C, and applied to the gate terminal A of the fourth transistor T3 through the twelfth transistor T12.

The sustain period is a period for continuously maintaining the voltages of the gate terminals C and A of the first and fourth transistors T8 and T3 in a low state (ie, an initialized state). This is because when the data voltage setting and threshold voltage Vth compensation period starts, the first and fourth transistors T8 and T3 must be turned on.

In the data voltage setting and threshold voltage compensation period, a data voltage is set in the PWM driving circuit 1110 and the PAM driving circuit 1120, respectively, and the threshold voltages Vth of the first and fourth transistors T8 and T3 are compensated. It is a period for.

According to an embodiment of the present disclosure, as shown in FIG. 19, PWM data voltage setting and threshold voltage compensation of the fourth transistor T3 are performed first, and then PAM data voltage setting and the first transistor T8 are performed. The threshold voltage compensation of may be performed. However, it goes without saying that the order may be changed according to embodiments.

On the other hand, during the data voltage setting and threshold voltage compensation period, the seventh to tenth transistors T1, T5, T6, and T10 are all turned off according to the control signal Em, and thus, the PWM driving circuit 1110 and the In each of the PAM driving circuits 1120, the data voltage is set and the threshold voltage is compensated in an independent state.

First, in the PWM data voltage setting and the threshold voltage compensation period (PWM data + Vth compensation) of the fourth transistor T3, the PWM data voltage transmitted through the data line (Sig wiring) is the gate terminal of the fourth transistor T3. This is the section that is applied as (A).

Specifically, when the fifth and sixth transistors T4 and T2 are turned on according to the control signal SPWM(n), the PWM data voltage is the sixth transistor T2, the fourth transistor T3, and the fifth transistor ( After passing through T4) in sequence, the compensated voltage (a voltage equal to the sum of the PWM data voltage and the threshold voltage of the fourth transistor T3) is input to node A. Accordingly, the compensated voltage is stored in the first capacitor C1 and node A maintains a floating state.

Meanwhile, the control signal SPWM(n) may be a signal output from a gate driver inside or outside the display panel 1000. In SPWM(n), n denotes the number of a pixel line included in the display panel 1000. Accordingly, the PWM data voltage is sequentially applied to the pixels (or sub-pixels) for each line of a plurality of pixels arranged in a matrix form.

Meanwhile, in the PAM data voltage setting and the threshold voltage compensation period (PAM data + Vth compensation) of the first transistor T8, the PAM data voltage transmitted through the data line (Sig wiring) is applied to the gate terminal of the first transistor T8 ( It is a section that is approved as C).

Specifically, during the PAM data voltage setting and the threshold voltage compensation period of the first transistor T8, since the control signal SPAM is low, the second transistor T9 and the third transistor T7 are turned on.

In this case, similar to the internal compensation principle of the PWM driving circuit 910 described above, since the PAM data voltage is input to the C node through the third transistor T7, the first transistor T8 and the second transistor T9, A voltage equal to the sum of the PAM data voltage and the threshold voltage of the first transistor T8 is input to the C node. The compensated voltage is stored in the second capacitor C2, and the C node maintains a floating state.

Meanwhile, the control signal SPAM may be a signal output from a gate driver inside or outside the display panel 1000. According to an embodiment of the present disclosure, unlike the control signal SPWM(n), the control signal SPAM may be collectively applied to pixels (or subpixels) included in the display panel 1000. have. In this case, according to an embodiment of the present disclosure, the PAM data voltage collectively applied to the subpixels included in the display panel 100 may have the same voltage. However, it is not limited thereto.

The emitting period (Emitting) is a period in which the light emitting device 100 emits light. During the light emission period, the light-emitting element 100 emits light according to the amplitude and pulse width of the driving current provided by the PWM pixel circuit 1100, thereby expressing a gray scale corresponding to the applied PAM data voltage and the PWM data voltage.

Specifically, during the light emission period, the seventh to tenth transistors T1, T5, T6, and T10 are turned on according to the control signal Emi, so that the PWM driving circuit 1110 and the PAM driving circuit 1120 are electrically connected to each other. In addition, the driving voltage terminals VDD_PWM and VDD_PMA and the light emitting device 100 are also electrically connected.

When the light-emitting period starts, the PAM driving voltage VDD_PAM is transmitted to the light-emitting element 100 through the ninth transistor T6, the first transistor T8, and the tenth transistor T10, so that the amount of the light-emitting element 100 At the stage, a potential difference occurs, and the light-emitting element 100 starts to emit light. In this case, the driving current for emitting light of the light emitting device 100 has an amplitude corresponding to the PAM data voltage.

Meanwhile, before the light emission period (specifically, after the application of the PAM data voltage is completed, the time period before the seventh to tenth transistors T1, T5, T6, and T10 are turned on according to the control signal Emi), the initial stage A sweep voltage Vsweep stepping up from the voltage value by a specific voltage value is applied to the first capacitor C1. In this case, a coupling voltage is generated at the gate terminal A of the fourth transistor T3 in a floating state through the first capacitor C1. Accordingly, the voltage of node A is increased by a step-up sweep voltage value from a voltage equal to the sum of the PWM data voltage and the threshold voltage of the fourth transistor T3.

Thereafter, when the light emission period starts, the sweep voltage gradually decreases to an initial voltage value, and accordingly, the voltage of node A decreases according to the sweep voltage. Meanwhile, the voltage value of the reduced voltage of node A is the sum of the threshold voltage of the fourth transistor T3 and the PWM driving voltage VDD_PWM applied to the source terminal of the fourth transistor T3 through the turned-on seventh transistor T1. When reaching, the fourth transistor T3 is turned from the off state to the on state.

When the fourth transistor T3 is turned on, the PWM driving voltage VDD_PWM is applied to the gate terminal C of the first transistor T8 through the seventh transistor T1, the fourth transistor T3, and the eighth transistor T5. ). When the PWM driving voltage VDD_PWM is applied to the gate terminal C of the first transistor T8, the first transistor T8 is turned off. When the first transistor T8 is turned off, since the driving voltage VDD does not reach the light emitting device 100, light emission of the light emitting device 100 is terminated.

In this way, the PWM driving circuit 910 applies the voltage applied to the gate terminal A of the fourth transistor T3 to the sweep voltage Vsweep from the time the PAM driving voltage VDD_PAM is applied to the light emitting element 100. The driving current is supplied to the light emitting device 100 until the voltage value is changed according to the sum of the PWM driving voltage VDD_PWM and the threshold voltage of the fourth transistor T3. That is, the driving current has a pulse width corresponding to the PWM data voltage.

On the other hand, even when the light emission of the light-emitting element 100 is ended, charges remaining in the light-emitting element 100 may exist. For this reason, a problem in that the light-emitting element 100 emit light finely after the light emission is terminated may be caused, and this may be a particularly problem when expressing a low gray scale (eg, black).

Accordingly, the LED Discharging period is a period for discharging the charge remaining in the light-emitting element 100 after the light-emitting period is over, and the PWM pixel circuit 1100 is the thirteenth period according to the control signal Discharging. By turning on the transistor T13, the electric charge remaining in the light emitting element 100 is completely discharged to the ground voltage VSS terminal, thereby solving the above-described problem.

Meanwhile, various data signals Sig, PWM driving voltage VDD_PWM, PAM driving voltage VDD_PAM, ground voltage VSS, and control signals Vsweep, Emi, SPWM(n), SPAM, Vini, and VST, Test/Discharging) may be received from an external Timing Controller (TCON), a processor, a power circuit, a sweep signal providing circuit, a driver circuit (eg, a data driver, a gate driver), and the like.

20 is a configuration diagram of a display device according to an exemplary embodiment of the present disclosure. Referring to FIG. 11, the display apparatus 1200 includes a display panel 1000, a panel driver 1210, and a processor 1220.

The display panel 1000 includes a plurality of pixels, and each pixel may include a plurality of subpixels. In this case, each sub-pixel may include the light emitting device 100 and the pixel circuit 200.

In addition, the display panel 1000 may be formed such that the gate lines G1 to Gn and the data lines D1 to Dm cross each other, and a pixel circuit 100 may be formed in a region provided at the intersection. In this case, a light emitting device may be formed on each pixel circuit. Specifically, the R light-emitting element is formed on the pixel circuit for driving the R light-emitting element, the G light-emitting element is formed on the pixel circuit for driving the G light-emitting element, and on the pixel circuit for driving the B light-emitting element. The B light-emitting element may be formed.

The panel driver 1210 drives the display panel 1000 under the control of the processor 1220 and may include a timing controller 1211, a data driver 1212, and a gate driver 1213.

The timing controller 1211 receives an input signal IS, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, a main clock signal MCLK, and the like from the outside, and receives an image data signal, a scan control signal, a data control signal, and the like. A light emission control signal or the like may be generated and provided to the display panel 1000, the data driver 1212, the gate driver 1212, a power circuit (not shown), a sweep signal providing circuit (not shown), and the like.

Also, the timing controller 1211 may apply various control signals to the pixel circuit 200 according to various embodiments of the present disclosure. In addition, according to an embodiment, a control signal for selecting one of the R, G, and B subpixels may be applied to the pixel circuit 200 through the mux circuit.

The data driver 1212 is a means for generating a data signal, and receives image data of R/G/B components from the processor 1220 and generates a data voltage (eg, PWM data voltage, PAM data voltage). Also, the data driver 1212 may apply the generated data signal to the display panel 1000.

The gate driver 1213 is a means for generating various control signals (eg, SPAM, SPWM[m], etc.), and transmits the generated various control signals to a specific row (or specific horizontal line) of the display panel 1000 Or, pass it on the entire line.

The power circuit (not shown) may provide the driving voltage VDD to the pixel circuit 200 included in the display panel 1000. In this case, in the case of the PWM pixel circuit, according to an embodiment, the power supply circuit (not shown) provides the driving voltage VDD through one line to the PWM pixel circuit, or the PWM driving voltage VDD_PWM through one line. Is provided to the PWM driving circuit, and the PAM driving voltage VDD_PAM may be provided to the PAM driving circuit through the other line.

The sweep signal providing circuit (not shown) may provide a sweep voltage to the pixel circuit 200 (precisely, a PWM pixel circuit) included in the display panel 1000. In this case, the sweep voltage may have a voltage waveform that increases by steps from the initial voltage and decreases in the form of a triangular waveform.

Meanwhile, as described above, the data driver 1212 and the gate driver 1213 may be implemented to be included in the driving circuit layer 40 formed on one surface of the substrate 30 of the display panel 1000 or separately. It may be implemented as a semiconductor IC and disposed on the other side of the substrate 30. Meanwhile, the sweep signal providing circuit (not shown) and the power circuit (not shown) are implemented in a chip form, and an external printed circuit board (PCB) is mounted together with the processor 1220 or the timing controller 1211, and through wiring. It may be connected to the pixel circuit 200.

However, this is only an example, and an implementation example is not limited thereto. For example, a sweep signal providing circuit (not shown), a power circuit (not shown), and a data driver 1212 are mounted on an external PCB, and the gate driver 1213 is included in the TFT layer of the display panel 1000. It can also be configured.

The processor 1220 controls the overall operation of the display device 1200. In particular, the processor 1220 may control the panel driver 1210 to drive the display panel 1000 so that the pixel circuit 200 may perform the above-described operations.

To this end, the processor 1220 is at least one of a central processing unit (CPU), a micro-controller, an application processor (AP), a communication processor (CP), and an ARM processor. It can be implemented as

Meanwhile, in FIG. 20, the processor 1220 and the timing controller 1211 have been described as separate components, but according to an embodiment, the timing controller 1211 may perform the function of the processor 1220 without the processor 1220. have.

21 is a flowchart illustrating a method of driving a display panel according to an embodiment of the present disclosure.

First, in the display panel, each of a plurality of pixels may include a plurality of light emitting devices, and may include a plurality of pixel circuits for driving the plurality of light emitting devices.

The first light-emitting element among the plurality of light-emitting elements is driven by PWM (Pulse Width Modulation) through the first pixel circuit (S2110).

Then, the second light-emitting device among the plurality of light-emitting devices is driven through a second pixel circuit (PAM) (S2120).

In this case, the plurality of light emitting devices include a red (R) light emitting device, a green (G) light emitting device, and a blue (B) light emitting device, the first light emitting device includes a green light emitting device, and the second light emitting device is red It may include a light emitting device and a blue light emitting device.

Meanwhile, the size of the first pixel circuit may be larger than the size of the second pixel circuit.

Meanwhile, each of the plurality of light emitting devices emits light based on a driving current provided from a pixel circuit for driving each light emitting device among a plurality of pixel circuits, and the first pixel circuit emits PAM data applied to the first pixel circuit. A first driving current having an amplitude corresponding to the voltage is provided to the first light emitting element for a time corresponding to the PWM data voltage applied to the first pixel circuit, and the second pixel circuit is the PAM data voltage applied to the second pixel circuit. A second driving current having an amplitude corresponding to may be provided to the second light emitting device.

In this case, the gradation of light emitted from the first light emitting device is controlled by the time when the first driving current is provided to the first light emitting device according to the magnitude of the PWM data voltage, and the gradation of light emitted from the second light emitting device is It can be controlled by the amplitude of the second driving current according to the magnitude of the PAM data voltage.

Meanwhile, each of the plurality of light emitting devices may be a micro LED.

Meanwhile, the first pixel circuit provides a driving current of a pulse width corresponding to the PWM data voltage to the first light emitting element by changing the voltage of the terminal of the first pixel circuit according to the sweep voltage applied to the first pixel circuit. The voltage may be a voltage that changes from the first voltage to the second voltage and then linearly changes from the second voltage.

Specifically, the first pixel circuit includes a transistor, and may control the pulse width of the driving current by performing a switching operation of the transistor based on the voltage of the gate terminal of the transistor that changes according to the sweep voltage.

Here, the sweep voltage may be a voltage that increases by a step from the first voltage to the second voltage before the light emission period of the first light emitting device and then decreases from the second voltage to the first voltage over time during the light emission period.

In this case, the voltage at the gate terminal of the driving transistor increases by the difference between the second voltage and the first voltage as the sweep voltage increases, and decreases from the increased voltage as the sweep voltage decreases, and the pulse width of the driving current May be determined based on the time until the voltage of the gate terminal to be decreased reaches a specific voltage.

Here, the specific voltage may be a voltage determined based on a driving voltage for driving the first pixel circuit.

Further, a difference between the first voltage and the second voltage may correspond to a range of a PWM data voltage for expressing a gray level of light emitted from the first inorganic light emitting device.

Meanwhile, specific details related to this have been described above.

Meanwhile, various embodiments of the present disclosure may be implemented with software including instructions stored in a machine-readable storage media (eg, a computer). Here, the device is a device capable of calling a stored command from a storage medium and operating according to the called command, and may include the display device 1200 according to the disclosed embodiments.

When the command is executed by a processor, the processor may perform a function corresponding to the command directly or by using other components under the control of the processor. Instructions may include code generated or executed by a compiler or interpreter. A storage medium that can be read by a device may be provided in the form of a non-transitory storage medium. Here,'non-transient' means that the storage medium does not contain a signal and is tangible, but does not distinguish between semi-permanent or temporary storage of data in the storage medium.

According to an embodiment, a method according to various embodiments disclosed in the present disclosure may be provided by being included in a computer program product. Computer program products can be traded between sellers and buyers as commodities. The computer program product may be distributed online in the form of a device-readable storage medium (eg, compact disc read only memory (CD-ROM)) or through an application store (eg, Play StoreTM). In the case of online distribution, at least some of the computer program products may be temporarily stored or temporarily generated in a storage medium such as a server of a manufacturer, a server of an application store, or a memory of a relay server.

Each of the constituent elements (eg, modules or programs) according to various embodiments may be composed of a singular or a plurality of entities, and some sub-elements of the aforementioned sub-elements are omitted, or other sub-elements are various. It may be further included in the embodiment. Alternatively or additionally, some constituent elements (eg, a module or a program) may be integrated into one entity, and functions performed by each corresponding constituent element prior to the consolidation may be performed identically or similarly. Operations performed by modules, programs, or other components according to various embodiments may be sequentially, parallel, repetitively or heuristically executed, or at least some operations may be executed in a different order, omitted, or other operations may be added. I can.

The above description is merely illustrative of the technical idea of the present disclosure, and those of ordinary skill in the art to which the present disclosure pertains will be able to make various modifications and variations without departing from the essential characteristics of the present disclosure. Further, the embodiments according to the present disclosure are not intended to limit the technical idea of the present disclosure, but are described, and the scope of the technical idea of the present disclosure is not limited by these embodiments. Accordingly, the scope of protection of the present disclosure should be interpreted by the following claims, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the present disclosure.

100: light-emitting element 200: pixel circuit

Claims (24)

In the display panel including a plurality of pixels,
A plurality of light-emitting elements constituting each pixel; And
Includes; a plurality of pixel circuits for driving the plurality of light emitting devices,
The plurality of pixel circuits,
A first pixel circuit for driving a pulse width modulation (PWM) of a first light emitting device among the plurality of light emitting devices, and a second pixel circuit for driving a pulse amplitude modulation (PAM) of a second light emitting device of the plurality of light emitting devices. A display panel containing. The method of claim 1,
The plurality of light emitting devices include a red (R) light emitting device, a green (G) light emitting device, and a blue (B) light emitting device,
The first light emitting device includes the green light emitting device,
The second light emitting device includes the red light emitting device and the blue light emitting device. The method of claim 1,
The size of the first pixel circuit is larger than the size of the second pixel circuit. The method of claim 1,
Each of the plurality of light emitting elements emit light based on a driving current provided from a pixel circuit for driving each light emitting element among the plurality of pixel circuits,
The first pixel circuit applies a first driving current having an amplitude corresponding to the PAM data voltage applied to the first pixel circuit for a time corresponding to the PWM data voltage applied to the first pixel circuit. Provided as,
The second pixel circuit provides a second driving current having an amplitude corresponding to a PAM data voltage applied to the second pixel circuit to the second light emitting device. The method of claim 4,
The gradation of light emitted from the first light-emitting device is controlled by a time when the first driving current is provided to the first light-emitting device according to the magnitude of the PWM data voltage,
The gradation of light emitted from the second light emitting device is controlled by the amplitude of the second driving current according to the magnitude of the PAM data voltage. The method of claim 1,
Each of the plurality of light emitting elements is a micro LED display panel. The method of claim 1,
The first pixel circuit,
A driving current having a pulse width corresponding to a PWM data voltage is provided to the first light-emitting element by changing a voltage of a terminal of the first pixel circuit according to a sweep voltage applied to the first pixel circuit,
The sweep voltage is a voltage that changes linearly from a second voltage after changing from a first voltage to a second voltage. The method of claim 7,
The first pixel circuit,
A display panel comprising a transistor, and controlling a pulse width of the driving current by performing a switching operation of the transistor based on a voltage of the gate terminal of the transistor changed according to the sweep voltage. The method of claim 8,
The sweep voltage is,
A display panel having a voltage that decreases with time from the second voltage during the light emission period after stepping up from the first voltage to the second voltage before the light emission period of the first light emitting device. The method of claim 9,
The voltage of the gate terminal of the driving transistor is,
It rises by a difference between the second voltage and the first voltage according to the rise of the sweep voltage, and decreases from the risen voltage according to the decrease of the sweep voltage,
The pulse width of the driving current is,
A display panel that is determined based on a time until the voltage of the gate terminal decreases reaches a specific voltage. The method of claim 10,
The specific voltage is,
A display panel that is a voltage determined based on a driving voltage for driving the first pixel circuit. The method of claim 7,
The difference between the first voltage and the second voltage corresponds to a range of the PWM data voltage for expressing a gray level of light emitted from the first inorganic light emitting device. A method of driving a display panel, wherein each of a plurality of pixels includes a plurality of light emitting devices, and comprising a plurality of pixel circuits for driving the plurality of light emitting devices,
Driving a first light-emitting device among the plurality of light-emitting devices through a first pixel circuit (PWM); And
Driving a second light-emitting element among the plurality of light-emitting elements through a second pixel circuit (PAM). The method of claim 13,
The plurality of light emitting devices include a red (R) light emitting device, a green (G) light emitting device, and a blue (B) light emitting device,
The first light emitting device includes the green light emitting device,
The second light-emitting device includes the red light-emitting device and the blue light-emitting device. The method of claim 13,
The size of the first pixel circuit is larger than the size of the second pixel circuit. The method of claim 13,
Each of the plurality of light emitting elements emit light based on a driving current provided from a pixel circuit for driving each light emitting element among the plurality of pixel circuits,
The first pixel circuit applies a first driving current having an amplitude corresponding to the PAM data voltage applied to the first pixel circuit for a time corresponding to the PWM data voltage applied to the first pixel circuit. Provided as,
The second pixel circuit provides a second driving current having an amplitude corresponding to a PAM data voltage applied to the second pixel circuit to the second light emitting device. The method of claim 16,
The gradation of light emitted from the first light-emitting device is controlled by a time when the first driving current is provided to the first light-emitting device according to the magnitude of the PWM data voltage,
A method of driving a display panel in which a gray level of light emitted from the second light emitting device is controlled by an amplitude of the second driving current according to a magnitude of the PAM data voltage. The method of claim 13,
Each of the plurality of light emitting elements is a method of driving a display panel of a micro LED. The method of claim 13,
The first pixel circuit,
A driving current having a pulse width corresponding to a PWM data voltage is provided to the first light-emitting element by changing a voltage of a terminal of the first pixel circuit according to a sweep voltage applied to the first pixel circuit,
The sweep voltage is a voltage changed from a first voltage to a second voltage and then linearly changed from a second voltage. The method of claim 19,
The first pixel circuit,
A method of driving a display panel including a transistor and controlling a pulse width of the driving current by performing a switching operation of the transistor based on a voltage of the gate terminal of the transistor that is changed according to the sweep voltage. The method of claim 20,
The sweep voltage is,
A method of driving a display panel having a voltage that decreases with time from the second voltage during the light emission period after stepping up from the first voltage to the second voltage before the light emission period of the first light emitting device. The method of claim 21,
The voltage of the gate terminal of the driving transistor is,
It rises by a difference between the second voltage and the first voltage according to the rise of the sweep voltage, and decreases from the risen voltage according to the decrease of the sweep voltage,
The pulse width of the driving current is,
A method of driving a display panel that is determined based on a time until the reduced voltage of the gate terminal reaches a specific voltage. The method of claim 22,
The specific voltage is,
A method of driving a display panel that is a voltage determined based on a driving voltage for driving the first pixel circuit. The method of claim 13,
A method of driving a display panel, wherein the difference between the first voltage and the second voltage corresponds to a range of the PWM data voltage for expressing a gray level of light emitted from the first inorganic light emitting device.

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