KR20180016182A - Semiconductor device and semiconductor decive package having the same - Google Patents

Abstract

A semiconductor device according to one embodiment comprises: a light emitting structure which comprises a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer placed between first and second semiconductor layers, and a plurality of recesses which penetrate the active layer in the second conductive semiconductor layer and are formed to a part of the first conductive semiconductor layer; a first electrode which is placed inside the plurality of recesses and electrically connected to the first conductive semiconductor layer; a second electrode which is electrically connected to the second conductive semiconductor layer; and a pad unit which contains a first pad and a second pad electrically connected to the second electrode. Recesses in a first group among the plurality of recesses are placed away from each other between the first and second pads at a first gap in a first direction connecting the first pad to the second pad, and recesses in a second group among the plurality of recesses are placed away from each other in the first direction at a second gap wider than the first gap in a second direction orthogonal to the first direction in the recesses of the first group. Recesses in a third group among the plurality of recesses are placed away from each other in the first direction at a third gap narrower than the recesses of the first group in the second direction in the recesses of the second group. The purpose of the present invention is to provide a semiconductor device which prevents currents from being concentrated in an area adjacent to a pad and improves electrical properties.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a semiconductor device and a semiconductor package including the semiconductor device.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device for improving light efficiency.

Semiconductor devices including compounds such as GaN and AlGaN have many merits such as wide and easy bandgap energy, and can be used variously as light emitting devices, light receiving devices, and various diodes.

Particularly, a light emitting device such as a light emitting diode or a laser diode using a semiconductor material of Group 3-5 or 2-6 group semiconductors can be applied to various devices such as a red, Blue, and ultraviolet rays. By using fluorescent materials or combining colors, it is possible to realize a white light beam with high efficiency. Also, compared to conventional light sources such as fluorescent lamps and incandescent lamps, low power consumption, , Safety, and environmental friendliness.

In addition, when a light-receiving element such as a photodetector or a solar cell is manufactured using a semiconductor material of Group 3-5 or Group 2-6 compound semiconductor, development of a device material absorbs light of various wavelength regions to generate a photocurrent , It is possible to use light in various wavelength ranges from the gamma ray to the radio wave region. It also has advantages of fast response speed, safety, environmental friendliness and easy control of device materials, so it can be easily used for power control or microwave circuit or communication module.

Accordingly, the semiconductor device can be replaced with a transmission module of an optical communication means, a light emitting diode backlight replacing a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, White LED lightings, automotive headlamps, traffic lights, and gas or fire sensors. In addition, semiconductor devices can be applied to high frequency application circuits, other power control devices, and communication modules.

Particularly, a semiconductor device provided in an automotive head lamp is required to have a high output. This causes the semiconductor device to generate a high current to realize a high output lamp. This causes current and heat to be concentrated around the region adjacent to the pad, thereby shortening the lifetime of the active layer region and causing a reduction in reliability.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device for preventing electric current from concentrating on a region adjacent to a pad, thereby improving electrical characteristics.

The semiconductor device according to the embodiment includes a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first semiconductor layer and the second semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, A light emitting structure including a plurality of recesses formed to a portion of the first conductivity type semiconductor layer, a first electrode disposed in the plurality of recesses and electrically connected to the first conductivity type semiconductor layer, A second electrode electrically connected to the second conductivity type semiconductor layer; and a pad portion including a first pad and a second pad electrically connected to the second electrode, wherein the first portion of the plurality of recesses Wherein a recess of the second pad is spaced apart in a first direction connecting the first pad and the second pad at a first gap between the first pad and the second pad, Are arranged in the first direction at a second interval larger than the first interval in a second direction perpendicular to the first direction in the recesses of the first group, and the recesses of the plurality of recesses The three groups of recesses may be arranged in the first direction spaced apart from the recesses of the second group by a third spacing less than the recesses of the first group in the second direction.

The semiconductor device according to the embodiment includes a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, A light emitting structure including a plurality of recesses penetrating the active layer through the active layer and extending to a portion of the first conductive semiconductor layer; and a light emitting structure disposed in the plurality of recesses and electrically connected to the first semiconductor layer A second electrode electrically connected to the second semiconductor layer; and a pad electrically connected to the second electrode, wherein the recess of the first group of the plurality of recesses is electrically connected to the pad, Wherein the recesses of the second group of the plurality of recesses are spaced apart from each other in the first direction and in the second direction perpendicular to the first direction, 2 rooms And spaced apart from the first spacing in a third direction between the incisions.

The semiconductor device according to the embodiment has an effect of preventing current from concentrating on the recess region adjacent to the pad.

Further, the semiconductor device according to the embodiment has an effect of improving the heat generating characteristic and improving the lifetime and reliability.

Further, the embodiment has the effect of reducing the heat dissipation cost due to the temperature drop.

Further, the embodiment can control the thickness of the current blocking layer surrounding the recess to prevent current from concentrating in the recess region adjacent to the pad portion.

Further, in the embodiment, the thickness is determined according to the distance between the recesses, thereby maximizing the coupling efficiency between the electron and the hole, thereby maximizing the light efficiency of the semiconductor element.

1 is a plan view showing a semiconductor device according to a first embodiment.
2 is a cross-sectional view showing a semiconductor device cut along the line AA in FIG.
FIG. 3 is a diagram comparing the current spreading phenomenon of the semiconductor device according to the first embodiment with the prior art.
4 is a diagram comparing the power of the semiconductor device according to the first embodiment with the conventional one.
5 is a plan view showing a semiconductor device according to the second embodiment.
6 is a plan view showing a semiconductor device according to the third embodiment.
7 is a cross-sectional view showing a semiconductor device cut along the line BB of FIG.
8 is a cross-sectional view illustrating a semiconductor package including a semiconductor device according to an embodiment.
9 is a perspective view showing an automobile headlamp including the semiconductor device according to the embodiment.
10 is a cross-sectional view showing the automotive head lamp of Fig.

The embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment.

It is to be understood that the description related to the other embodiments may be understood as a specific example, unless otherwise described or contradicted by the description.

For example, if the features of configuration A are described in a particular embodiment, and the features of configuration B are described in another embodiment, even if the embodiment in which configuration A and configuration B are combined is not explicitly described, It is to be understood that they fall within the scope of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG.

In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The semiconductor device may include various electronic devices such as a light emitting device and a light receiving device. The light emitting device and the light receiving device may include the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer.

The semiconductor device according to this embodiment may be a light emitting device.

The light emitting device emits light by recombination of electrons and holes, and the wavelength of the light is determined by the energy band gap inherent to the material. Thus, the light emitted may vary depending on the composition of the material.

FIG. 1 is a plan view showing a semiconductor device according to a first embodiment, FIG. 2 is a cross-sectional view showing a semiconductor device cut along the line AA in FIG. 1, And FIG. 4 is a diagram comparing the power of the semiconductor device according to the first embodiment with the conventional one. Here, in FIG. 2, only three recesses shown in FIG. 1 are shown for convenience of explanation.

1 and 2, a semiconductor device 100 according to a first embodiment includes a light emitting structure including a first conductivity type semiconductor layer 11, an active layer 12, and a second conductivity type semiconductor layer 13, A second electrode 81 electrically connected to the second conductivity type semiconductor layer 13; a first electrode 33 electrically connected to the first conductivity type semiconductor layer 11; And a pad portion 92 including a first pad and a second pad electrically connected to the second electrode 81.

The light emitting structure 10 includes a first conductive semiconductor layer 11, an active layer 12 disposed under the first conductive semiconductor layer 11, and a second conductive semiconductor layer 13). The first conductive semiconductor layer 11 may be formed of a semiconductor compound, for example, a compound semiconductor such as Group II-IV and Group III-V. The first conductivity type semiconductor layer 11 may be a single layer or a multilayer.

The first conductive semiconductor layer 11 may be doped with a first conductive dopant. For example, when the first conductivity type semiconductor layer 11 is an n-type semiconductor layer, it may include an n-type dopant. For example, the n-type dopant may include but is not limited to Si, Ge, Sn, Se, and Te. The first conductive semiconductor layer 11 may include a semiconductor material having a composition formula of InxAlyGa1-x-yN (0 = x = 1, 0 = y = 1, 0 = x + y = 1) But is not limited thereto. For example, the first conductive semiconductor layer 11 may be selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, May include a concave-convex structure 11A on its upper surface. The concavoconvex structure 11A may be a shape having a cross section of an apex and a valley, but is not limited thereto and may be a shape having a polygon or a curvature. The concave and convex structure 11A can improve light extraction efficiency.

The active layer 12 may be disposed under the first conductive semiconductor layer 11.

The active layer 12 may optionally include a single quantum well, a multiple quantum well (MQW), a quantum wire structure, or a quantum dot structure. The active layer 12 may be composed of a compound semiconductor. The active layer 12 may be formed of at least one of Group II-IV and Group III-V compound semiconductors.

When the active layer 12 is implemented as a multiple quantum well structure (MQW), quantum wells and quantum wells may be alternately arranged. The quantum well and the quantum well may be a semiconductor material having a composition formula of InxAlyGa1-x-yN (0? X? 1, 0? Y? 1, 0? X + y? For example, the active layer 12 may be formed of one of InGaN / GaN, InGaN / AlGaN, InGaN / InGaN, InAlGaN / InAlGaN, GaN / AlGaN, InAlGaN / GaN, GaInP / AlGaInP, GaP / AlGaP, InGaP / AlGaP, GaAs / AlGaAs, But the present invention is not limited thereto.

The second conductive semiconductor layer 13 may be disposed under the active layer 12.

The second conductivity type semiconductor layer 13 may be formed of a semiconductor compound such as a Group II-IV and a Group III-V compound semiconductor. The second conductivity type semiconductor layer 13 may be a single layer or a multilayer. The second conductive semiconductor layer 13 may be doped with a second conductive dopant. For example, when the second conductivity type semiconductor layer 13 is a p-type semiconductor layer, it may include a p-type dopant. For example, the p-type dopant may include Mg, Zn, Ca, Sr, Ba, and the like, but is not limited thereto. The second conductive semiconductor layer 13 may include a semiconductor material having a composition formula of InxAlyGa1-x-yN (0 = x = 1, 0 = y = 1, 0 = x + y = 1) It is not. For example, the second conductive semiconductor layer 13 may be selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP.

Although the light emitting structure 10 is described as being limited to the first conductivity type semiconductor layer 11 of the n-type semiconductor layer and the second conductivity type semiconductor layer 13 of the p-type semiconductor layer, The layer 11 may be formed as a p-type semiconductor layer, and the second conductivity type semiconductor layer 13 may be formed as an n-type semiconductor layer, but the present invention is not limited thereto. On the second conductivity type semiconductor layer 13, a semiconductor layer, for example, an n-type semiconductor layer (not shown) having a polarity opposite to that of the second conductivity type may be formed. Accordingly, the light emitting structure 10 may have any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

The second electrode 81 may be disposed below the light emitting structure 10. The second electrode 81 may be disposed between the light emitting structure 10 and the substrate 70. The second electrode 81 may be electrically connected to the second conductive semiconductor layer 13.

The second electrode (81) may be electrically insulated from the first electrode (33). The second electrode 81 may include a contact layer 15, a reflective layer 17, and a capping layer 35.

The contact layer 15 may be disposed under the second conductive type semiconductor layer 13. The contact layer 15 may be in direct contact with the second conductive semiconductor layer 13. The contact layer 15 is disposed between the second conductivity type semiconductor layer 13 and the reflective layer 17 to effectively contact the contact layer 15 and the reflective layer 17, 13) to smooth the current injection. The contact layer 15 may extend from the bottom surface of the second conductivity type semiconductor layer 13 to the bottom surface of the current blocking layer 30. When the contact layer 15 is disposed on a part of the bottom surface of the current blocking layer 30, the reflecting layer 17 may be arranged so as to vertically overlap with a part of the current blocking layer 30.

The thickness of the contact layer 15 may be 1 nm to 10 nm. If the thickness of the contact layer 15 is less than 1 nm, the electrical characteristics of the light emitting device are deteriorated. If the thickness of the contact layer 15 exceeds 10 nm, the extraction efficiency due to an increase in the light absorption rate is lowered.

When the reflective layer 17 is vertically overlapped with a part of the current blocking layer 30, the area capable of reflecting light emitted from the active layer 12 to the lower portion of the light emitting structure 10 may increase.

The contact layer 15 may be electrically connected to the second conductive semiconductor layer 13. The contact layer 15 may be a conductive oxide, a conductive nitride, or a metal. For example, the contact layer 15 may be formed of ITO (Indium Tin Oxide), ITON (ITO), IZO, IZON, Aluminum Zinc Oxide, (Indium Zinc Tin Oxide), IZO (Indium Aluminum Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), IGTO (Indium Gallium Tin Oxide), ATO (Antimony Tin Oxide) , At least one of ZnO, IrOx, RuOx, NiO, In, Au, W, Al, Pt, Ag and Ti.

The reflective layer 17 may be disposed between the contact layer 15 and the capping layer 35. The reflective layer 17 may be electrically connected to the contact layer 15 and the capping layer 35. The reflective layer 17 may reflect the light emitted from the active layer 12 to the lower portion of the light emitting structure 10 toward the upper portion of the light emitting structure 10. The area where the reflective layer 17 is disposed may be equal to or narrower than the area where the contact layer 15 is disposed. When the area of the reflective layer 17 is narrower than or equal to the area of the contact layer 15, the electrical reliability of the semiconductor device can be improved. 15 are larger than the area where they are disposed, the optical characteristics can be improved but the electrical reliability can be lowered.

The reflective layer 17 may be a metal. The reflective layer 17 may be a metal or an alloy including at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Cu, Au and Hf. The reflective layer 17 may be formed of a metal or an alloy of ITO (Indium-Tin-Oxide), IZO (Indium-Zinc-Oxide), IZTO (Indium-Zinc-Tin-Oxide), IAZO (Indium-Aluminum- Layered or multilayered structure of transparent conductive materials such as IGZO (Indium-Gallium-Zinc-Oxide), IGTO (Indium-Gallium-Tin-Oxide), AZO .

When the reflective layer 17 is made of an Ag / Ni layer, the Ag layer may have a thickness of 100 nm to 300 nm. If the thickness of the Ag layer is less than 100 nm, the density of the reflective layer 17 is not formed to be high, and the reflectance may remarkably decrease. When the thickness of the Ag layer exceeds 300 nm, peeling due to stress occurs.

The Ni layer may have a thickness of 10 nm to 100 nm. If the thickness of the Ni layer is less than 10 nm, migration and agglomeration characteristics are not sufficient to fix Ag atoms having high properties. When the thickness of the Ni layer exceeds 100 nm, the stress becomes large and the possibility of peeling of the Ag layer increases.

The capping layer 35 may be disposed under the reflective layer 17. The capping layer 35 is in direct contact with a part of the contact layer 15 exposed from the reflective layer 17 when the area of the reflective layer 17 is larger than the area of the contact layer 15 . The capping layer 35 may be disposed under the pad portion 92. The capping layer 35 may be electrically connected to the pad portion 92. The capping layer 35 may be in direct contact with the bottom surface of the pad portion 92.

The capping layer 35 may function to spread the current injected from the pad portion 92 into the second conductive semiconductor layer 13 uniformly in the light emitting structure 10.

The capping layer 35 may provide driving power to the light emitting structure 10 from the pad portion 92. The capping layer 35 may be a conductive material. For example, the capping layer 35 may include at least one of Au, Cu, Ni, Ti, Ti, W, Cr, W, Pt, V, Fe and Mo. The edge of the capping layer 35 may be disposed on the outer side of the edge of the light emitting structure 10.

When the capping layer 35 is made of a Ti / Ni / Ti layer, the thickness of Ti on one side of Ni may be formed to be 1 nm to 3 nm. If the thickness of Ti is less than 1 nm, the adhesion property between Ti below Ni and Ti above Ni may be weakened. If the thickness of Ti exceeds 3 nm, the possibility of peeling of the adhesive layer itself becomes high.

The thickness of Ni may be formed to be 300 nm to 400 nm. If the thickness of Ni is less than 300 nm, current diffusion becomes difficult. If the thickness of Ni exceeds 400 nm, the possibility of peeling due to stress becomes high.

The thickness of Ti on the other side of Ni may be formed to be 10 nm to 100 nm. When the thickness of Ti is less than 10 nm, adhesion with the lower insulating layer is reduced. If the thickness of Ti exceeds 100 nm, the possibility of peeling due to stress with the lower insulating layer becomes high.

The substrate 70 may be disposed under the second electrode 81. The substrate 70 may be electrically connected to the first conductive semiconductor layer 11. The substrate 70 may be electrically connected to the first electrode 33.

To this end, the substrate 70 may comprise a conductive material. The substrate 70 may be a metal or a carrier substrate. For example, the substrate 70 may be a semiconductor substrate (for example, Si, Ge, GaN, GaAs, ZnO, SiC, or the like) into which Ti, Cr, Ni, Al, Pt, Au, W, Cu, SiGe, etc.), and may be formed as a single layer or multiple layers.

A bonding layer 60 and a diffusion barrier layer 50 may be formed on the substrate 70.

The diffusion preventing layer 50 may include a function of preventing diffusion of a substance contained in the bonding layer 60. The diffusion barrier layer 50 may be electrically connected to the bonding layer 60 and the substrate 70. The diffusion barrier layer 50 may include at least one of Cu, Ni, Ti, Ti, W, Cr, W, Pt, V, Fe and Mo.

The bonding layer 60 may be disposed under the diffusion barrier layer 50. The bonding layer 60 may be disposed between the diffusion barrier layer 50 and the substrate 70. The bonding layer 60 serves to stably bond the diffusion prevention layer 50 and the substrate 70. The bonding layer 60 may include a barrier metal or a bonding metal. For example, the bonding layer 60 may include at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, Nb, Pd or Ta.

The pad portion 92 may be disposed on the second electrode 81. The pad portion 92 may be electrically connected to the second electrode 81. The pad portion 92 may be spaced apart from the light emitting structure 10. The pad portion 92 may be disposed outside the light emitting structure 10. The pad portion 92 may be disposed on the second electrode 81 located outside the light emitting structure 10.

The pad portion 92 may include a first pad 92a and a second pad 92b. The first pad 92a may be disposed adjacent to one side edge of the semiconductor element 100. [ The second pad 92b may be disposed adjacent to the other edge of the semiconductor device 100. [

The pad portion 92 may include at least one of Cu, Ni, Ti, Ti, W, Cr, W, Pt, V, Fe and Mo and may be a single layer or a multilayer.

The semiconductor device 100 of the embodiment may include a protective layer 95 disposed on the light emitting structure 10. The passivation layer 95 may protect the surface of the light emitting structure 10 and may isolate the pad portion 92 from the light emitting structure 10. Since the protective layer 95 has a lower refractive index than the material of the semiconductor layer constituting the light emitting structure 10 and the light in the light emitting structure 10 is refracted into the protective layer 95 having a low refractive index, And the protective layer 95 can be reduced and the light extraction efficiency can be improved. For example, the protective layer 95 may be formed of an oxide or a nitride. For example, the protective layer 95 may be formed of at least one selected from the group consisting of SiO2, SixOy, Si3N4, SixNy, SiOxNy, Al2O3, TiO2, AlN,

The semiconductor device 100 may further include an insulating layer 41 for insulating the second electrode 81 and the first electrode 33 from each other. The insulating layer 41 may be disposed between the second electrode 81 and the substrate 70. The insulating layer 41 may be an oxide or a nitride. For example, the insulating layer 41 may be at least one selected from the group consisting of SiO2, SixOy, Si3N4, SixNy, SiOxNy, Al2O3, TiO2, AlN and the like.

The semiconductor device 100 of the embodiment includes a plurality of recesses 2, a first electrode 33 and a plurality of connection portions 51 for electrically connecting the substrate 70 and the first conductivity type semiconductor layer 11, . ≪ / RTI >

The plurality of recesses (2) may be disposed in the light emitting structure (10). The recesses 2 may be formed in the second conductivity type semiconductor layer 13 through the active layer 12 to a portion of the first conductivity type semiconductor layer 11. [ The recesses 2 may expose a portion of the first conductivity type semiconductor layer 11 to electrically connect the substrate 70 and the first conductivity type semiconductor layer 11. The plurality of recesses 2 may be spaced apart from one another by a predetermined distance. The widths of the recesses 2 may be the same, but are not limited thereto. The spacing of the plurality of recesses 2 can be arranged closer to the pad portion 92. [ The recess (2) structure of the semiconductor device according to the embodiment will be described in detail later.

The first electrode (33) may be disposed in the plurality of recesses (2). The first electrode 33 may be electrically connected to the first conductive type semiconductor layer 11 exposed from the recess 2. [ The first electrode 33 may be in direct contact with the first conductive semiconductor layer 11 exposed from the recess 2. The first electrode 33 may include at least one of Cr, V, W, Ti, Zn, Ni, Cu, Al, Au and Mo. The diameter of the first electrode 33 may be 30 占 퐉 to 40 占 퐉.

The plurality of connection portions 51 may be disposed under the first electrode 33. The plurality of connection portions 51 may be electrically connected to the first electrode 33. The plurality of connection portions 51 may be connected to the substrate 70 made of a conductive material through the insulating layer 41. The plurality of connection portions 51 may be in direct contact with the diffusion preventing layer 50. The plurality of connection portions 51 may include at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, Nb, Pd or Ta.

The semiconductor device 100 of the embodiment may further include a second insulating layer 37 for insulating the diffusion barrier layer 50 from the active layer 12 and the first conductivity type semiconductor layer 13. The second insulating layer 37 may be disposed so as to surround the first electrode 33. The second insulating layer 37 is formed on the sidewall of the first conductivity type semiconductor layer 11 exposed by the recess 2, the sidewall of the active layer 12, and the sidewall of the second conductivity type semiconductor layer 13 . Here, the diameter of the second insulating layer 37 may be 50 탆 to 60 탆.

The second insulating layer 37 may further include a current blocking layer 30 (CBL) that is in contact with a lower portion of the second conductive semiconductor layer 13. The current blocking layer 30 may be arranged to surround the recess 2. [ Here, the current blocking layer 30 may be defined as a region between the second conductivity type semiconductor layer 13 and the other side of the lower layer, one side of which overlaps with the second conductivity type semiconductor layer 13, have. The side wall and a part of the lower side of the current blocking layer 30 may be in contact with the contact layer 15. [ A part of the lower portion of the current blocking layer 30 may be in contact with the insulating layer 41. The diameter of the current blocking layer 30 may be from 90 탆 to 95 탆.

The current blocking layer 30 may be elliptical or at least three or more polygons.

The current blocking layer 30 may be an oxide or a nitride. For example, the current blocking layer 30 may be at least one selected from the group consisting of SiO2, SixOy, Si3N4, SixNy, SiOxNy, Al2O3, TiO2, AlN and the like. The current blocking layer 30 may include a light transmitting material through which light can be transmitted, but the present invention is not limited thereto.

Since this semiconductor element can concentrate around the recess 2 adjacent to the pad portion 92, the semiconductor element of the first embodiment controls the interval of the recess 2 so that a current flows around the pad portion 92 It is possible to prevent concentration in the region. Here, the interval of the recesses 2 may be defined as a distance between the centers of the first electrodes 33 disposed adjacent to each other in the recesses 2.

As shown in Fig. 1, the plurality of recesses 2 may comprise a plurality of groups of recesses. The recesses 2 of the plurality of groups can be disposed closer to the recesses 2 as they are away from the pad portions 92.

The first group of recesses 2-1 may include a plurality of recesses 2 formed between the first pad 92a and the second pad 92b. The first group of recesses 2-1 is formed by connecting the first pad 91a and the second pad 92b at a first gap L1 between the first pad 92a and the second pad 92b And may be spaced apart in the first direction D1.

The recesses 2-2 of the second group may be spaced apart from the recesses 1-1 of the first group in a second spacing L2 in the second direction D2. The second direction D2 may be a direction perpendicular to the first direction D1 and the second direction D2 may be a direction away from the pad portion 92. [ The second spacing L2 may be greater than the first spacing L1. The recesses 2-2 of the second group may be formed to be equal to the first interval L1, but are not limited thereto.

The second spacing L2 may be 1.25 to 1.35 times the first spacing L1. Alternatively, the second spacing L2 may be determined by: < EMI ID = 1.0 >

The recesses 2-3 of the third group may be spaced apart from the recesses 2-2 of the second group in the third direction L3 in the second direction D2. The recesses 2-3 of the third group are farther from the pad portion 92 than the recesses 2-2 of the second group. The third interval L3 may be formed to be smaller than the first interval L1.

The third group of recesses 2-3 may include a plurality of groups of recesses. The recesses 2-3 of the third group extend from the recesses 2-31 of the third group 1 to the recesses 2-2 of the second group adjacent to the recesses 2-2 of the second group, And a third-n group of recesses (2-3n) farthest from the third-n group. The spacing of the recesses 2-3 of the third group may be increased as the pad portions 92 are closer to each other. For example, as the recesses 2-3 of the third group are closer to the pad portion 92, the intervals may be increased at regular intervals.

As the distance between the recesses 2-3 of the third group is closer to the pad portion 92, the spacing of the recesses 2-3 of the third group distant from the pad portion 92 There is an effect that the current concentrated around the recess 2 adjacent to the pad portion 92 can be dispersed.

The third-n group of recesses 2-3n disposed at the farthest distance from the pad portion 92 of the third group of recesses 2-3 and the third (n-1) The interval Ln of the recesses of the semiconductor device (not shown) can be fixed constant. For example, the interval Ln between the recesses of the third-n group (2-3n) and the adjacent third (n-1) groups can be determined by the following equation (2).

? can be determined according to the experimental value according to the size of the semiconductor device, and may be formed to be 1/5 to 1/7. For example, assuming that L1 = 1248 占 퐉, Ln may be 208 占 퐉, L (n-1) may be 248 占 퐉, and L (n-2) may be 288 占 퐉. This numerical value is not limited to this example as shown in Equations (1) and (2).

The semiconductor device 100 according to the first embodiment determines the spacing of the recesses 2-3 of the third group with respect to the first spacing L1 so that the recesses 2-3 of the third group Spacing can be provided.

As shown in FIG. 3, in the semiconductor device in which the interval of the conventional recess group is set to the same, a current is concentrated in the recess region adjacent to the pad. On the other hand, it can be seen that the semiconductor device according to the first embodiment in which the intervals of the plurality of recess groups are controlled, the current is evenly distributed over the entire region of the recess groups.

As shown in FIG. 4, when the conventional current is increased from 350 mA to 1500 mA, it can be seen that the semiconductor device of the first embodiment can save an output of 0.4% compared with the conventional one.

The semiconductor device according to the first embodiment has an effect of improving the lifetime and reliability by improving the heat generating characteristic while preventing current concentration. Further, the heat dissipation cost due to the temperature drop can be reduced.

5 is a plan view showing a semiconductor device according to the second embodiment. Here, the case of the semiconductor device according to the second embodiment having one pad will be described. The configuration other than the spacing of the plurality of recesses of the semiconductor device according to the second embodiment is the same as that of the semiconductor device according to the first embodiment, and will be described with reference to FIG.

The semiconductor device according to the second embodiment includes the first conductivity type semiconductor layer 11, the second conductivity type semiconductor layer 13, the first conductivity type semiconductor layer 11, the second conductivity type semiconductor layer 13, And a plurality of recesses formed in the second conductivity type semiconductor layer (11) through the active layer (12) to a portion of the first semiconductor layer (11) A second electrode 81 disposed in the plurality of recesses and electrically connected to the second conductive type semiconductor layer 13; and a second electrode 81 electrically connected to the first conductive type semiconductor layer 11, And a pad (92) electrically connected to the second electrode (81), wherein the first group of recesses (2-1) of the plurality of recesses are connected to the pad (L1) adjacent to each other in a second direction (D2) perpendicular to the first direction (D1) and a first direction (D1) The recesses 2-2 of the second group are spaced apart from each other in the first direction D1 and the second direction D2 in the third direction D3 in the first group of recesses 2-1, (L1). Here, the configuration other than the interval of the plurality of recesses of the semiconductor device according to the second embodiment is the same as that of the semiconductor device according to the first embodiment, and thus will be omitted.

5, the pads 92 may be disposed adjacent to one side edge of the semiconductor device 200. As shown in FIG. The plurality of recesses (2) may comprise a plurality of groups of recesses. The recesses of a plurality of groups can be equally spaced and increased as they approach the pad.

The recesses 2-1 of the first group may include a plurality of recesses constituting the first interval L1. The recesses 2-1 of the first group may include a plurality of recesses disposed adjacent to the pad 92 in the first direction D1 and the second direction D2. The recesses 2-1 of the first group may be spaced apart from the pad 92 in the third direction D3.

The recesses 2-2 of the second group may be spaced apart from the recesses 2-1 of the first group in the third direction D3. The recesses 2-2 of the second group may be spaced apart from the recesses 2-1 of the first group by an interval smaller than the first spacing L1.

The recesses 2-21 of the second group are formed in the recesses 2-21 to 2-n of the second-first group adjacent to the recesses 2-1 of the first group, 2n. The recesses 2-2n of the second-n group may be the group recesses of the longest distance from the recesses 2-1 of the first group. The interval Ln between the recesses 2-2n of the second-n group and the recesses 2- (2n-1) of the second group of (n-1) May be formed at intervals of 5 to 1/7.

The semiconductor device according to the second embodiment can determine the spacing of the recesses arranged in the third direction D3 from the pad 92 with respect to the first spacing L1 so that the recesses of the group can be arranged appropriately do.

Since the semiconductor device according to the second embodiment is different from the semiconductor device according to the first embodiment in that the pads are formed in one, it is possible to effectively control the interval of the recesses arranged in the third direction so that the current is concentrated in the recesses around the pad .

FIG. 6 is a plan view showing a semiconductor device according to a third embodiment, and FIG. 7 is a cross-sectional view showing a semiconductor device cut along the line B-B in FIG. Here, in FIG. 7, only three recesses shown in FIG. 6 are displayed for convenience of explanation.

6 and 7, the semiconductor device according to the third embodiment includes a light emitting structure 10 including a first conductivity type semiconductor layer 11, an active layer 12, and a second conductivity type semiconductor layer 13, A second electrode 81 electrically connected to the second conductivity type semiconductor layer 13, a first electrode 33 electrically connected to the first conductivity type semiconductor layer 11, And a pad portion 92 electrically connected to the two electrodes 81. [ Except for the space between the recesses and the thickness of the current blocking layer, the structure of the semiconductor device according to the first embodiment is the same as that of the semiconductor device according to the first embodiment, and a description thereof will be omitted.

As shown in FIG. 6, the plurality of recesses may include a plurality of groups of recesses. The recesses of the plurality of groups can be arranged closer to each other as the distance from the pad portion 92 is increased.

The first group of recesses 2-1 may include a plurality of recesses formed between the first pad 92a and the second pad 92b. The first group of recesses 2-1 is formed by connecting the first pad 92a and the second pad 92b at a first gap L1 between the first pad 92a and the second pad 92b And may be spaced apart in the first direction D1.

The recesses 2-2 of the second group may be spaced apart from the recesses 2-1 of the first group in the second direction D2 by a second distance L2. The second direction D2 may be a direction perpendicular to the first direction D1 and the second direction D2 may be a direction away from the pad portion 92. [ The second spacing L2 may be greater than the first spacing L1. The recesses 2-2 of the second group may be formed in the same manner as the first interval D1, but are not limited thereto.

The recesses 2-3 of the third group may be spaced apart from the recesses 2-2 of the second group in the third direction L3 in the second direction D2. The recesses 2-3 of the third group are farther from the pad portions 92 than the recesses 2-2 of the second group. The third interval L3 may be formed to be smaller than the first interval L1.

The third group of recesses 2-3 may include a plurality of groups of recesses. The recesses 2-3 of the third group extend from the recesses 2-31 of the third group 1 to the recesses 2-2 of the second group adjacent to the recesses 2-2 of the second group, And a third-n group of recesses (2-3n) farthest from the third-n group. The spacing between the recesses 2-3n of the third group may be increased at equal intervals as the distance from the pad portion 92 is increased.

(2-3n) of the third-n group disposed at the farthest distance from the pad portion 92 of the third group of recesses 2-3 and the third (n-1) The spacing of the seths can be fixed to a certain distance. For example, the interval between the recesses of the third-n group (2-3n) and the adjacent third (n-1) groups is formed to be 1/5 to 1/7 of the first interval (L1) .

The current blocking layer 30 may be arranged to surround a plurality of recesses. The current blocking layer 30 includes a first group of current blocking layers 30A surrounding the first group of recesses 2-1 and a second group of second current blocking layers 30A surrounding the second group of recesses 2-2. And a third group of current blocking layers 30C and 30D surrounding the current blocking layer 30B of the third group and the recesses 2-3 of the third group. The thickness of the current blocking layer 30 may be formed to be equal to the thickness of the pad portion 92. The thickness of the current blocking layer 30 is defined as a distance between one side of the second conductivity type semiconductor layer 13 and the other side of the second conductivity type semiconductor layer 13 that does not overlap with the second conductivity type semiconductor layer 13 .

The thickness Tn of the current blocking layer 30n of the third-n group surrounding the recesses 2-3n of the third-n group is defined as 1/9 to 1/11 of the first interval L1 . It is possible to determine the thickness of the current blocking layer 3n of the third-n group disposed in the region farthest from the pad portion 92 from this. When the thickness of the current blocking layer 3n of the third-n group is 100%, the thickness of the current blocking layer of the third (n-1) -th group may be 93% to 95%. The thickness of the current blocking layer in the (3- (n-2)) group may be 86% to 90%.

The semiconductor device according to the third embodiment can control the thickness of the current blocking layer 30 to prevent current from concentrating in an adjacent recess region of the pad portion 92. [ In particular, the semiconductor device according to the third embodiment can maximize the coupling between electrons and holes by determining the thickness of the semiconductor device according to the distance between the recesses of the semiconductor device according to the first embodiment. This has the effect of maximizing the light efficiency.

8 is a cross-sectional view showing a semiconductor device package including the semiconductor device according to the embodiment.

The semiconductor device package 400 includes a package body portion 405, a third electrode layer 413 and a fourth electrode layer 414 disposed on the package body portion 405, And a molding member 430 surrounding the semiconductor devices 100, 200, and 300. The first electrode layer 413 and the fourth electrode layer 414 are electrically connected to each other. Here, the semiconductor device may include the semiconductor device according to the first embodiment to the semiconductor device according to the third embodiment.

The package body 305 may be formed of a silicon material, a synthetic resin material, or a metal material, and a sloped surface may be formed on a columnar surface of the semiconductor devices 100, 200, and 300.

The third electrode layer 413 and the fourth electrode layer 414 are electrically isolated from each other to provide power to the semiconductor devices 100, 200, and 300. The third electrode layer 413 and the fourth electrode layer 414 may function to increase light efficiency by reflecting the light generated from the semiconductor devices 100 and 200, And may serve to discharge heat to the outside.

The semiconductor devices 100, 200, 300 may be disposed on the package body 405, or may be disposed on the third electrode layer 413 or the fourth electrode layer 414.

The semiconductor devices 100, 200, and 300 may be electrically connected to the third electrode layer 413 and / or the fourth electrode layer 414 by a wire, flip chip, or die bonding method. In the embodiment, the semiconductor devices 100, 200, and 300 are electrically connected to the third electrode layer 413 and the fourth electrode layer 414 through wires, respectively, but the present invention is not limited thereto.

The molding member 430 may surround the semiconductor devices 100, 200, 300 to protect the semiconductor devices 100, 200, 300. In addition, the molding member 430 may include a phosphor 432 to change the wavelength of light emitted from the semiconductor devices 100, 200, and 300.

The above-described semiconductor element is constituted by a semiconductor element package and can be used as a light source of an illumination system, for example, an automobile headlamp or an automobile lamp including a rear lamp.

FIG. 9 is a perspective view showing an automobile headlamp including the semiconductor device according to the embodiment, and FIG. 10 is a sectional view showing the automobile headlamp in FIG. Herein, although a car head lamp is described as an example, it may be applied to a rear lamp of an automobile.

As shown in FIG. 9, the automotive head lamp basically includes a light housing (H) and a lighting unit (1000) for generating a surface light source. The light housing H accommodates the illumination unit 1000 and may be made of a light-transmitting material. The light housing H for a vehicle may include bends depending on the vehicle part to be mounted and the design.

As shown in Fig. 10, the illumination unit 1000 may have a structure in which the semiconductor device package 1300 according to the embodiment is mounted on the substrate 1100. Fig. The substrate 1100 may be a printed circuit board having a circuit pattern formed on one surface thereof. The substrate 1100 may be formed of a rigid or flexible material.

A light guide member 1400 may be disposed on the semiconductor device package 1300. The light guide member 1400 may be laminated with a structure for embedding the semiconductor element package 1300. The light guide member 1400 may be formed in close contact with the light guide member 1400 on the outer surface of the semiconductor device package 1300.

The light guide member 1400 may include a resin layer. The resin layer may be composed of a high heat-resistant ultraviolet curing resin including an oligomer. Urethane acrylate may be used as the ultraviolet ray hardening resin, but the ultraviolet ray hardening resin is not limited to the epoxy acrylate, but may be an epoxy acrylate, a polyester acrylate, a polyether acrylate, At least one of polybutadiene acrylate and silicone acrylate may be used.

Particularly, when Urethane Acrylate is used as an oligomer, it is possible to simultaneously realize different properties by using two types of Urethane Acrylate.

The resin layer may further comprise at least one of a monomer and a photo initiator. The resin layer may be made of a thermosetting resin having high heat resistance. Specifically, the resin layer may be made of a thermosetting resin including at least one of a polyester polyol resin, an acrylic polyol resin, and a hydrocarbon-based or / and ester-based solvent. Such a thermosetting resin may further include a thermosetting agent for improving the film strength.

The refractive index of the resin layer may be determined in a range of 1.4 to 1.8, but is not limited thereto.

A reflective member 1200 may be further included between the substrate 1100 and the light guide member 1400. The reflective member 1200 is formed on the upper surface of the substrate 1100 and has a structure in which the semiconductor device package 1300 is inserted. The reflective member 1200 of this embodiment is formed of a material having a high reflection efficiency, thereby reflecting the light emitted from the light emitting unit 130 to the upper portion to reduce light loss.

The reflective member 1200 may be in the form of a film. A reflective pattern may be formed on the surface of the reflective member 1200, and the reflective pattern may scatter and scatter the incident light to uniformly transmit light to the upper surface. The reflection pattern may be formed by printing on the surface of the reflective member 1200 using reflective ink including any one of TiO2, CaCo3, BaSo4, Al2O3, Silicon, and PS, but is not limited thereto.

When the semiconductor device package 1300 is embedded in the light guide member 1400, the structure is simplified. Also, since the semiconductor device package 1300 has a larger amount of light than the case where the semiconductor device package 1300 is directly emitted to the air due to the light guide member 1400, the light efficiency can be improved.

An optical member 1500 may be disposed on the light guide member 1400.

The optical member 1500 may use an inner lens type member including an optical pattern on its surface. The optical member 1500 can increase the light efficiency due to the increase of the transmittance of the lens itself and enable the design effect to be realized not only when the vehicle illumination is turned on but also when the vehicle illumination is turned on through the optical pattern 1500b.

The optical member 1500 and the light guide member 1400 may be spaced apart from each other by a predetermined distance. When the light emitted from the semiconductor device package 1300 is inductively diffused through the light guiding member 1400 and is emitted in the upward direction, light scattering due to the presence of the air layer of the spacing portion having a different refractive index from the light guiding member 1400, The effect can be enhanced, and the uniformity of light can be increased accordingly. As a result, uniformity of light emitted to the optical member 150 can be improved, and uniform light emission can be realized.

The optical member 1500 may have a structure in which a convex or concave optical pattern 1500b having directionality is implemented on the surface of the transparent lens member 1500a having a high light transmittance.

Further, the above-described semiconductor element is constituted by a semiconductor element package, and can be used as a light source of a video display device or a light source of an illumination device.

When used as a backlight unit of a video display device, it can be used as an edge type backlight unit or as a direct-type backlight unit. When used as a light source of a lighting device, it can be used as a regulator or a bulb type. It is possible.

The semiconductor device includes a laser diode in addition to the light emitting diode described above.

The laser diode may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure, similarly to the semiconductor device. Then, electro-luminescence (electroluminescence) phenomenon in which light is emitted when an electric current is applied after bonding the p-type first conductivity type semiconductor and the n-type second conductivity type semiconductor is used, And phase. That is, the laser diode can emit light having one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and a constructive interference phenomenon. It can be used for optical communication, medical equipment and semiconductor processing equipment.

As the light receiving element, a photodetector, which is a kind of transducer that detects light and converts the intensity of the light into an electric signal, is exemplified. As such a photodetector, a photodiode (e.g., a PD with a peak wavelength in a visible blind spectral region or a true blind spectral region), a photodiode (e.g., a photodiode such as a photodiode (silicon, selenium), a photoconductive element (cadmium sulfide, cadmium selenide) , Photomultiplier tube, phototube (vacuum, gas-filled), IR (Infra-Red) detector, and the like.

In addition, a semiconductor device such as a photodetector may be fabricated using a direct bandgap semiconductor, which is generally excellent in photo-conversion efficiency. Alternatively, the photodetector has a variety of structures, and the most general structure includes a pinned photodetector using a pn junction, a Schottky photodetector using a Schottky junction, and a metal-semiconductor metal (MSM) photodetector have.

The photodiode, like the light emitting device, may include the first conductivity type semiconductor layer having the structure described above, the active layer, and the second conductivity type semiconductor layer, and may have a pn junction or a pin structure. The photodiode operates by applying reverse bias or zero bias. When light is incident on the photodiode, electrons and holes are generated and a current flows. At this time, the magnitude of the current may be approximately proportional to the intensity of the light incident on the photodiode.

A photovoltaic cell or a solar cell is a type of photodiode that can convert light into current. The solar cell, like the light emitting device, may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier of an electronic circuit through a rectifying characteristic of a general diode using a p-n junction, and can be applied to an oscillation circuit or the like by being applied to a microwave circuit.

In addition, the above-described semiconductor element is not necessarily implemented as a semiconductor, and may further include a metal material as the case may be. For example, a semiconductor device such as a light receiving element may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, The present invention may be embodied in other forms without departing from the spirit or essential characteristics of the inventive concept, and it is to be understood that the invention is not limited to the disclosed embodiments, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

11: first conductivity type semiconductor layer 12: active layer
13: second conductivity type semiconductor layer 30: current blocking layer
33: first electrode 81: second electrode
92: pad portion 95: protective layer

Claims (12)

A first conductive semiconductor layer, a first conductive semiconductor layer, an active layer disposed between the first semiconductor layer and the second semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer, A light emitting structure including a plurality of recesses formed to a portion of the layer;
A first electrode disposed inside the plurality of recesses and electrically connected to the first conductive semiconductor layer;
A second electrode electrically connected to the second conductive semiconductor layer; And
And a pad portion including a first pad and a second pad electrically connected to the second electrode,
Wherein a recess of a first group of the plurality of recesses is spaced apart in a first direction connecting the first pad and the second pad at a first interval between the first pad and the second pad,
Wherein the recess of the second group of the plurality of recesses is spaced apart from the recess of the first group by a second interval larger than the first interval in a second direction perpendicular to the first direction, And,
And recesses of the third group of the plurality of recesses are arranged in the first direction at a third interval smaller than the recesses of the first group in the second direction at the recesses of the second group. The method according to claim 1,
Wherein the recess of the third group includes a third-n group which is the farthest distance from the recess of the third-first group adjacent to the recess of the third group and the recess of the second group adjacent to the recess of the second group, And the spacing between the recesses of the second group and the recesses of the third-n group increases at equal intervals. 3. The method of claim 2,
And the interval between the recesses of the third-n group and the recess of the third (n-1) -th group is disposed at an interval of 1/5 to 1/7 of the first interval. The method according to claim 1,
And the second spacing is 1.25 to 1.35 times the first spacing. The method according to claim 1,
And the second interval is determined by the following equation.

(Where L is the first interval) 3. The method of claim 2,
And a current blocking layer surrounding the plurality of recesses. The method according to claim 6,
Wherein the thickness of the current blocking layer is thicker toward the pad portion. 8. The method of claim 7,
Wherein a thickness of the current blocking layer located farthest from the pad portion includes 1/9 to 1/11 of the first spacing. A first conductive semiconductor layer, a first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, A light emitting structure including a plurality of recesses formed up to a part of the one conductivity type semiconductor layer;
A first electrode disposed inside the plurality of recesses and electrically connected to the first semiconductor layer;
A second electrode electrically connected to the second semiconductor layer; And
And a pad electrically connected to the second electrode,
The recess of the first group of the plurality of recesses being adjacent to the pad and the first direction in a second direction perpendicular to the first direction,
And recesses of the second group of the plurality of recesses are arranged at intervals smaller than the first interval in the third direction between the first direction and the second direction in the recesses of the first group. 10. The method of claim 9,
Wherein the second group of recesses comprises a second-n group that is the farthest distance from the recess of the second group of 1 to the recess of the first group or the recess of the first group adjacent to the recess of the first group, Wherein an interval between the recesses of the second group increases at equal intervals. 11. The method of claim 10,
And the intervals between the recesses of the second-n group and the recesses of the second 2- (n-1) -th group are arranged at intervals of 1/5 to 1/7 of the first interval. 12. A semiconductor package comprising a semiconductor element according to any one of claims 1 to 11.

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