KR20180009266A - Semiconductor device and light emitting device package having thereof - Google Patents

Abstract

The present invention relates to a semiconductor device and a light emitting device package having the same. According to an embodiment of the present invention, the semiconductor device can comprise: a nitride-based first semiconductor layer having a first conductive dopant; a pit generation layer arranged on the first semiconductor layer and including a V-pit; a nitride-based active layer arranged on the pit generation layer and including the V-pit; an electron blocking layer having a band gap higher than that of the active layer on the active layer; and a second conductive semiconductor layer including a compound semiconductor of the group 1 to group 7 copper blends arranged on the electron blocking layer. According to an embodiment, it is possible to improve the hole injection efficiency and the light extraction efficiency, to form a copper blend compound semiconductor layer on a nitride-based semiconductor layer, and to enhance the reliability of a light emitting device.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a semiconductor device and a light emitting device package having the same,

Embodiments relate to semiconductor devices.

An embodiment relates to a light emitting device package.

An embodiment relates to a lighting device.

Semiconductor devices including compounds such as GaN and AlGaN have many merits such as wide and easy bandgap energy, and can be used variously as light emitting devices, light receiving devices, and various diodes.

Particularly, a light emitting device such as a light emitting diode or a laser diode using a semiconductor material of Group 3-5 or 2-6 group semiconductors can be applied to various devices such as a red, Blue, and ultraviolet rays. By using fluorescent materials or combining colors, it is possible to realize a white light beam with high efficiency. Also, compared to conventional light sources such as fluorescent lamps and incandescent lamps, low power consumption, , Safety, and environmental friendliness.

In addition, when a light-receiving element such as a photodetector or a solar cell is manufactured using a semiconductor material of Group 3-5 or Group 2-6 compound semiconductor, development of a device material absorbs light of various wavelength regions to generate a photocurrent , It is possible to use light in various wavelength ranges from the gamma ray to the radio wave region. It also has advantages of fast response speed, safety, environmental friendliness and easy control of device materials, so it can be easily used for power control or microwave circuit or communication module.

Accordingly, the semiconductor device can be replaced with a transmission module of an optical communication means, a light emitting diode backlight replacing a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, White light emitting diodes (LEDs), automotive headlights, traffic lights, and gas and fire sensors. In addition, semiconductor devices can be applied to high frequency application circuits, other power control devices, and communication modules.

Embodiments can provide a semiconductor device capable of improving carrier injection efficiency and a light emitting device package having the same.

Embodiments can provide a semiconductor device capable of increasing hole injection efficiency and improving current spreading, and a light emitting device package having the semiconductor device.

Embodiments can provide a semiconductor device capable of reducing an operating voltage and a light emitting device package having the semiconductor device.

Embodiments can provide a semiconductor device capable of improving light extraction efficiency and a light emitting device package having the semiconductor device.

Embodiments can provide a semiconductor device capable of improving reliability and a light emitting device package having the semiconductor device.

The semiconductor device of the embodiment includes: a nitride-based first semiconductor layer having a first conductivity type dopant; A pit generation layer disposed on the first semiconductor layer and including V pits; A nitride based active layer disposed on the pit generation layer and including the V pits; An electron blocking layer having a band gap higher than that of the active layer on the active layer; And a second conductive type semiconductor layer including a compound semiconductor of Group 1-Group 7 of copper blend disposed on the electron blocking layer. The embodiment improves the hole injection efficiency, improves the light extraction efficiency, as well as forms the copper-based compound semiconductor layer on the nitride-based semiconductor layer and improves the reliability of the light-emitting device.

The light emitting material package of the embodiment includes: a body having a cavity; First and second lead frames disposed in the body; And a nitride based first semiconductor layer having a first conductive type dopant, a pit generation layer disposed on the first semiconductor layer and including V pits, and a nitride formed on the pit generation layer, And a second conductive type semiconductor layer including a compound semiconductor of a copper blend group 1 group-7 group disposed on the electron blocking layer and having a bandgap higher than that of the active layer on the active layer, And a light emitting element including a semiconductor layer. The embodiment improves the hole injection efficiency, improves the light extraction efficiency, as well as forms the copper-based compound semiconductor layer on the nitride-based semiconductor layer and improves the reliability of the light-emitting device.

The embodiment has an advantage that the semiconductor layer for hole injection includes a compound semiconductor of Group 1-Group 7 of copper blend and has a higher doping concentration than that of the nitride-based semiconductor layer.

The embodiment includes a nitride-based active layer having a V-pit, an electron blocking layer filling the V-pits, and a resistance relaxation layer having a superlattice structure, and includes a hole injection semiconductor layer having a compound semiconductor of Group 1B- The resistance between the semiconductor layers can be reduced, and the hole injection efficiency can be improved.

The embodiment can dispose the ohmic electrode layer such as ITO by improving the current spreading by the high hole concentration by disposing the copper-clad compound semiconductor layer on the nitride-based active layer. Therefore, the embodiment can improve light extraction efficiency by removing light absorbed in the ohmic electrode layer.

The embodiment can improve the reliability of the light emitting device including the above configurations.

A superlattice structure including a compound semiconductor of group 1-group-7 of the copper blend is included under the second conductive semiconductor layer for the hole injection, thereby improving the current spreading.

1 is a view showing a semiconductor device according to an embodiment.
2 is an energy band diagram of a semiconductor device according to an embodiment.
3 is a view showing a semiconductor device according to another embodiment.
4 is an energy band diagram of a semiconductor device according to another embodiment.
5 is a diagram showing a horizontal type light emitting device including an electrode.
6 is a view showing a vertical type light emitting device including an electrode.
7 is a view showing a light emitting device package having the light emitting elements of FIGS. 5 and 6. FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG.

In the description of the embodiment according to the present invention, in the case of being described as being formed "on or under" of each element, the upper (upper) or lower (lower) or under are all such that two elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The semiconductor device may include various electronic devices such as a light emitting device and a light receiving device. The light emitting device and the light receiving device may include the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer.

The semiconductor device according to this embodiment may be a light emitting device.

The light emitting device emits light by recombination of electrons and holes, and the wavelength of the light is determined by the energy band gap inherent to the material. Thus, the light emitted may vary depending on the composition of the material.

FIG. 1 is a view showing a semiconductor device according to an embodiment, and FIG. 2 is a diagram showing an energy band diagram of an active layer and an electron blocking structure layer according to an embodiment.

As shown in Figs. 1 and 2, the semiconductor device of the embodiment will be described as an example of a light emitting element.

The light emitting device of the embodiment can improve the carrier injection efficiency. For this, the light emitting device according to the embodiment may include a second conductive type semiconductor layer 80 including a compound semiconductor of a copper blend group 1 group-7 type on the active layer 50.

The light emitting device of the embodiment may include a first conductivity type semiconductor layer 40, an active layer 50, an electron blocking layer 60, a resistance reducing layer 70, and a second conductivity type semiconductor layer 80.

The light emitting device may include at least one of a substrate 20, a buffer layer 30, and a substrate 20 under the first conductive semiconductor layer 40.

The light emitting device may include both the buffer layer 30 and the substrate 20 under the first conductive semiconductor layer 40.

In the light emitting device, the resistance reducing layer 70 may be omitted, but the present invention is not limited thereto.

The substrate 20 may be, for example, a translucent, conductive substrate or an insulating substrate. For example, the substrate 21 is a sapphire (Al ₂ O _3), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ O ₃ Or the like. A plurality of protrusions (not shown) may be formed on the top surface and / or bottom surface of the substrate 20, and each of the plurality of protrusions may include at least one of a hemispherical shape, a polygonal shape, and an elliptical shape, Or in the form of a matrix. The protrusions can improve the light extraction efficiency.

A plurality of compound semiconductor layers may be grown on the substrate 20. The plurality of compound semiconductor layers may be grown using an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD) A dual-type thermal evaporator, sputtering, metal organic chemical vapor deposition (MOCVD), or the like. However, the present invention is not limited thereto.

The buffer layer 30 may be disposed between the substrate 20 and the first conductive semiconductor layer 40. The buffer layer 30 may be formed of at least one layer using Group III-V or Group V-VI compound semiconductors. The buffer layer 30 is for example a semiconductor having a composition formula of _{In x Al y Ga 1 -x- y} N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x + y≤≤1) Material. The buffer layer 31 may include at least one of materials such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO.

The buffer layer 30 may be formed in a super lattice structure by alternately arranging different semiconductor layers. The buffer layer 30 may be disposed to mitigate the difference in lattice constant between the substrate 20 and the nitride-based semiconductor layer, and may be defined as a defect control layer. The lattice constant of the buffer layer 30 may have a value between lattice constants between the substrate 20 and the nitride-based semiconductor layer. The buffer layer 30 may not be formed, but the present invention is not limited thereto.

The first conductive semiconductor layer 40 may be disposed between the substrate 20 and the active layer 50. The first conductive semiconductor layer 40 may be formed of at least one of Group III-V or Group II-VI compound semiconductors doped with a first conductivity type dopant. The first conductive semiconductor layer 40 may include a first semiconductor layer 41 and a pit generation layer 43.

The pit generation layer 43 may include a potential control function. The piece generation layer 43 may include V-shaped (V) V shaped sections. The pit generation layer 43 may be disposed on the first semiconductor layer 41. The pit generation layer 43 may be disposed between the active layer 50 and the first semiconductor layer 41. The pit generation layer 43 has a composition formula of In _x Al _y Ga _1-xy N (0? _{X? 1, 0? Y? 1} , 0? X + y? May be formed of a semiconductor material. The pit generation layer 43 may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP. The pit generation layer 43 of the embodiment may be a nitride semiconductor including an n-type dopant such as Si, Ge, Sn, Se, or Te grown at a lower temperature than the first semiconductor layer 41.

The thickness of the pit generation layer 43 may be 20 nm or more. For example, the thickness of the pit generation layer 43 may be 20 nm to 500 nm. When the thickness of the pit generation layer 43 is less than 20 nm, the V-pits V are not formed due to the compressive stress, and when the thickness of the pit generation layer 43 is more than 500 nm, And the light emitting area may be decreased, so that the light intensity may be lowered.

The pit generation layer 43 may have an n-type doping concentration of 3E17 to 8E18. When the doping concentration of the pit generation layer 43 is less than 3E17, the resistance may increase and the operating voltage may rise. When the doping concentration of the pit generation layer 43 exceeds 8E18, the crystallinity may be lowered.

The first semiconductor layer 41 may be disposed under the pit generation layer 43. Wherein the first semiconductor layer 41 is, for _{example, In x Al y Ga 1 -x-} y N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x + y≤≤1) And may be formed of a semiconductor material having a composition formula. The first semiconductor layer 41 may include at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP. The first semiconductor layer 41 of the embodiment may be an n-type semiconductor layer doped with an n-type dopant such as Si, Ge, Sn, Se, or Te.

The first semiconductor layer 41 may be a single layer or a multi-layered structure. The first semiconductor layer 41 may have a superlattice structure in which at least two different layers are alternately arranged. The first semiconductor layer 41 may be an electrode contact layer in which electrodes are in contact with each other.

Although not shown in the figure, a superlattice semiconductor layer may be further formed between the first conductive semiconductor layer 40 and the active layer 50. The semiconductor layer of the superlattice structure may include a current spreading function and a stress relaxation function.

The active layer 50 may be formed of at least one of a single well, a single quantum well, a multi-well, a multi quantum well (MQW), a quantum-wire structure, or a quantum dot structure .

The active layer 50 may be disposed on the pit generation layer 43. The active layer 50 may extend the V-pit V generated from the pit generation layer 43. A portion of the pit generating layer 43 may be exposed by the V pits V in the active layer 50. The embodiment discloses a structure in which the V-pits (V) pass through the active layer 50, but the present invention is not limited thereto.

The active layer 50 may be formed by combining electrons (or holes) injected through the first conductive type semiconductor layer 40 and holes (or electrons) injected through the second conductive type semiconductor layer 80, And is a layer which emits light due to a band gap difference of an energy band according to a material of the active layer 50. [ The active layer 50 may emit at least one peak wavelength of ultraviolet light, blue light, green light, and red light.

The active layer 50 may be formed of a compound semiconductor. The active layer 50 may be formed of at least one of Group 3-Group-5 or Group-6-Group compound semiconductors. When the active layer 50 is implemented as a multi-well structure, the active layer 50 may include a plurality of alternately arranged well layers 53 and a plurality of barrier layers 55.

The plurality of the well layer 53 is, for _{example, In x Al y Ga 1 -x-} y N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x + y≤≤1) Or a semiconductor material having a composition formula. The composition formula of the barrier layer 55 is, for _{example, In x Al y Ga 1 -x-} y N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x + y≤≤1) Or the like.

InGaN / AlGaN, InGaN / AlGaN, InGaN / InGaN, AlGaAs / GaAs, InGaAs / GaAs, InGaP / GaP, AlGaN / AlGaN, / InGaP, and InP / GaAs.

The well layer 53 of the active layer 50 according to the embodiment may be formed of, for example, InGaN, and the barrier layer 55 may be formed of, for example, a GaN-based semiconductor. The indium composition of the well layer (53) is higher than the indium composition of the barrier layer (55). The barrier layer 55 may have no indium composition and is not limited thereto. The barrier layer 55 may have a first band gap G1 that is wider than the band gap of the well layer 53.

The barrier layer 55 may have a thickness greater than the thickness of the well layer 53. If the thickness of the well layer 53 is thinner than the above range, the constraining efficiency of the carrier is lowered, and if it is thicker than the above range, the carrier is excessively confined. When the thickness of the barrier layer 55 is thinner than the above range, the electron blocking efficiency is lowered. If the thickness is larger than the above range, electrons are excessively blocked. Each carrier can be effectively restrained to the well layer 53 according to the thickness of the barrier layer 55, the wavelength of the light, and the quantum well structure.

At least one of the plurality of barrier layers 55 may include a dopant, and may include at least one of n-type and p-type dopants. The barrier layer 55 may be an n-type semiconductor layer when an n-type dopant is added. When the barrier layer 55 is an n-type semiconductor layer, injection efficiency of electrons injected into the active layer 50 can be increased.

The active layer 50 includes a last barrier layer 55L contacting the electron blocking layer 60 and the last barrier layer 55L may be the same thickness or wider thickness as the other barrier layer 55, It is not limited thereto.

The electron blocking layer 60 may be disposed on the active layer 50. The electron blocking layer 60 may be disposed on the V-pit (V). The upper surface of the electron blocking layer 60 may be flat. Therefore, the embodiment can improve the crystallinity of the surface due to the P-type dopant and improve the electrical characteristics by improving the diffusion of the P-type dopant into the active layer 50. [ In addition, the electron blocking layer 60 of the embodiment is formed on the active layer 50 having the V-pits (V), and the second conductive semiconductor layer 80 having the compound semiconductor of Group 1-Group- ) To block the penetration of atoms such as Cu.

The electron blocking layer 60 having a composition formula of _{In x Al y Ga 1 -x- y} N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x + y≤≤1) May be formed of a semiconductor material. The electron blocking layer 60 may include at least one of GaN, AlGaN, InGaN, InAlGaN, and AlInN, for example. The thickness of the electron blocking layer 60 in the embodiment may be 3 nm or more. Here, the thickness of the electron blocking layer 60 may be defined as the upper surface of the electron blocking layer 60 from the flat upper surface of the active layer 50. For example, the thickness of the electron blocking layer 60 may be 3 nm to 30 nm.

When the thickness of the electron blocking layer 60 is less than 3 nm, the V-pits V may not be completely filled, thereby improving the crystallinity and preventing the diffusion of the P-type dopant and the electron blocking function. When the thickness of the electron blocking layer 60 is more than 30 nm, the resistance of the second conductive semiconductor layer 80 disposed thereafter may be increased when the carrier is moved. For example, the hole injection efficiency of the second conductivity type semiconductor layer 80 may be lowered because it causes resistance during hole injection.

The electron blocking layer 60 may have a second band gap G2 that is wider than the first band gap G1 of the barrier layer 55 of the active layer 50. [ For example, the second band gap G2 may be changed according to the composition of the electron blocking layer 60. [ For example, in the case of the electron blocking layer 60 including AlGaN, the second band gap G2 may be controlled by changing the Al composition ratio. For example, the second band gap G2 may be wider as the Al composition is higher. Also, as the second band gap G2 is wider, the electron blocking effect can be improved.

The resistance relaxation layer 70 may be disposed between the electron blocking layer 60 and the second conductivity type semiconductor layer 80. The resistance relaxation layer 70 may reduce the interface resistance at the interface between the electron blocking layer 60 and the second conductivity type semiconductor layer 80. The resistance relaxation layer 70 can improve current spreading between the electron blocking layer 60 and the second conductivity type semiconductor layer 80. The resistance relaxation layer 70 shields electrons from the active layer 50 to the second conductivity type semiconductor layer 80 at the interface between the electron blocking layer 60 and the second conductivity type semiconductor layer 80 Function.

The resistance reducing layer 70 may be disposed in a single layer or in multiple layers. The resistance relaxation layer 70 may include a second conductivity type dopant. For example, the resistance relaxation layer 70 may be a p-type semiconductor layer having a p-type dopant such as a second conductivity type dopant such as Mg, Zn, Ca, Sr, or Ba. The resistance relaxation layer 70 may include at least one of GaN, AlGaN, and InGaN including a p-type dopant. The resistance relaxation layer 70 may be formed in a superlattice structure in which at least two different layers are alternately arranged. For example, the resistance-mitigating layer 70 may include p-AlGaN 71 and GaN 73 alternating two or more pairs. The thickness of the resistance reducing layer 70 may be 1 nm or more. For example, the thickness of the resistance relaxation layer 70 may be 1 nm to 30 nm.

When the thickness of the resistance relaxation layer 70 is less than 1 nm, the leakage current blocking function may be deteriorated. When the thickness of the resistance relaxation layer 70 is more than 30 nm, the hole injection efficiency may be lowered.

The p-AlGaN 71 may have a third band gap G3 that is wider than the second band gap G2 of the electron blocking layer 60. [ For example, the third band gap G3 can be controlled by changing the Al composition ratio of the p-AlGaN 71. [ For example, the third band gap G3 can be wider as the Al composition is higher. Further, as the third band gap G3 is wider, the electron blocking effect can be improved.

The second conductivity type semiconductor layer 80 may be disposed on the resistance reduction layer 70. The second conductive semiconductor layer 80 may include a copper-based compound semiconductor. The second conductive semiconductor layer 71 may include at least one of CuCl, CuBr, and CuI. The second conductive semiconductor layer 71 may be formed of at least one layer of a compound semiconductor of Group 1-Group 7 of copper blends such as CuCl, CuBr, and CuI . The second conductive semiconductor layer 80 may be a p-type semiconductor layer having a p-type dopant such as Mg, Zn, Ca, Sr, Ba, or the like. The second conductive semiconductor layer 80 of the embodiment will be described as an example of CuCl including a p-type dopant.

The thickness of the second conductive semiconductor layer 80 may be 20 nm or more. For example, the thickness of the second conductive semiconductor layer 80 may be 20 nm to 200 nm.

If the thickness of the second conductive semiconductor layer 80 is less than 20 nm, the resistance in the horizontal direction may increase and the current spreading function may deteriorate. If the thickness of the second conductive semiconductor layer 80 is 200 Nm, the light extraction efficiency may be lowered by absorbing a part of light in the second conductive semiconductor layer 80 itself.

The second conductive semiconductor layer 80 may have a fourth band gap G4 that is narrower than the first to third band gaps G1 to G3. For example, the fourth band gap G4 may be 3.3 eV for CuCl, 2.91 eV for CuBr, and 2.95 eV for CuI.

The second conductive semiconductor layer 80 has a doping concentration higher than that of the nitride-based semiconductor layer.

The embodiment is characterized in that the pit generation layer 43 having the electron blocking layer 60 and the resistance relaxation layer 70 and the V pits V and the active layer 50 form the second conductive semiconductor layer 80 and the nitride semiconductor layer And the hole injection efficiency can be improved.

In the embodiment, the second conductivity type semiconductor layer 80 of the copper-clad compound semiconductor is disposed on the nitride-based active layer 50 to improve the current spreading due to the high hole concentration, so that the ohmic electrode layer such as ITO can be removed have. Therefore, the embodiment can improve light extraction efficiency by removing light absorbed in the ohmic electrode layer.

The embodiment includes a pit generating layer 43 having a V pit V and an electron blocking layer 60 covering the active layer 50 and the V pits V and an electron blocking layer 60 formed on the electron blocking layer 60, The reliability of the light emitting device can be improved by improving penetration of metal atoms such as Cu in the second conductivity type semiconductor layer 80 including the two conductivity type semiconductor layer 80.

FIG. 3 is a view showing a semiconductor device according to another embodiment, and FIG. 4 is a diagram showing an energy band diagram of a semiconductor device according to another embodiment.

As shown in Figs. 3 and 4, the semiconductor device of another embodiment can employ the technical features of the light emitting device of the embodiment shown in Figs. 1 and 2, except for the second semiconductor layer 90. Fig.

The second semiconductor layer 90 may be disposed between the electron blocking layer 60 and the second conductivity type semiconductor layer 80. The second semiconductor layer 90 may be disposed between the resistance-lowering layer 70 and the second conductivity-type semiconductor layer 80. The second semiconductor layer 90 may be disposed under the second conductive semiconductor layer 80 to improve current spreading.

The second semiconductor layer 90 may include a copper-bend compound semiconductor. The second semiconductor layer 90 may be formed of a superlattice structure in which at least two different layers including compound semiconductors of Group 1-Group 7 such as CuCl, CuBr and CuI are alternately arranged. For example, the second semiconductor layer 90 may include CuCl 91 and CuBr 93 alternating two or more pairs. The second semiconductor layer 90 may be a p-type semiconductor layer having a p-type dopant such as Mg, Zn, Ca, Sr, Ba or the like.

The second conductive semiconductor layer 80 has a doping concentration higher than that of the nitride-based semiconductor layer.

In another embodiment, a second semiconductor layer 90 having a superlattice structure including a compound semiconductor of group 1-group-7 type is disposed under the second conductive semiconductor layer 80 to improve current spreading .

In another embodiment, the pit generation layer 43 having the electron blocking layer 60 and the resistance relaxation layer 70 and the V pits V and the active layer 50 are used to form the second conductive semiconductor layer 80 and the nitride semiconductor The resistance between the layers can be reduced, and the hole injection efficiency can be improved.

In another embodiment, the second conductivity type semiconductor layer 80 of the copper-clad compound semiconductor is disposed on the nitride-based active layer 50 to improve the current spreading by the high hole concentration, thereby removing the ohmic electrode layer such as ITO . Therefore, the embodiment can improve light extraction efficiency by removing light absorbed in the ohmic electrode layer.

The embodiment includes a pit generating layer 43 having a V pit V and an electron blocking layer 60 covering the active layer 50 and the V pits V and an electron blocking layer 60 formed on the electron blocking layer 60, The reliability of the light emitting device can be improved by improving penetration of metal atoms such as Cu in the second conductivity type semiconductor layer 80 including the two conductivity type semiconductor layer 80.

5 is a diagram showing a horizontal type light emitting device including an electrode.

As shown in Fig. 5, the light emitting element 101 has the same reference numerals as those shown in Figs. 1 and 2, and the technical features can be employed in Figs. 1 and 2. Further, the present invention is not limited to this, and the light emitting device 101 of Fig. 5 may employ the technical features of Figs. 3 and 4. Fig.

As shown in FIG. 5, the light emitting device 101 includes a first electrode 191 and a second electrode 195. A first electrode 191 may be electrically connected to the first conductive semiconductor layer 40 and a second electrode 195 may be electrically connected to the second conductive semiconductor layer 70. The first electrode 191 may be disposed on the first conductive semiconductor layer 40 and the second electrode 195 may be disposed on the second conductive semiconductor layer 70.

The first electrode 191 and the second electrode 195 may have a current diffusion pattern of an arm structure or a finger structure. The first electrode 191 and the second electrode 195 may be made of a metal having properties of an ohmic contact, an adhesive layer, and a bonding layer, and may not be transparent. The first electrode 193 and the second electrode 195 may be formed of a material selected from the group consisting of Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Alloys. The second electrode 195 and the second conductive semiconductor layer 70 may be in direct contact with each other.

The insulating layer 180 may be disposed on the second conductive semiconductor layer 70. The insulating layer 180 may be disposed on the upper surface of the second conductive semiconductor layer 70 and the side surfaces of the semiconductor layers and may be selectively in contact with the first and second electrodes 191 and 195. The insulating layer 180 includes an insulating material or an insulating resin formed of at least one of oxides, nitrides, fluorides, and sulfides having at least one of Al, Cr, Si, Ti, Zn, and Zr. The insulating layer 180 may be selectively formed, for example, of SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ . The insulating layer 180 may be formed as a single layer or a multilayer, but is not limited thereto.

6 is a view showing a vertical type light emitting device including an electrode.

As shown in Fig. 6, the light emitting element 102 has the same reference numerals as those shown in Figs. 1 and 2, and the technical features can be employed in Figs. 1 and 2. Further, the present invention is not limited to this, and the light emitting device 102 of Fig. 6 may employ the technical features of Figs. 3 and 4. Fig.

6, the light emitting device 102 includes a first electrode 291 on the first conductive semiconductor layer 40 and a second electrode 295 below the second conductive semiconductor layer 70.

The second electrode 295 is disposed under the second conductive semiconductor layer 70 and includes a reflective layer 297, a bonding layer 298, and a support member 299. The reflective layer 297 may be in direct contact with the second conductive type semiconductor layer 70 and may be formed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, And at least one layer made of a material selected from the group.

A bonding layer 298 is disposed under the reflective layer 297 and the bonding layer 298 may be used as a barrier metal or a bonding metal. The material may be, for example, Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, and Ta and an optional alloy.

A channel layer 283 and a current blocking layer 285 may be disposed between the second conductive semiconductor layer 70 and the second electrode 295, but the present invention is not limited thereto.

The channel layer 283 is formed along the bottom edge of the second conductive semiconductor layer 70, and may be formed in a ring shape, a loop shape, or a frame shape. The channel layer 283 comprises a transparent conductive material or an insulating material, such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, SiO _2, SiO _x, SiO _x N _y, Si ₃ N _4, Al ₂ O ₃ , and TiO ₂ . The inner side of the channel layer 283 is disposed below the second conductive semiconductor layer 70 and the outer side is disposed further outward than the side surface of the light emitting structure.

The current blocking layer 285 may be disposed between the second conductive semiconductor layer 70 and the reflective layer 297. The current blocking layer 285 includes an insulating material such as SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ As shown in FIG. As another example, the current blocking layer 285 may also be formed of a metal for Schottky contact.

The current blocking layer 285 is disposed to correspond to the first electrode 291 disposed on the semiconductor layer and the thickness direction of the semiconductor layer. The current blocking layer 285 may cut off current flowing in the shortest distance between the first and second electrodes 291 and 295 and diffuse the current through the other path. The current blocking layer 285 may be disposed in one or a plurality of regions, and at least a part of the current blocking layer 285 may overlap the first electrode 291 in the vertical direction.

A supporting member 299 is formed under the bonding layer 298 and the supporting member 299 may be formed of a conductive material such as copper-copper, gold-gold, nickel (Ni-nickel), molybdenum (Mo), copper-tungsten (Cu-W), and carrier wafers (e.g., Si, Ge, GaAs, ZnO, SiC and the like). As another example, the support member 299 may be embodied as a conductive sheet.

Here, a light extraction structure (not shown) such as a roughness may be formed on the upper surface of the first conductive semiconductor layer 40. An insulating layer (not shown) may be further disposed on the surface of the semiconductor layer, but the present invention is not limited thereto. Accordingly, the light emitting device 102 having the vertical type electrode structure having the first electrode 291 and the second electrode 295 below the semiconductor layer can be manufactured.

The light emitting devices 101 and 102 shown in FIGS. 5 and 6 are formed by arranging the second conductive semiconductor layer 80 including a compound semiconductor of group 1-group-7 in the copper blend and doping the semiconductor light- And has a high concentration.

In the light emitting devices 101 and 102 of the embodiment, a second semiconductor layer 90 of a superlattice structure including a compound semiconductor of group 1-group-7 type of copper blend is disposed under the second conductive semiconductor layer 80, thereby improving current spreading.

The light emitting devices 101 and 102 of the embodiment are formed by the pit generating layer 43 having the electron blocking layer 60 and the resistance reducing layer 70 and the V pits V and the active layer 50, The resistance between the nitride semiconductor layer 80 and the nitride semiconductor layer can be reduced, and the hole injection efficiency can be improved.

In the light emitting devices 101 and 102 of the embodiment, the second conductivity type semiconductor layer 80 of the copper-clad compound semiconductor is disposed on the nitride-based active layer 50 to improve the current spreading by the high hole concentration, The ohmic electrode layer can be removed. Therefore, the embodiment can improve light extraction efficiency by removing light absorbed in the ohmic electrode layer.

The light emitting devices 101 and 102 of the embodiment include a pit generating layer 43 having V pits V and an electron blocking layer 60 covering the active layer 50 and the V pits V, It is possible to improve the reliability of the light emitting device by improving penetration of metal atoms such as Cu in the active layer 50 of the second conductivity type semiconductor layer 80 including the second conductivity type semiconductor layer 80 of the copper- have.

7 is a view showing a light emitting device package having the light emitting elements of FIGS. 5 and 6. FIG.

7, the light emitting device package includes a body 311 having a cavity 315, a first lead frame 321 and a second lead frame 323 disposed in the body 311, a light emitting element 101, 102, wires 331, and a molding member 341.

The body 311 may include a conductive or insulating material. The body 311 may include at least one of a resin material such as polyphthalamide (PPA), a silicon (Si), a metal material, a photo sensitive glass (PSG), a sapphire (Al ₂ O ₃ ), a printed circuit board Can be formed. The body 311 may include a resin material such as polyphthalamide (PPA) or epoxy.

The body 311 has a cavity 315 having an open top and a side and a bottom. The cavity 315 may include a concave cup structure or a recessed structure from the upper surface of the body 311, but the present invention is not limited thereto.

The first lead frame 321 is disposed in a first region of a bottom region of the cavity 315 and the second lead frame 323 is disposed in a second region of a bottom region of the cavity 315. The first lead frame 321 and the second lead frame 323 may be spaced apart from each other in the cavity 315.

The first and second lead frames 321 and 323 may be formed of a metal material such as titanium (Ti), copper (Cu), nickel (Ni), gold (Au), chromium (Cr), tantalum ), Platinum (Pt), tin (Sn), silver (Ag), and phosphorus (P) and may be formed of a single metal layer or a multilayer metal layer.

The light emitting device 101 may be disposed on at least one of the first and second lead frames 321 and 223 and may be disposed on the first lead frame 321 and the first and second lead frames 321 and 223, And is connected to the second lead frames 321 and 223.

The light emitting devices 101 and 102 can selectively emit light in a visible light band to a range of an ultraviolet band and can be selected from a red LED chip, a blue LED chip, a green LED chip, and a yellow green LED chip, for example. have. The light emitting chips 101 and 102 may include compound semiconductor light emitting devices of group III to V elements. The light emitting devices 101 and 102 may employ the technical features of the light emitting device of FIGS.

A molding member 341 is disposed in the cavity 315 of the body 311 and the molding member 341 includes a light transmitting resin layer such as silicon or epoxy and may be formed as a single layer or a multilayer. The phosphor may include a phosphor for changing the wavelength of emitted light on the molding member 341 or the light emitting devices 101 and 102. The phosphor may partially excite light emitted from the light emitting devices 101 and 102, And emits light of a different wavelength. The phosphor may be selectively formed from YAG, TAG, Silicate, Nitride, and Oxy-nitride based materials. The phosphor may include at least one of a red phosphor, a yellow phosphor, and a green phosphor, but the present invention is not limited thereto. The surface of the molding member 341 may be formed in a flat shape, a concave shape, a convex shape, or the like, but is not limited thereto.

A lens may be further formed on the body 311. The lens may include a concave or convex lens structure and light distribution of light emitted by the light emitting devices 101 and 102 may be formed. Can be adjusted.

A protective element may be disposed in the light emitting device package. The protection device may be realized with a thyristor, a zener diode, or a TVS (Transient Voltage Suppression).

The light emitting device package of the embodiment includes a compound semiconductor of group 1-group-7 of the copper blend on the nitride-based semiconductor layer, thereby improving the luminous efficiency by high hole concentration and improving the current spreading, The ohmic electrode layer can be removed. Therefore, the embodiment can improve light extraction efficiency by removing light absorbed in the ohmic electrode layer.

The light emitting device package of the embodiment includes a pit generating layer having a V-pit, an active layer 50, an electron blocking layer filling the V-pit, and a second conductive type semiconductor layer of a copper- The penetration of metal atoms such as Cu in the semiconductor layer into the active layer can be improved and the reliability of the light emitting device can be improved.

The light emitting device package of the embodiment may further include a second semiconductor layer between the second conductivity type semiconductor layer and the active layer to improve current spreading.

The light emitting device package of the embodiment includes the electron blocking layer and the resistance relaxation layer to reduce the resistance and improve the hole injection efficiency.

The light emitting device package described above can be used as a light source of an illumination system. The light emitting device package can be used as a light source of a video display device or a lighting device, for example.

When used as a backlight unit of a video display device, it can be used as an edge type backlight unit or as a direct-type backlight unit. When used as a light source of a lighting device, it can be used as a regulator or a bulb type. It is possible.

The light emitting element includes a laser diode in addition to the light emitting diode described above.

The laser diode may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure, like the light emitting element. Then, electro-luminescence (electroluminescence) phenomenon in which light is emitted when an electric current is applied after bonding the p-type first conductivity type semiconductor and the n-type second conductivity type semiconductor is used, And phase. That is, the laser diode can emit light having one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and a constructive interference phenomenon. It can be used for optical communication, medical equipment and semiconductor processing equipment.

As the light receiving element, a photodetector, which is a kind of transducer that detects light and converts the intensity of the light into an electric signal, is exemplified. As such a photodetector, a photodiode (e.g., a PD with a peak wavelength in a visible blind spectral region or a true blind spectral region), a photodiode (e.g., a photodiode such as a photodiode (silicon, selenium), a photoconductive element (cadmium sulfide, cadmium selenide) , Photomultiplier tube, phototube (vacuum, gas-filled), IR (Infra-Red) detector, and the like.

In addition, a semiconductor device such as a photodetector may be fabricated using a direct bandgap semiconductor, which is generally excellent in photo-conversion efficiency. Alternatively, the photodetector has a variety of structures, and the most general structure includes a pinned photodetector using a pn junction, a Schottky photodetector using a Schottky junction, and a metal-semiconductor metal (MSM) photodetector have.

The photodiode, like the light emitting device, may include the first conductivity type semiconductor layer having the structure described above, the active layer, and the second conductivity type semiconductor layer, and may have a pn junction or a pin structure. The photodiode operates by applying reverse bias or zero bias. When light is incident on the photodiode, electrons and holes are generated and a current flows. At this time, the magnitude of the current may be approximately proportional to the intensity of the light incident on the photodiode.

A photovoltaic cell or a solar cell is a type of photodiode that can convert light into current. The solar cell, like the light emitting device, may include the first conductivity type semiconductor layer, the active layer and the second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier of an electronic circuit through a rectifying characteristic of a general diode using a p-n junction, and can be applied to an oscillation circuit or the like by being applied to a microwave circuit.

In addition, the above-described semiconductor element is not necessarily implemented as a semiconductor, and may further include a metal material as the case may be. For example, a semiconductor device such as a light receiving element may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, Or may be implemented using a doped semiconductor material or an intrinsic semiconductor material. While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

20: substrate
30: buffer layer
40: First conductive type semiconductor layer
41: first semiconductor layer
43: pit generation layer
50:
53: well layer
55: barrier layer
55L: Last barrier layer
60: electron blocking layer
70: Resistance relaxation layer
80: a second conductive semiconductor layer
90: second semiconductor layer

Claims (20)

A nitride based first semiconductor layer having a first conductive type dopant;
A pit generation layer disposed on the first semiconductor layer and including V pits;
A nitride based active layer disposed on the pit generation layer and including the V pits;
An electron blocking layer having a band gap higher than that of the active layer on the active layer; And
And a second conductive type semiconductor layer including a compound semiconductor of Group 1-Group 7 of copper blend disposed on the electron blocking layer.
The method according to claim 1,
Wherein the second conductive semiconductor layer includes at least one of CuCl, CuBr, and CuI, and includes a p-type dopant.
3. The method of claim 2,
And the second conductivity type semiconductor layer has a thickness of 20 nm to 200 nm.
The method of claim 3,
And the second conductivity type semiconductor layer has a band gap narrower than that of the active layer.
The method according to claim 1,
And a second electrode electrically connected to the first conductivity type semiconductor layer, the first electrode electrically connected to the first semiconductor layer, and the second electrode electrically connected to the second conductivity type semiconductor layer, .
The method according to claim 1,
Wherein the pit generating layer has a thickness of 20 nm to 500 nm.
The method according to claim 6,
Wherein the pit generating layer comprises an n-type doping concentration of 3E17 to 8E18.
The method according to claim 1,
The electron blocking layer filling the V-pits and having a flat upper surface, and having a band gap wider than the active layer.
9. The method of claim 8,
Wherein the thickness between the upper surface of the electron blocking layer and the flat upper surface of the active layer is 3 nm to 30 nm.
The method according to claim 1,
And a resistance relaxation layer disposed between the electron blocking layer and the second conductivity type semiconductor layer.
11. The method of claim 10,
Wherein the resistance-mitigating layer includes a superlattice structure in which at least two different layers are alternately arranged and includes at least one of GaN, AlGaN, and InGaN, and at least one layer includes a p-type dopant.
12. The method of claim 11,
Wherein the resistance reducing layer has a thickness of 1 nm to 30 nm.
13. The method of claim 12,
Wherein the resistance reducing layer has a band gap wider than the electron blocking layer.
13. The method of claim 12,
Further comprising a second semiconductor layer disposed between the resistance-lowering layer and the second conductivity-type semiconductor layer,
Wherein the second semiconductor layer comprises a compound semiconductor of Group 1-Group 7 of copper blend.
15. The method of claim 14,
Wherein the second semiconductor layer comprises a p-type dopant and the compound semiconductor of Group 1-Group 7 of different copper blend alternates at least two or more peaks.
A body having a cavity;
First and second lead frames disposed in the body; And
A nitride based first semiconductor layer having a first conductive type dopant, a pit generation layer disposed on the first semiconductor layer and including V pits, a nitride based semiconductor layer disposed on the pit generation layer and including the V pits A second conductivity type semiconductor layer including an active layer, an electron blocking layer having a bandgap higher than that of the active layer on the active layer, and a copper blend group 1-group-7 compound semiconductor disposed on the electron blocking layer, And a light emitting layer formed on the light emitting layer.
17. The method of claim 16,
Wherein the second conductivity type semiconductor layer includes at least one of CuCl, CuBr and CuI, and includes a p-type dopant, has a thickness of 20 nm to 200 nm, and has a bandgap narrower than that of the active layer.
17. The method of claim 16,
The pit generating layer has a thickness of 20 nm to 500 nm and includes an n-type doping concentration of 3E17 to 8E18. The pit generating layer has a flat upper surface filling the V-pits and has a bandgap wider than that of the active layer. Wherein a thickness between the upper surface of the active layer and the upper surface of the active layer is 3 nm to 30 nm.
17. The method of claim 16,
Further comprising a resistance relaxation layer disposed between the electron blocking layer and the second conductivity type semiconductor layer,
Wherein the resistance relaxation layer comprises a superlattice structure in which at least two different layers are alternately arranged and includes at least one of GaN, AlGaN, InGaN, at least one layer comprising a p-type dopant, Nm and a band gap wider than the electron blocking layer.
17. The method of claim 16,
Further comprising a second semiconductor layer disposed between the resistance-lowering layer and the second conductivity-type semiconductor layer,
Wherein the second semiconductor layer comprises a compound semiconductor of Group 1-Group 7 of the copper blend, and a superlattice structure comprising a p-type dopant and having at least two or more peaks of compound semiconductors of different copper blend Group 1-Group 7 Emitting device package.

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