KR20170036491A - Display device for improved brightness - Google Patents

Abstract

According to the present invention, the farther a gate line and/or a data line get from a signal source applied to a pixel, the thicker the gate line and/or a data line get wherein the gate line and/or the data line apply signals to the pixel so as to prevent a signal delay by resistance of lines and a kickback phenomenon of a thin film transistor. At this time, thicknesses of the gate line and the data line are discontinuously or continuously changed.

Description

DISPLAY DEVICE FOR IMPROVED BRIGHTNESS [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device capable of improving a structure of a gate line and / or a data line to prevent a decrease in luminance due to signal delay.

2. Description of the Related Art Recently, various portable electronic devices such as a mobile phone, a PDA, and a notebook computer have been developed. Accordingly, there is a growing need for a flat panel display device for a light and small size. As such flat panel display devices, various products such as a liquid crystal display, a plasma display panel, an organic light emitting display, and an electrophoretic display have been proposed.

Such a flat panel display device is applied not only to small electronic devices such as portable electronic devices but also to large-area electronic devices such as TVs. Particularly, in recent years, the above flat panel display device has been applied to a very large and high-resolution display device.

1 is a plan view showing a structure of a display device according to a conventional flat plate. At this time, various display devices can be applied to the flat panel display.

1, the display device 1 includes an image display portion 7 in which a plurality of pixels are arranged in a matrix form, a gate pad portion 18 connected to a gate line of the image display portion 7, And a data pad unit 19 connected to the line. The gate pad portion 18 and the data pad portion 19 are formed in the edge region of the first substrate 20 which is not overlapped with the second substrate 30, And the data pad unit 19 supplies the image information supplied from the data driver IC to the data line of the image display unit 17. [

A plurality of data lines to which an image signal is applied and a plurality of gate lines to which a scanning signal is applied are arranged on the thin film transistor array substrate of the image display unit 17, that is, the first substrate 20, A pixel electrode connected to the thin film transistor for driving the pixel, and a protective film formed on the entire surface to protect the pixel electrode and the thin film transistor.

Although not shown in the figure, the image display element 17 is provided with image implementing elements in each pixel. At this time, the image implementation element may be various implementation elements. For example, in the case of a liquid crystal display device, the image forming element is a liquid crystal layer and in the case of an organic EL display, an image forming element is an organic light emitting layer. Further, in the case of a plasma display device, the image forming element is a plasma layer and in the case of an electrophoretic display device is an electrophoretic layer.

In the case of the display device of the above structure, as the scan signal is applied along the plurality of gate lines, the thin film transistor as the switching element is turned on, and the image signal applied through the data line is applied to the pixel electrode arranged in the pixel. As an image signal is applied to the pixel electrode, an image implementing device, that is, a liquid crystal layer, an organic light emitting layer, a plasma layer, and an electrophoresis layer are driven to realize an image. In other words, the light transmittance of the liquid crystal layer changes due to the electric field generated by the image signal applied to the pixel electrode, so that the organic light emitting layer emits light by realizing an image or an image signal applied to the pixel electrode. Alternatively, the plasma layer emits light by the image signal applied to the pixel electrode, and the external light reflection of the electrophoretic layer is changed by the image signal applied to the pixel electrode, thereby realizing an image.

However, the display device having the above-described structure causes the following problems.

As described above, in the display device shown in FIG. 1, as a scan signal is applied along a gate line, a thin film transistor as a switching element is turned on and an image signal applied through a data line as the switching element is turned on is placed in a pixel So that the image implementing element is driven.

Therefore, when a signal delay occurs in the data line and / or the gate line, the same gradation can not be realized over the entire pixels of the display device. Particularly, as the large-area display device is recently introduced, the length of the data line and the gate line increases, and the signal delay in the data line and / or the gate line occurs more frequently, so that such a gradation defect occurs more frequently.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a display device capable of preventing a defect caused by a signal delay by adjusting the thickness of a gate line and / or a data line according to a position.

In the present invention, as the thickness of a gate line and / or a data line for applying a signal to a pixel increases from a signal source applied to the pixel, the resistance of the line and the signal delay due to the kickback phenomenon of the thin film transistor can be prevented . At this time, the thicknesses of the gate line and the data line may change discontinuously or continuously.

An image implementing element is disposed in a pixel, and the image implementing element may include an organic light emitting layer, a liquid crystal layer, an electrophoretic layer, and a plasma layer. The signal source includes a gate driver integrated circuit and a data driver integrated circuit, wherein the gate driver integrated circuit is disposed on one side or both sides of the gate line, and the data driver integrated circuit is disposed on one side or both sides of the data line.

Further, in the present invention, the cross-sectional area of the gate line and / or the data line varies depending on the degree of signal delay. At this time, the cross-sectional area of the gate line and the data line is away from the signal source. That is, the thickness and / or width of the trains and data lines increase as they are away from the signal source.

At this time, the cross-sectional area of the gate line and / or the data line may be changed continuously or discontinuously.

In the present invention, by setting the thickness of the gate line and / or the data line to be thicker from the signal source, the resistance of the metal layer and the signal delay due to the kickback phenomenon of the thin film transistor can be prevented. As a result, defects due to signal delay can be prevented.

In addition, according to the present invention, by controlling not only the thickness of the gate line and / or the data line but also the width, the cross-sectional area of the gate line and / or the data line is adjusted according to the signal delay, thereby achieving uniform gradation over the entire image display area.

1 is a plan view schematically showing a structure of a conventional display device.
2 is a plan view schematically showing a structure of a display device according to the present invention.
3 is a plan view specifically showing a structure of a display device according to the present invention.
Fig. 4 is a sectional view of Fig. 3; Fig.
Figures 5A and 5B are cross-sectional views of the gate line region of Figure 3;
6A and 6B are plan views showing a structure of a gate line of a display device according to the present invention, respectively.
7A to 7D are views each showing a cross-sectional area of the display device according to the position of a gate line of the display device according to the present invention.
8A to 8L are views showing a method of manufacturing a display device according to the present invention.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a view showing a display device according to the present invention. Although the present invention can be applied to various flat panel display devices, an organic light emitting display device will be described in the following description. However, the description of the display device having such a specific structure is for convenience of explanation, not for limiting the present invention. The present invention can be applied not only to organic electroluminescent display devices but also to flat panel display devices of all known structures such as a liquid crystal display device, a plasma display device, and an electrophoretic display device.

2, the display apparatus 101 according to the present invention includes an image display unit 107 in which a plurality of pixels are arranged in a matrix form, a gate pad unit (not shown) connected to a gate line of the image display unit 107 118 and a data pad portion 119 connected to the data line. The gate pad portion 118 and the data pad portion 119 are formed in an edge region of the first substrate 120 that is not overlapped with the second substrate 130. The gate pad portion 118 is formed in the gate driver integrated circuit And the data pad unit 119 supplies the image information supplied from the data driver IC to the data line of the image display unit 117. [

The data pad 119 is disposed on the upper edge of the first substrate 120 and the gate pad 118 is disposed on both sides of the first substrate 120 as shown in the figure. Since the gate pad 118 is disposed on both sides of the first substrate 120 and a scanning signal is applied from both end faces of the gate line of the image display section 117 from the gate driver integrated circuit mounted on the gate pad 118 , It is possible to prevent a signal delay.

However, the present invention may be applied to a structure in which the gate driver integrated circuit is disposed on both sides of the gate line as well as the structure in which the gate driver integrated circuit is disposed on one side of the first substrate 120, as described above. In addition, the data pad may be disposed on the upper and lower sides of the image display unit 107, that is, on both sides of the data line 103.

2 is an equivalent circuit diagram of one pixel, and the organic light emitting display according to the present invention will be described in detail with reference to this enlarged view.

As shown in the figure, power lines P are arranged in parallel with the data lines 103 in each pixel. In each pixel, a switching thin film transistor Ts, a driving thin film transistor Td, a capacitor C and an organic light emitting element E are provided. The gate electrode G1 of the switching thin film transistor Ts is connected to the gate line 102 and the source electrode S1 is connected to the data line 103. The drain electrode D1 is connected to the driving thin film transistor Td And the gate electrode G2. The source electrode S2 of the driving transistor Td is connected to the power line P and the drain electrode D2 of the driving transistor Td is connected to the light emitting element E.

In the organic light emitting display having such a configuration, when a scan signal is inputted through the gate line 102, a signal is applied to the gate electrode G1 of the switching thin film transistor Ts to drive the switching thin film transistor Ts. The data signal input through the data line 103 is input to the gate electrode G2 of the driving thin film transistor Td through the source electrode S1 and the drain electrode D1 as the switching thin film transistor Ts is driven. And the driving thin film transistor Td is driven.

At this time, a current flows through the power line P. As the driving thin film transistor Td is driven, the current of the power line P flows through the source electrode S2 and the drain electrode D2, . At this time, the current output through the driving thin film transistor Td varies in size depending on the voltage between the gate electrode G2 and the drain electrode D2.

The light emitting element E emits light as an electric current flows through the driving thin film transistor Td as an organic light emitting element to display an image. At this time, since the intensity of the light emitted varies according to the intensity of the applied current, the intensity of the light can be controlled by adjusting the intensity of the current.

FIG. 3 is a plan view showing an actual structure of an organic light emitting display according to the present invention, and the structure of the organic light emitting display according to the present embodiment will be described as follows.

3, the organic electroluminescent display device according to the present invention includes a switching element Ts and a driving element Td for each of a plurality of pixels defined in the first substrate 120, The switching element Ts or the driving element Td may be constituted by a combination of at least one thin film transistor. On the substrate 120, a gate line 102 and a data line 103 intersect with each other to define pixels.

The driving element Td includes a thin film transistor (TFT) including gate electrodes 111R, 111G and 111B, semiconductor layers 112R, 112G and 112B, source electrodes 114R, 114G and 114B and drain electrodes 115R, 115G and 115B. . The drain electrode of the switching element Ts is connected to the gate electrode of the driving element Td through a contact hole and the drain electrodes 114R, 114G and 114B of the driving element Td are connected to the pixel electrodes 121R , 121G, and 121B.

Although not shown in the drawing, an organic light emitting layer and a common electrode are sequentially formed on the pixel electrodes 121R, 121G, and 121B of the pixel, and an electric current is applied through the pixel electrodes 121R, 121G, and 121B, . ≪ / RTI >

FIG. 4 is a cross-sectional view of FIG. 3. Referring to FIG. 4, the structure of the organic light emitting display according to the present invention will be described in detail.

As shown in FIG. 4, the organic light emitting display according to the present embodiment includes an R pixel for outputting red light, a G pixel for outputting green light, and a B pixel for outputting blue light. Although not shown in the drawing, the organic light emitting display device of the present invention may include a W pixel for outputting white light. At this time, the W pixel outputs white light, thereby improving the overall luminance of the organic light emitting display.

A color filter layer is formed in each of the R, G, and B pixels to output white light output from the organic light emitting portion as light of a specific color. However, if W pixels are disposed, .

As shown in FIG. 4, a first substrate 120 made of a transparent material such as glass or plastic is divided into R, G, and B pixels, and a driving thin film transistor is formed in each of R, G, and B pixels.

The driving thin film transistor includes gate electrodes 111R, 11G and 11B formed on the R, G and B pixels on the first substrate 120 and a first substrate 120 on which the gate electrodes 111R, The semiconductor layers 112R, 112G and 112B formed on the gate insulating layer 122 and the source electrodes 114R and 112G formed on the semiconductor layers 112R, 112G and 112B, 114G, and 114B, and drain electrodes 115R, 115G, and 115B. Although not shown in the drawing, an etching stopper is formed on a part of the upper surface of the semiconductor layers 112R, 112G, and 112B so that the semiconductor substrate 110 is etched during the etching of the source electrodes 114R, 114G, and 114B and the drain electrodes 115R, 115G, The layers 112R, 112G, and 112B may be prevented from being etched.

The gate electrode (111R, 111G, 111B) are Cr, Mo, Ta, Cu, Ti, Al, or may be formed of a metal such as Al alloy, the gate insulating layer 122 is an insulating inorganic, such as SiO ₂ or SiNx A single layer made of a material or a double layer made of SiO ₂ and SiN x.

The semiconductor layer 112 is formed of amorphous silicon, crystalline silicon, or a transparent oxide semiconductor such as IGZO (Indium Gallium Zinc Oxide). The source electrodes 114R, 114G, and 114B and the drain electrodes 15R, 15G, and 15B may be formed of Cr, Mo, Ta, Cu, Ti, Al, or Al alloy.

A first insulating layer 124 is formed on the first substrate 120 on which the driving thin film transistor is formed. The first insulating layer 124 may be formed of an inorganic insulating material such as SiO _{2 to} a thickness of about 4500 ANGSTROM. An R-color filter layer 117R, a G-color filter layer 117G, and a B-color filter layer 117B are formed on the R, G, and B pixels of the first insulating layer 124, respectively.

A second insulating layer 126 is formed on the R-color filter layer 117R, the G color filter layer 117G, and the B color filter layer 117B. The second insulating layer 126 is an overcoat layer for planarizing the first substrate 120. An organic insulating material such as photo-acryl can be formed to a thickness of about 3 탆.

The pixel electrodes 121R, 121G, and 121B are formed on the R, G, and B pixels on the first insulating layer 126, respectively. At this time, contact holes 129 are formed in the first insulating layer 124 and the second insulating layer 126 stacked on the drain electrodes 115R, 115G, and 115B of the driving thin film transistors formed in the R, G, And the pixel electrodes 121R, 121G and 121B are formed in the contact holes 129 and are electrically connected to the drain electrodes 115R, 115G and 115B of the exposed driving thin film transistors.

The pixel electrodes 21R, 21G and 21B are made of a transparent metal oxide material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). At this time, the pixel electrodes 21R, 21G, and 21B may be formed to have a thickness of about 500 ANGSTROM for each R, G, and B pixels.

A bank layer (128) is formed in each pixel boundary region on the second insulating layer (126). The bank layer 128 is a kind of barrier rib for preventing each pixel from being mixed and outputting light of a specific color outputted from adjacent pixels. Since the bank layer 128 fills a part of the contact hole 129, the step is reduced. As a result, charge is concentrated on the step of forming the organic light emitting part 123, so that the lifetime of the organic light emitting part 123 Can be prevented from deteriorating.

An organic light emitting portion 123 made of an organic light emitting material is formed between the bank layers 128 on the pixel electrodes 21R, 21G, and 21B.

The organic light emitting part 123 includes a white organic light emitting layer that emits white light. The white organic light emitting layer may be formed by mixing a plurality of organic materials that emit red, green, and blue monochromatic light, or a plurality of light emitting layers that emit red, green, and blue monochromatic light, respectively. Although not shown in the drawing, the organic light emitting portion 123 includes an electron injection layer and an electron injection layer for injecting electrons and holes, respectively, as well as an organic light emitting layer, and an electron transport layer And a hole transport layer may be formed.

A common electrode 125 is formed on the entire surface of the first substrate 110 on the organic light emitting portion 123. The common electrode 125 is made of Ca, Ba, Mg, Al, Ag, or the like.

In the present invention, the common electrode 125 is a cathode of the organic light emitting portion 123, and the pixel electrodes 121R, 121G, and 121B are anodes, and the common electrode 125 and the pixel electrodes 121R, 121G, Electrons are injected from the common electrode 125 into the organic light emitting portion 123 and holes from the pixel electrodes 121R, 121G and 121B are injected into the organic light emitting portion 123, the exciton is generated. As the exciton is decayed, light corresponding to the energy difference between LUMO (Lowest Unoccupied Molecular Orbital) and HOMO (Highest Occupied Molecular Orbital) of the light emitting layer is generated. (Toward the substrate 120). At this time, red light, green light, and blue light are emitted from the R, G, and B light emitting layers included in the organic light emitting layer, respectively, and these lights are mixed to emit white light. The emitted white light passes through the R, G, and B-color filter layers 117R, 117G, and 117B, respectively, and outputs only light of a color corresponding to the pixel.

An adhesive layer 142 is formed on the common electrode 125 and a second substrate 130 is disposed on the adhesive layer 142. The second substrate 130 is bonded to the first substrate 130 by the adhesive layer 142, (Not shown).

As the adhesive, any material can be used as long as it has good adhesion and good heat resistance and water resistance. In the present invention, a thermosetting resin such as an epoxy compound, an acrylate compound or an acrylic rubber is used. At this time, the adhesive layer 142 is applied at a thickness of about 5-100 mu m and cured at a temperature of about 80-170 degrees. The adhesive layer 142 not only bonds the first substrate 120 and the second substrate 130, but also acts as an encapsulant for preventing moisture from penetrating into the organic light emitting display device. Therefore, although the term 42 is referred to as an adhesive in the detailed description of the present invention, this is for convenience only, and the adhesive layer may be referred to as an encapsulant.

The second substrate 130 is an encapsulation cap for encapsulating the adhesive layer 142. The encapsulation cap may be a PS (Polystyrene) film, a PE (polyethylene) film, a PEN (polyethylene naphthalate) Can be made of the same protective film. In addition, the second substrate 130 may be made of plastic or glass, and any material can be used as long as it can protect the components formed on the first substrate 120.

5A and 5B are cross-sectional views of the organic light emitting display according to an exemplary embodiment of the present invention. 5A is a cross-sectional view of the organic light emitting display device in which the gate driver integrated circuit is disposed on one side of the gate line, and FIG. 5B is a cross-sectional view of the organic light emitting display device in which the gate driver integrated circuit is disposed on both sides of the gate line. And shows the entire area of the image display section.

As shown in FIG. 5A, a gate line 102 is disposed on the first substrate 120, and a gate insulating layer 122 thereof is stacked. The gate lines 102 are simultaneously formed of the same metal as the gate electrodes 111R, 111G, and 111B of the thin film transistors. The thickness of the gate line 102 increases as the distance from one side end adjacent to the gate pad portion increases. That is, as the thickness of the gate line 102 adjacent to the gate pad portion becomes the thinnest and the farther, the thickness thereof increases.

In the conventional organic electroluminescent display device, the gate line is formed to have the same thickness throughout the other end portion at one side end, whereas the thickness increases as the gate line moves away from one side end adjacent to the gate pad in the present invention. Is as follows.

In general, in an organic light emitting display, a thin film transistor as a switching element is turned on as a scanning signal is applied along a gate line, and an image signal applied through a data line as the switching element is turned on is applied to a pixel electrode And the image implementing element is driven.

However, in the conventional organic light emitting display device, a signal delay occurs in the gate line 102, and a luminance difference occurs between a region adjacent to the gate pad portion and a region opposite to the gate pad portion, thereby deteriorating the image quality. This signal delay is caused by the resistance of the metal itself forming the gate line 102 and the kickback voltage caused by the parasitic capacitance between the gate and the source of the thin film transistor when driving the display device.

In the present invention, in order to prevent such a signal delay, the thickness of the gate line 102 is varied according to the position, and the electrical conduction of the gate line 102 is made different to prevent signal delay. The resistance of the gate line 102 itself and the signal delay due to the kickback phenomenon increase as the distance from the gate driver integrated circuit that is the signal source of the scan signal. Accordingly, in the present invention, as the distance from the signal source increases, the thickness of the gate line 102 is increased to increase the electric conductivity, thereby compensating for the signal delay due to the resistance and the kickback phenomenon.

Referring again to FIG. 5A, a first insulating layer 124 and a second insulating layer 126 are stacked on the gate insulating layer 122, and a bank layer 128 is disposed thereon. A common electrode 125 is disposed on the bank layer 128 and a second substrate 130 is bonded thereto with an adhesive layer 142 thereon.

The organic light emitting display device having the structure shown in FIG. 5B has the same structure as the organic light emitting display device shown in FIG. 5A except for the shape of the gate line 102.

5A, the gate pad on which the gate driver integrated circuit is mounted is disposed only on one side of the image display portion, so that the thickness of the gate line 102 increases from the left end portion to the right end portion (i.e., away from the gate pad) 5B, since the gate pad on which the gate driver integrated circuit is mounted is disposed on both sides of the image display portion and the scanning signal is applied from both sides of the gate line 102, the thickness of the gate line 102 is set at the left end and the right end And increases toward the central region.

5A and 5B, the thickness of the gate line 102 is changed so that the gate line 102 has a certain number of steps, but the present invention is not limited to this configuration. In the organic light emitting display of the present invention, the gate line 102 may be formed to have various thicknesses in accordance with various factors such as the area of the display device, the material of the gate line 102, and the electrical characteristics of the thin film transistor. Also, although the thickness varies discontinuously in the figure so that the gate line 102 has a step difference, the thickness of the gate line 102 of the present invention may continuously change.

As described above, according to the present invention, by setting the thickness of the gate line 102 differently according to the position of the image display unit, the signal delay due to the resistance of the gate line 102 and the kickback phenomenon can be prevented.

For example, in the conventional organic light emitting display device in which the thickness of the gate line is uniformly formed to a thickness of 4500 ANGSTROM and the gate line is formed to have a step height of 4500 ANGSTROM, 6500 ANGSTROM, and 8500 ANGSTROM from one side to the other side (About 2.58 x 10 < ^-6 > [Omega] m) and a resistance of about 1.3-2.5 [Omega] [Omega] m, ) And the capacitance per pixel 211fF are the same, the RC delay of the gate line of the conventional organic light emitting display device is 974.76nτ, and the RC delay of the gate line of the organic light emitting display according to the present invention is 721.88nτ.

Therefore, the RC delay of the gate line of the organic light emitting display of the present invention is reduced by about 26%, and the total signal delay of the gate line can be reduced as the RC delay is reduced. This reduction in the signal delay compensates for the resistance of the gate line 102 and the signal delay due to the kickback phenomenon, so that the luminance is uniform over the entire image display portion of the organic light emitting display.

Although the thickness of the gate line is adjusted according to the position in order to prevent the signal delay of the gate line in the above description, the present invention is not limited to such a structure but may be applied to all structures capable of preventing signal delay of the gate line .

6A and 6B are plan views of gate lines of an organic light emitting display according to another embodiment of the present invention.

6A is a diagram showing a planar structure of a gate line 102 of an organic light emitting display having a structure in which a gate pad portion on which a gate driver integrated circuit is mounted is formed on one side of a first substrate 120. FIG. 6A, in the region adjacent to the gate pad portion on one side of the image display portion, the gate line 102 is formed to have a width of d1, and the width of the gate line 102 from one end to the other side is d2. ... dn.

As described above, as the width of the gate line 102 increases, the electrical conductivity increases, thereby compensating for the signal delay due to the resistance of the metal and the kickback phenomenon, thereby preventing the delay of the scanning signal through the gate line 102 do. At this time, the widths d1, d2, ..., dn of the gate lines 102 and the number of steps are determined by various factors such as the material of the gate lines 102, In particular, the width of the gate line 102 does not increase to a certain extent but is determined according to a signal delay at a specific position. In other words, in the present invention, it is possible to measure the degree of signal delay at a specific position and form a gate line with a width that can compensate for the signal delay. The area of such signal delay measurement can be made over the entire gate line 102 have.

6B is a view showing a structure of a gate line 102 of an organic light emitting display device having a structure in which gate pad portions on which gate driver integrated circuits are mounted are formed on both sides of a first substrate 120. FIG. 6B, in the region adjacent to the gate pad portions on both sides of the image display portion, the gate line 102 is formed to have a width of d1, and the width of the gate line 102 from the both end portions to the central region is d2 ... dn.

As described above, as the width of the gate line 102 increases, the electrical conductivity increases, thereby compensating for the signal delay due to the resistance of the metal and the kickback phenomenon, thereby preventing the delay of the scanning signal through the gate line 102 do.

At this time, the widths d1, d2, ..., dn of the gate lines 102 and the number of steps are determined by various factors such as the material of the gate lines 102, In particular, the width of the gate line 102 does not increase to a certain extent but is determined according to a signal delay at a specific position. In other words, in the present invention, it is possible to measure the degree of signal delay at a specific position and form a gate line with a width that can compensate for the signal delay. The area of such signal delay measurement can be made over the entire gate line 102 have.

As described above, according to the present invention, it is possible to compensate the signal delay through the gate line by adjusting the thickness of the gate line 102, and to compensate the signal delay of the gate line by adjusting the width of the gate line 102 do.

From this point of view, in the present invention, by adjusting the cross-sectional area of the gate line 102 according to the position, it is possible to prevent a signal delay due to a resistance and a kickback phenomenon, which will be described in detail with reference to FIGS. 7A to 7D.

7A to 7D are cross-sectional views of gate lines for respective positions of the organic light emitting display device. 7A and 7B illustrate an organic light emitting display having a structure in which a gate driver integrated circuit, which is a signal source, is disposed on one side of a display region, and FIGS. 7C and 7D show a gate driver integrated circuit And an organic light emitting display device having a structure disposed on both sides of the display region.

In this case, the horizontal axis represents the total length (ℓ) of the gate line and the vertical axis represent the cross-sectional area of the gate line, the cross-sectional area may be different ㎛ ² days, depending on the material of the size and the gate line of the OLED.

As shown in FIG. 7A, in the organic EL display device of this structure, the gate line in the region adjacent to the gate pad has the smallest cross-sectional area and is farther from the gate pad, that is, Sectional area of the gate line increases discontinuously from one side (0) to the other side (l) of the gate line. At this time, the cross-sectional area of the gate line at the specific position corresponds to the resistance of the gate line at the corresponding position and the magnitude of the kickback phenomenon of the thin film transistor of the pixel.

7B, the cross-sectional area of the gate line is continuously increased from one side (0) to the other side (l) of the image display area, so that the delay of the scanning signal over the entire image display area can be compensated do.

7C, in the organic EL display device of this structure, the gate lines of the regions (0, 1) adjacent to the gate pads on both sides of the image display region have the smallest cross-sectional area and the central region (l / 2), the cross-sectional area of the gate line increases discontinuously. At this time, the cross-sectional area of the gate line at the specific position corresponds to the resistance of the gate line at the corresponding position and the magnitude of the kickback phenomenon of the thin film transistor of the pixel, so that the delay of the scanning signal in the gate line .

Further, as shown in Fig. 7D, the cross-sectional area of the gate line increases continuously from both sides of the image display area to the central area, so that the delay of the scanning signal can be compensated over the entire image display area.

On the other hand, in the present invention, the cross-sectional area of the gate line may not be increased discontinuously or continuously from one side of the image display unit to the central region on the other side or from both sides thereof, but may vary from one position to another. That is, the signal delay of the gate line can be prevented by measuring the signal delay at a specific position of the gate line and adjusting the cross-sectional area (i.e., thickness and / or width) of the gate line of the region based on the measured signal delay .

As described above, in the present invention, by increasing the cross-sectional area of the gate line from one gate pad or increasing the distance from the gate pad on either side, signal delay can be prevented or the signal delay can be measured to set the cross- . In other words, in the present invention, not only the signal delay can be prevented by adjusting the thickness or the width of the gate line, but also the signal delay can be effectively prevented by suitably adjusting the thickness and width at the same time.

On the other hand, the present invention is applied not only to gate lines but also to data lines. When the data line is away from the data pad, the image quality is deteriorated due to the resistance of the metal forming the data line and the delay of the image signal applied to the data line due to the kickback phenomenon. As in the case of the gate line, , The signal delay can be prevented by increasing the thickness and / or width of the data line, for example, away from the data pad on one side or away from the data pad on both sides.

Hereinafter, a method of manufacturing an organic light emitting display having the above structure will be described in detail. As described above, the organic light emitting display device of the present invention can be manufactured in various structures. In the following description, a method of manufacturing the organic light emitting display device having the structure of FIG. 4 will be described. A method of manufacturing an organic electroluminescent display device of another structure will be easily understood by a person skilled in the art based on the manufacturing method described below.

8A to 8L are views showing a method of manufacturing an organic light emitting display device according to the present invention. Here, for convenience of explanation, only one pixel (for example, B-pixel) in the image display area and an area along the gate line are shown.

First, a first substrate 120 made of a transparent material such as glass or plastic is prepared as shown in FIG. 8A, and then Cr, Mo, Ta, Cu, Ti, Al, or Al A metal layer 102a is laminated on a non-transparent metal such as an alloy by a sputtering process, and then a photoresist layer 220 is formed by laminating a photoresist thereon.

Subsequently, a photomask 230 is aligned and disposed on the first substrate 120, and then the photoresist layer 220 is exposed by irradiating light such as ultraviolet rays. The photomask 230 is a multi-tone mask. The photomask 230 includes a blocking region a that completely blocks the light to be irradiated, a partial blocking region b, c, and d that partially blocks the light, And a transmissive region (e) through which light is completely transmitted. For example, the partial blocking region may include a first partial blocking region (b) blocking about 20% of the irradiated light, a second partial blocking region (c) blocking about 40% of the irradiated light, And a third partial cut-off area (d) which cuts off 60%.

Next, as shown in FIG. 8B, the photoresist layer 220 to which light is irradiated is developed by a developing solution to form a first photoresist pattern 220b. At this time, the photoresist layer corresponding to the blocking region (a) of the photomask 230 is not developed and the photoresist layer corresponding to the transmissive region of the photomask 230 is all developed, A part of the photoresist layer corresponding to the regions b, c and d is partially developed to form a first photoresist pattern 220a in the image display region and a second photoresist pattern 220b having a plurality of steps in the gate line region Is formed.

Thereafter, when the metal layer 102a is etched by applying an etching solution in a state where the metal layer 102a is blocked by the first photoresist pattern 220a and the second photoresist pattern 220b, The exposed metal layer 102a is removed to form the gate electrode 111 in the image display region and the first metal pattern 102b in the gate line region.

Then, as shown in FIG. 8D, the first photoresist pattern 220a and the second photoresist pattern 220b are ashed by ashing the first photoresist pattern 220a and the second photoresist pattern 220b, A part of the pattern 220b is removed to form a third photoresist pattern 220c on the first metal pattern 102b in the gate line region. At this time, a part of the first metal pattern 102b is exposed to the outside.

Next, when the first metal pattern 102b is blocked by the third photoresist pattern 220c and the exposed region of the first metal pattern 102b is etched by the etching solution, as shown in FIG. 8E Similarly, a second metal pattern 102c is formed in the gate line region. Thereafter, the first photoresist pattern 220a and the third photoresist pattern 220c are aged.

A part of the first photoresist pattern 220a and the third photoresist pattern 220c are removed by the ace as shown in FIG. 8F, and the fourth photoresist pattern 220c is formed on the second metal pattern 102c of the gate line region, A pattern 220d is formed, in which a part of the second metal pattern 102c is exposed.

Next, the second metal pattern 102c is blocked by the fourth photoresist pattern 220d, the exposed area of the second metal pattern 102c is etched by the action of the etching solution, And a third metal pattern 102d is formed in the gate line region.

Thereafter, the fifth photoresist pattern 220e is again formed through the Azing process, and then the third metal pattern 102d is etched using the fifth photoresist pattern 220e, A gate line 102 having a different thickness is formed in the gate line region of the first substrate 120 as shown in FIG.

Then, as shown in FIG. 8I, an inorganic insulating material is laminated over the entire first substrate 120 by a CVD (Chemical Vapor Deposition) method to form a gate insulating layer 122. At this time, the gate insulating layer 122 may be formed to a thickness of about 2000 Å of SiNx. Subsequently, a semiconductor material such as amorphous silicon or crystalline silicon is deposited over the entire surface of the first substrate 120 by the CVD method, and then the semiconductor layer 112B is formed by etching. At this time, various materials such as an oxide semiconductor material and a nitride semiconductor material may be stacked as the semiconductor material.

Then, an opaque metal having good conductivity such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy is stacked on the first substrate 120 by a sputtering method and then etched to form a precise The source electrode 114B and the drain electrode 115B are formed on the ohmic contact layer.

Thereafter, the first insulating layer 124 is formed by laminating an inorganic insulating material over the entire first substrate 120 on which the source electrode 114B and the drain electrode 115B are formed. At this time, the first insulating layer 124 may have a thickness of about 4500 Å of SiO ₂ . Then, a B-color filter layer 117B is formed on B pixels on the first insulating layer 124, respectively. Although not shown in the drawing, an R-color filter layer and a G-color filter layer are formed on the R pixel and the G pixel, respectively, simultaneously with the formation of the B-color filter layer 117b.

Next, as shown in FIG. 8J, an organic insulating material such as photo-acryl is applied over the entire surface of the first substrate 120 on which the color filter layer is formed to form a second insulating layer 126, The layer 124 and the second insulating layer 126 are etched to form a contact hole 129 through which the drain electrode 115B of the thin film transistor is exposed. At this time, the second insulating layer 126 may have a thickness of about 3 탆. Although the first insulating layer 124 and the second insulating layer 126 are simultaneously etched to form the contact holes 129 in the drawing, the first insulating layer 124 may be etched, The contact hole 126 may be etched to form the contact hole 129.

Next, a pixel electrode 121B made of a transparent conductive material such as ITO or IZO is formed on the second insulating layer 126. At this time, the pixel electrode 121B extends into the contact hole 29 and is electrically connected to the drain electrode 115B of the driving thin film transistor.

Then, as shown in FIG. 8K, an organic insulating material or an inorganic insulating material is deposited on the inside of the contact hole 129 and a part of the second insulating layer 126 and etched to form a bank layer 128 The organic light emitting portion 123 is formed over the entire surface of the first substrate 120 on which the pixel electrode 121B is formed. The organic emission layer 123 may include an electron injection layer, an electron transport layer, a white organic emission layer, a hole transport layer, and a hole injection layer. The white emission layer may include an R- Or a structure in which an R-organic emitting layer, a G-organic emitting layer, and a G-organic emitting layer are laminated. The electron injecting layer, the electron transporting layer, the organic light emitting layer, the hole transporting layer, and the hole injecting layer may be formed of various materials currently used.

Then, a metal such as Ca, Ba, Mg, Al or Ag is laminated on the organic light emitting portion 123 to form the common electrode 125.

8L, an adhesive layer 142 made of a thermosetting resin such as an epoxy compound, an acrylate compound, or an acrylic rubber is formed to a thickness of about 5-100 mu m over the entire surface of the second substrate 130 A pressure is applied to the first substrate 120 and the second substrate 130 in a state where the second substrate 130 is positioned on the first substrate 120, (130).

At this time, the adhesive or the adhesive film may be coated or adhered on the first substrate 120, and then the second substrate 130 may be positioned thereon and then cemented.

The second substrate 130 may be made of glass, plastic, or a protective film such as a PS (polystyrene) film, a PE (polyethylene) film, a PEN (polyethylene naphthalate) film or a PI (polyimide) film.

After the first substrate 120 and the second substrate 130 are bonded together as described above, the adhesive layer 142 is heated to a temperature of about 80-170 degrees to cure the adhesive layer 142. By curing the adhesive layer 142, it is possible to seal the organic electroluminescence display device and prevent moisture and the like from penetrating from the outside. In addition, the second substrate 130 functions as a sealing cap for sealing the organic light emitting display device, thereby protecting the organic light emitting display device.

As described above, in the present invention, by adjusting the electrical conductivity by setting the thickness and / or the cross-sectional area of the gate line and / or the data line differently for each position, it is possible to prevent the signal delay due to the resistance of the wiring and the kickback phenomenon of the thin film transistor do. Therefore, it is possible to prevent the luminance from becoming uneven across the entire screen due to the signal delay, thereby preventing the image quality from deteriorating.

Although the organic electroluminescent display device has been described in detail in the foregoing description, the present invention is not limited to such an organic electroluminescent display device. For example, a liquid crystal display device, a plasma display device, It may be applied to all kinds of display devices that apply signals to each signal including pixels. In this case, in the case of a liquid crystal display device, the image forming element is a liquid crystal layer and in the case of an organic light emitting display, an image forming element is an organic light emitting layer. Further, in the case of a plasma display device, the image forming element is a plasma layer and in the case of an electrophoretic display device is an electrophoretic layer.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

102: gate line 103: data line
120, 130: substrate 117R, 117G, 117B: color filter layer
121R, 21G, 21B: pixel electrode 123: organic light emitting portion
124, 126: insulating layer 125: common electrode
128: dummy pattern 142: adhesive layer

Claims (12)

A first substrate and a second substrate;
A plurality of gate lines and data lines arranged on the first substrate to define a plurality of pixels; And
And an image implementing element disposed in each pixel of the first substrate,
Wherein the thickness increases as the at least one of the gate line and the data line is away from the signal source applied to the pixel. The display device according to claim 1, wherein the image forming element includes an organic light emitting layer, a liquid crystal layer, an electrophoretic layer, and a plasma layer. The display device according to claim 1, wherein a thickness of the gate line and a data line are discontinuously changed. The display device according to claim 1, wherein a thickness of the gate line and a data line are continuously changed. 2. The display device of claim 1, wherein the signal source comprises a gate driver integrated circuit and a data driver integrated circuit. The display device according to claim 5, wherein the gate driver integrated circuit is disposed on one side or both sides of the gate line. The display device according to claim 1, wherein the data driver integrated circuit is disposed on one side or both sides of a data line. A first substrate and a second substrate;
A plurality of gate lines and data lines arranged on the first substrate to define a plurality of pixels; And
And an image implementing element disposed in each pixel of the first substrate,
Wherein the cross-sectional area of at least one of the gate line and the data line varies depending on the degree of signal delay. 9. The display device according to claim 8, wherein a cross-sectional area of the gate line and the data line increases as the distance from the signal source increases. 10. The display device of claim 9, wherein the thickness and / or width of the gate line and the data line increase as the distance from the signal source increases. The display device according to claim 8, wherein a cross-sectional area of the gate line and the data line is discontinuously changed. 9. The display device according to claim 8, wherein the cross-sectional area of the gate line and the data line are continuously varied.

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