CN113793562A - Display panel, brightness compensation method thereof and display device - Google Patents

Display panel, brightness compensation method thereof and display device Download PDF

Info

Publication number
CN113793562A
CN113793562A CN202111228474.8A CN202111228474A CN113793562A CN 113793562 A CN113793562 A CN 113793562A CN 202111228474 A CN202111228474 A CN 202111228474A CN 113793562 A CN113793562 A CN 113793562A
Authority
CN
China
Prior art keywords
display
display panel
thin film
sub
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111228474.8A
Other languages
Chinese (zh)
Inventor
贾琼
党鹏乐
蔡思伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Govisionox Optoelectronics Co Ltd
Original Assignee
Kunshan Govisionox Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Govisionox Optoelectronics Co Ltd filed Critical Kunshan Govisionox Optoelectronics Co Ltd
Priority to CN202111228474.8A priority Critical patent/CN113793562A/en
Publication of CN113793562A publication Critical patent/CN113793562A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the invention discloses a display panel, a brightness compensation method thereof and a display device. The display panel includes: the display panel comprises a signal input end, a display panel and a display panel, wherein the area close to the signal input end is a near end, and the area far away from the signal input end is a far end; a pixel including a thin film transistor; wherein the size of the thin film transistor at the far end is larger than that of the thin film transistor at the near end. According to the technical scheme of the embodiment of the invention, the size of the thin film transistor at the far end is larger than that of the thin film transistor at the near end, so that the voltage drop of the display signal generated on the pixel circuit at the far end is smaller than that of the display signal generated on the pixel circuit at the near end, and the display brightness uniformity at the far end and the near end of the display area is improved.

Description

Display panel, brightness compensation method thereof and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a brightness compensation method thereof and a display device.
Background
With the continuous development of display technology, the display effect of the display panel is required to be higher and higher. At present, the display brightness of different display areas in a display panel is different, which causes uneven display brightness of the display panel and affects the display effect of the display panel.
Disclosure of Invention
The embodiment of the invention provides a display panel, a brightness compensation method thereof and a display device, which are used for improving the display brightness uniformity of the display panel.
In a first aspect, an embodiment of the present invention provides a display panel, where the display panel includes:
the display panel comprises a signal input end, a display panel and a display control unit, wherein the area close to the signal input end in the display panel is a near end, and the area far away from the signal input end in the display panel is a far end;
a pixel including a thin film transistor; wherein the size of the thin film transistor at the far end is larger than that at the near end.
Optionally, from the near end to the far end of the display panel, the display area of the display panel is divided into at least two sub-display areas, each sub-display area comprises at least one row of pixels;
from the near end to the far end of the display panel, the sizes of the thin film transistors in different sub-display areas are sequentially increased.
Optionally, each of the sub-display regions comprises a row of the pixels; the thin film transistors in the pixels in the same row are equal in size.
Optionally, each of the sub-display regions includes at least two rows of the pixels; the thin film transistors in the same sub-display region are equal in size.
Optionally, from the near end to the far end of the display panel, the widths of the active layers of the thin film transistors in different sub-display regions sequentially increase.
Optionally, the widths of the electrodes of the thin film transistors in different sub-display regions sequentially increase from the near end to the far end of the display panel.
Optionally, the thin film transistor includes at least one of a driving transistor, a light emission control transistor, and a data writing transistor.
Optionally, the pixel further includes a signal line connected to the thin film transistor, and a line width of the signal line gradually increases from a proximal end to a distal end of the display panel.
In a second aspect, an embodiment of the present invention further provides a method for compensating brightness of a display panel, where the display panel includes:
a signal input for receiving a display signal; the area of the display panel close to the signal input end is a near end, and the area far away from the signal input end is a far end;
a pixel including a thin film transistor; wherein the size of the thin film transistor at the far end is larger than that at the near end;
the brightness compensation method of the display panel comprises the following steps:
compensating the display brightness of each area of the display panel from the near end to the far end of the display panel so as to enable the display brightness of each area to be consistent; wherein the display brightness compensation data of the near end and the far end of the display panel are different.
In a third aspect, an embodiment of the present invention further provides a display device, including the display panel described in the first aspect.
According to the display panel, the brightness compensation method and the display device provided by the embodiment of the invention, the area close to the signal input end in the display panel is taken as the near end, the area far away from the signal input end in the display panel is taken as the far end, and the size of the thin film transistor in the pixel positioned at the far end is set to be larger than that of the thin film transistor in the pixel positioned at the near end, so that the voltage drop of the display signal generated on the pixel circuit positioned at the far end is smaller than that of the display signal generated on the pixel circuit positioned at the near end, the transmission of the display signals at the far end and the near end is balanced, and the uniformity of the display brightness at the far end and the near end of the display area is improved. Compared with the prior art, the scheme is favorable for improving the uneven display brightness of the display panel, so that the display effect is improved.
In addition, taking the power signal as an example, in the prior art, the voltage drop generated by the power signal at the near end of the display area is small, and the voltage drop generated at the far end is large, so that the power signal has large power consumption at the far end of the display area. In the scheme, the size of the thin film transistor at the far end is relatively large, so that the impedance of a transmission path of a power supply signal in the pixel circuit at the far end is relatively small, power consumption of the power supply signal at the far end is reduced, and the overall power consumption of the display panel is reduced.
According to the scheme, the size of the thin film transistor arranged at the near end is relatively small, the overall size of the pixel circuit arranged at the near end is small, on one hand, the pixel aperture ratio of the near end of the display area is promoted, the display effect is promoted, on the other hand, the near end of the display area is made to have more wiring spaces, and the near end of the display area is adjacent to the wiring area in the non-display area, so that the scheme is favorable for wiring of the display signal line and the touch signal line, for example, the distance between the touch signal lines can be set to be larger, potential coupling between the adjacent touch signal lines is weakened, the accuracy of the touch signal is promoted, and the touch effect of the display panel is promoted.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of another display panel provided in the embodiment of the present invention;
FIG. 5 is an enlarged view of area B of FIG. 4;
fig. 6 is a cross-sectional view of a pixel provided by an embodiment of the invention;
FIG. 7 is a flowchart illustrating a method for compensating brightness of a display panel according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a luminance compensation apparatus of a display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a driving module according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background art, the display brightness of different display areas in the display panel is different, which causes the display brightness of the display panel to be uneven, and affects the display effect of the display panel. The inventors have studied and found that the above-described problems occur because the display device includes a display panel including a signal line connected to a driving chip, for example, the signal line including a power supply line, and the driving chip may supply power to a pixel circuit in the display panel through the power supply line. The power line generally extends from the non-display area to the display area of the display panel, and the length of the power line is proportional to the size of the display panel. Because the power cord has resistance, consequently, power signal can produce the pressure drop of different degree in the different positions department of power cord, and along one side that display panel is close to driver chip to the one side of keeping away from driver chip, power signal's pressure drop on the power cord is bigger and bigger, and power signal's voltage value is littleer and more for there is the difference in one side that display panel is close to driver chip to the display luminance of keeping away from one side of driver chip, consequently has the uneven problem of display luminance. Particularly, when the display brightness of the image to be displayed is high, the current required for driving the pixels to emit light is larger, so that the voltage Drop (IR Drop) generated on the power line is larger, so that the display brightness difference from the side of the display panel close to the driving chip to the side far away from the driving chip is larger, and the problem of uneven display brightness is further aggravated.
In view of the foregoing problems, embodiments of the present invention provide a display panel. Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and as shown in fig. 1, the display panel 100 includes:
a signal input end, where an area of the display panel 100 close to the signal input end is a near end and an area far away from the signal input end is a far end;
a pixel PX including a thin film transistor TFT; wherein the size of the thin film transistor TFT at the far end is larger than that of the thin film transistor TFT at the near end.
Specifically, the display panel 100 has a display area AA and a non-display area NAA surrounding the display area AA. A bonding area 10 for bonding the driver chip is disposed in the non-display area NAA, and the signal input terminal is located in the bonding area 10 (the signal input terminal is not specifically shown in fig. 1, but the setting area of the signal input terminal is illustrated by the setting area of the bonding area 10). The area of display panel 100 near the signal input terminal is a near end, and the area far from the signal input terminal is a far end, i.e., the area of display panel 100 near bonding area 10 is a near end, and the area far from bonding area 10 is a far end. Similarly, the area within display area AA that is closer to bonding area 10 is also proximal and the area that is further from bonding area 10 is also distal.
The signal input terminal is used for receiving a signal output by the driver chip, for example, when the signal input terminal is a power supply terminal, the signal input terminal can receive a power supply signal output by the driver chip, and when the signal input terminal is a data voltage terminal, the signal input terminal can receive a data voltage signal output by the driver chip. In this embodiment and the following embodiments, the signal input terminal is taken as an example of a power source terminal for receiving a power source signal. When the signal input terminal is a power supply terminal, the signal input terminal may be connected to a power supply line, and the power supply line extends from the proximal end of the bonding area 10 to the distal end of the display area AA, i.e., along the Y direction shown in fig. 1. The pixels PX are located in the display area AA, and the power supply line may transmit a power supply signal to each pixel PX in the display area AA.
The display panel includes a plurality of pixels PX therein, and the pixels PX may be red, green, blue, white, or the like, and exemplarily, the red, green, and blue pixels may emit light of various colors and brightnesses in combination. Each pixel PX includes a pixel circuit and a light emitting device, and the pixel circuit is configured to drive the corresponding light emitting device to emit light. In the red pixel, the light emitting device emits red light; in the green pixel, the light emitting device emits green light; in the blue pixel, the light emitting device emits blue light; in the white pixel, the light emitting device emits white light. There are various structures of the pixel circuits in the pixels PX, and two of them will be taken as examples to further explain the embodiments of the present invention.
Fig. 2 is a schematic structural diagram of a pixel circuit provided in an embodiment of the present invention, and as shown in fig. 2, the pixel circuit optionally includes a driving transistor DT and a first transistor T1, and a thin film transistor in a pixel PX includes the driving transistor DT. When the first transistor T1 is turned on, the data voltage Vdata is written into the storage capacitor Cst and the gate electrode of the driving transistor DT through the first transistor T1, the storage capacitor Cst stores the data voltage Vdata, the first electrode of the driving transistor DT writes the first power signal ELVDD, the second electrode of the light emitting device D1 writes the second power signal ELVSS, and the driving transistor DT drives the light emitting device D1 to perform light emitting display with corresponding luminance according to the data voltage Vdata stored in the storage capacitor Cst.
Illustratively, referring to fig. 2, the case where the signal input terminal in the bonding area 10 is a power terminal for receiving the first power signal ELVDD is described. The size of the thin film transistor TFT at the far end is larger than that of the thin film transistor TFT at the near end, which may be, in particular, the driving transistor DT between the first power signal input terminal and the light emitting device D1, and thus the size of the driving transistor DT at the far end may be set larger than that of the driving transistor DT at the near end. For example, the areas of the active layer, the source electrode and the drain electrode of the driving transistor DT located at the far end are all set to be larger than the areas of the active layer, the source electrode and the drain electrode of the driving transistor DT located at the near end. The larger the areas of the active layer, the source electrode and the drain electrode of the driving transistor DT, the smaller the equivalent resistance between the first electrode of the driving transistor DT and the first electrode of the light emitting device D1 in the pixel circuit, and the smaller the voltage drop of the first power supply signal ELVDD between the first electrode of the driving transistor DT and the first electrode of the light emitting device D1, and thus, the voltage drop of the first power supply signal ELVDD generated in the pixel circuit located at the far end is smaller than the voltage drop of the first power supply signal ELVDD generated in the pixel circuit located at the near end.
In the prior art, the power source terminal transmits the first power signal ELVDD to the pixel circuits in each region of the display area through the power line, the voltage drop of the first power signal ELVDD generated on the power line is increasingly greater from the near end to the far end of the display area, the voltage value of the first power signal ELVDD received by the pixel circuit at the near end is greater than the voltage value of the first power signal ELVDD received by the pixel circuit at the far end, and the voltage value of the first pole of the light emitting device at the near end is also greater than the voltage value of the first pole of the light emitting device at the far end. According to the scheme, the size of the thin film transistor TFT at the far end is larger than that of the thin film transistor TFT at the near end, so that the voltage drop of the first power supply signal ELVDD on the pixel circuit at the far end can be smaller than that of the first power supply signal ELVDD on the pixel circuit at the near end, the voltage value of the first pole of the light-emitting device D1 at the far end can be close to that of the first pole of the light-emitting device D1 at the near end, the voltage difference of the two poles of the light-emitting device D1 at the far end and the near end can be equalized, and therefore the display brightness uniformity at the far end and the near end of the display area can be improved.
Fig. 3 is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, and as shown in fig. 3, the pixel circuit optionally includes a driving transistor DT, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5 and a sixth transistor T6, where the first transistor T1 is a data writing transistor, and the fifth transistor T5 and the sixth transistor T6 are light emitting control transistors; the thin film transistor in the pixel PX includes at least one of the driving transistor DT, the fifth transistor T5, and the sixth transistor T6. In the light emitting stage, the fifth transistor T5 and the sixth transistor T6 may be turned on in response to the light emission control signal EM, the first power signal ELVDD is written to the first pole of the driving transistor DT, the second power signal ELVSS is written to the second pole of the light emitting device D1, and the driving transistor DT drives the light emitting device D1 to perform light emitting display with corresponding brightness according to the data voltage Vdata stored in the storage capacitor Cst.
Illustratively, referring to fig. 3, the case where the signal input terminal in the bonding area 10 is a power terminal for receiving the first power signal ELVDD is still described. The size of the thin film transistor TFT at the far end is larger than that of the thin film transistor TFT at the near end, which may also be at least one of the fifth transistor T5, the sixth transistor T6 and the driving transistor DT between the first power signal input terminal and the light emitting device D1, so that the size of at least one of the fifth transistor T5, the sixth transistor T6 and the driving transistor DT at the far end may be set larger than that of the corresponding transistor at the near end, and this scheme also enables the voltage drop of the first power signal ELVDD generated on the pixel circuit at the far end to be smaller than that of the first power signal ELVDD generated on the pixel circuit at the near end, so as to improve the display luminance uniformity at the far end and near end of the display region by equalizing the voltage difference between the two poles of the light emitting device D1 at the far end and near end.
According to the technical scheme of the embodiment of the invention, the area close to the signal input end in the display panel is taken as the near end, the area far away from the signal input end in the display panel is taken as the far end, and the size of the thin film transistor in the pixel positioned at the far end is set to be larger than that of the thin film transistor in the pixel positioned at the near end, so that the voltage drop of the power supply signal on the pixel circuit positioned at the far end can be smaller than that of the power supply signal on the pixel circuit positioned at the near end, the voltage difference of two poles of a light-emitting device at the far end and the near end can be balanced, and the uniformity of the display brightness at the far end and the near end of the display area can be improved. Compared with the prior art, the scheme is favorable for improving the uneven display brightness of the display panel, so that the display effect is improved.
In addition, taking the power signal as an example, in the prior art, the voltage drop generated by the power signal at the near end of the display area is small, and the voltage drop generated at the far end is large, so that the power signal has large power consumption at the far end of the display area. In the scheme, the size of the thin film transistor at the far end is relatively large, so that the impedance of a transmission path of a power supply signal in the pixel circuit at the far end is relatively small, power consumption of the power supply signal at the far end is reduced, and the overall power consumption of the display panel is reduced.
According to the scheme, the size of the thin film transistor arranged at the near end is relatively small, the overall size of the pixel circuit arranged at the near end is small, on one hand, the pixel aperture ratio of the near end of the display area is promoted, the display effect is promoted, on the other hand, the near end of the display area is made to have more wiring spaces, and the near end of the display area is adjacent to the wiring area in the non-display area, so that the scheme is favorable for wiring of the display signal line and the touch signal line, for example, the distance between the touch signal lines can be set to be larger, potential coupling between the adjacent touch signal lines is weakened, the accuracy of the touch signal is promoted, and the touch effect of the display panel is promoted.
Referring to fig. 1, on the basis of the above scheme, optionally, the display area AA is divided into a plurality of sub-display areas from the near end to the far end of the display panel, each sub-display area includes a row of pixels PX, and the sizes of the thin film transistors TFT in different sub-display areas are sequentially increased from the near end to the far end of the display panel.
Fig. 1 schematically shows a case where the sizes of the thin film transistors TFT in each row of pixels PX are sequentially increased from the near end to the far end of the display panel (i.e., from the near end to the far end of the display area AA). When the layout design of the display panel is performed, the thin film transistors in each row of pixels PX can be respectively drawn, so that the sizes of the thin film transistors in the pixels PX are sequentially increased from the near end to the far end of the display area AA, and the sizes of the thin film transistors in the same row of pixels PX are equal. Illustratively, the signal input terminal in the bonding area 10 is a power terminal, and the power terminal is connected to a power line, which extends from the proximal end of the display area AA to the distal end of the bonding area 10 and transmits a power signal to each row of pixels PX. The length of the power line is proportional to the length of the display area AA from the near end to the far end, so that each row of pixels PX passes through the power line, the power signal on the power line generates a certain voltage drop, the voltage drops of the power signal generated at the positions of the power line from the near end to the far end of the display area AA sequentially increase, and correspondingly, the voltage values of the power signal received by each row of pixels PX from the near end to the far end of the display area AA sequentially decrease. According to the scheme, the sizes of the thin film transistors TFT in each row of pixels PX are sequentially increased from the near end to the far end, so that the equivalent resistance of the thin film transistors TFT in each row of pixels PX is sequentially reduced from the near end to the far end, and then from the near end to the far end, the voltage drop generated in the row of pixels PX by the power supply signal received by each row of pixels PX is also sequentially reduced, so that the voltage of the first pole of the light emitting device in each row of pixels PX is balanced, the voltage difference of two poles of the light emitting device in each row of pixels PX is balanced, and the uniformity of the display brightness of the display area from the near end to the far end is improved.
Fig. 4 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, as shown in fig. 4, based on the above scheme, optionally, the display area AA is divided into at least two sub-display areas from the near end to the far end of the display panel, where each sub-display area includes at least one row of pixels PX; from the near end to the far end of the display panel, the sizes of the thin film transistors TFT in different sub-display regions are sequentially increased.
Specifically, the display area AA may be divided into n sub-display areas from the near end to the far end, which are respectively the sub-display area AA (1), the sub-display area AA (2), the near end to the far end of the display area AA, and the sizes of the thin film transistors TFT in the sub-display areas AA (n) to AA (1) are sequentially increased from the near end to the far end of the display area AA, and the sizes of the thin film transistors TFT in the same sub-display area are the same. Fig. 4 illustrates that each sub-display area includes three rows of pixels PX, and in practical applications, the number of rows of pixels PX in each sub-display area may be set according to requirements, for example, each sub-display area includes one row or more than two rows of pixels PX, which is not limited in the embodiment of the present invention.
Illustratively, the signal input terminal in the bonding area 10 is a power terminal, the power terminal is connected to a power line, the power line extends from the proximal end of the display area AA to the distal end of the bonding area 10, and transmits a power signal (e.g., the first power signal ELVDD) to each pixel PX. From the near end to the far end of the display area AA, a power signal on the power line generates a certain voltage drop every time the power signal passes through one sub-display area. For example, the power signals received by the pixel circuits in the sub-display area AA (n) can be represented as V-VnWherein V represents the voltage value of the power supply signal of the power supply terminal, VnThe voltage drop value of the power signal on the power line from the power source to the sub-display area aa (n) is represented by the voltage drop value of the power signal on the power line in the area, since each pixel circuit in the display panel is connected to the power line and each pixel circuit is in parallel connection, the magnitude of the power signal received by each pixel circuit is only equal to the voltage of the power sourceThe source signal is correlated with the voltage drop value of the power signal on the power line. By analogy, the power supply signal received by the pixel circuit in the sub-display area AA (n-1) is V-Vn-1，Vn-1The voltage drop value of the power signal on the power line from the power source to the sub display area AA (n-1), the power signal received by the pixel circuit in the sub display area AA (2) is V-V2，V2A voltage drop value of a power supply signal on a power supply line from a power supply terminal to an area of the sub display area AA (2), the power supply signal received by the pixel circuit in the sub display area AA (1) is V-V1，V1Represents a voltage drop value of a power supply signal on a power supply line from a power supply terminal to the area of the sub display area AA (1). From proximal to distal of the display area AA, VnTo V1And increases in turn.
The power supply signal may be transmitted to the first electrode of the light emitting device through the thin film transistor TFT in the pixel circuit, for example, referring to fig. 2, the first power supply signal ELVDD is transmitted to the first electrode of the light emitting device through the driving transistor DT, or, referring to fig. 3, the first power supply signal ELVDD is transmitted to the first electrode of the light emitting device through the fifth transistor T5, the driving transistor DT and the sixth transistor T6, and this scheme may sequentially reduce the equivalent resistance of the thin film transistor TFT in the sub display area AA (n) to the sub display area AA (1) by sequentially increasing the size of the thin film transistor TFT in the sub display area AA (1) (e.g., the thin film transistor TFT may be the driving transistor DT in fig. 2, or at least one of the fifth transistor T5, the driving transistor DT and the sixth transistor T6 in fig. 3), thereby sequentially reducing the equivalent resistance of the thin film transistor TFT in the sub display area AA (n) to the thin film transistor TFT in the sub display area AA (1), thereby sequentially reducing the power supply signal in the sub display area AA (n) to the thin film transistor TFT in the sub display area AA (1) The voltage drop generated in the sub-display area can be reduced in sequence, that is, the voltage drop generated by the power supply signal on the pixel circuit of each sub-display area is reduced from the near end to the far end. For example, the voltage value of the first electrode of the light emitting device in the sub-display area aa (n) may be expressed as V-Vn-V’nWherein, V'nThe voltage drop of the power signal generated on the pixel circuit in the sub-display area aa (n) (i.e. the voltage drop of the power signal generated on the TFT in the sub-display area aa (n)) is shown, and so on, the sub-display area aThe voltage value of the first electrode of the light emitting device in A (n-1) is V-Vn-1-V’n-1，V’n-1Representing a voltage drop of a power signal generated across the pixel circuits in the sub display area AA (n-1), the voltage value of the first electrode of the light emitting device in the sub display area AA (2) is V-V2-V’2，V’2Indicating the voltage drop of the power signal generated on the pixel circuit in the sub display area AA (2), the voltage value of the first electrode of the light emitting device in the sub display area AA (1) is V-V1-V’1，V’1Which represents the voltage drop of the power signal generated on the pixel circuit in the sub-display area aa (n). From proximal to distal, V 'of display area AA'nTo V'1Decrease in sequence, and VnTo V1The voltages of the first poles of the light emitting devices in each sub-display area are increased in sequence, so that the voltage difference of the two poles of the light emitting devices in each sub-display area is balanced, and the display brightness uniformity of the far end and the near end of each display area is improved.
In the above embodiments, alternatively, the sizes of the thin film transistors TFT located in the same sub-display region are equal. For example, for convenience of design, the display area AA may be divided into three sub-display areas at a near end, a middle end and a far end according to a distance from the display area AA to the bonding area 10, and each sub-display area includes at least two rows of pixels PX, from the near end to the far end of the display area AA, sizes of the thin film transistors in the pixels PX of the three sub-display areas are sequentially increased, and sizes of the thin film transistors in the same sub-display area are equal. The scheme can improve the uniformity of the display brightness of the display area from the far end to the near end by balancing the voltage difference of two poles of the light-emitting device in the pixels PX of each sub-display area, and is favorable for reducing the design of thin film transistors with different sizes by arranging each sub-display area to comprise at least two lines of pixels PX, thereby simplifying the manufacturing process of the display panel.
Alternatively, in other embodiments of the present invention, at least some of the TFTs in the same sub-display region may be set to have different sizes. That is, the sizes of the thin film transistors TFT in the same sub-display area do not need to be completely equal, and the sizes of the thin film transistors TFT in the same sub-display area can be set according to the specific structure of the pixel circuit in each sub-display area, the specific distribution of the thin film transistors, the capacitors and the opening areas in the pixel circuit, so that the sizes of the thin film transistors TFT in different sub-display areas are sequentially increased from the near end to the far end of the display panel.
Alternatively, the sizes of the thin film transistors in the different sub display regions may be sequentially increased from the proximal end to the distal end of the display region AA. Wherein, the width of the active layer refers to the width of the active layer in the direction perpendicular to the extending direction of the active layer. The active layer of the thin film transistor comprises a source region, a drain region and a channel region for connecting the source region and the drain region, and for the active layer with the same length, the larger the width of the active layer is, the smaller the equivalent resistance between the source and the drain of the thin film transistor is. By arranging the display area AA from the near end to the far end, the widths of the active layers of the thin film transistors in different sub-display areas are sequentially increased, so that the voltage drops of display signals generated on the pixel circuits of the different sub-display areas are sequentially reduced from the near end to the far end of the display area AA, the voltage difference between two poles of a light emitting device at the far end and the near end is balanced, and the display brightness uniformity of the far end and the near end of the display area is improved.
Fig. 5 is an enlarged view of the area B in fig. 4, and fig. 5 schematically shows the active layers of the pixel PX (1) in the sub display area AA (1) and the pixel PX (2) in the sub display area AA (2) and the metal layers where the gate, the source and the drain of the transistor are located, and taking as an example that the pixel circuit in the display panel is the pixel circuit shown in fig. 3, the area where the gate and the active layer of each transistor overlap in fig. 5 is marked with the area where each transistor is located. Fig. 6 is a cross-sectional view of a pixel provided in an embodiment of the present invention, which may be a schematic cross-sectional structure obtained by cutting the pixel PX (1) and the pixel PX (2) along a cross-sectional line LL' in fig. 5.
Referring to fig. 3 to 6, the widths of the active layers of the tfts in the sub-display areas AA (n) to AA (1) may be increased from the near end to the far end of the display panel. The sub-display area AA (1) and the sub-display area AA (2) are taken as an example, that is, the width of the active layer 20(1) of the thin film transistor in the pixel PX (1) of the sub-display area AA (1) is greater than the width of the active layer 20(2) of the thin film transistor in the pixel PX (2) of the sub-display area AA (2). For example, the width d11 of the active layer 20(1) of the sixth transistor T6 in the sub display area AA (1) is greater than the width d12 of the active layer 20(2) of the sixth transistor T6 in the sub display area AA (2). As another example, the width d21 of the active layer 20(1) of the fifth transistor T5 in the sub display area AA (1) is greater than the width d22 of the active layer 20(2) of the fifth transistor T5 in the sub display area AA (2). As another example, the width of the active layer 20(1) of the driving transistor DT in the sub display area AA (1) may be set to be larger than the width of the active layer 20(2) of the driving transistor DT in the sub display area AA (2). As another example, the width of the active layer 20(1) of the first transistor T1 in the sub-display area AA (1) may be set to be greater than the width of the active layer 20(2) of the first transistor T1 in the sub-display area AA (2).
With reference to fig. 3 to 6, alternatively, the widths of the electrodes of the thin film transistors in different sub-display regions may be sequentially increased from the near end to the far end of the display panel. The width of the electrodes of the thin film transistors in different sub display areas is sequentially increased, or the width of the drain electrodes of the thin film transistors in different sub display areas is sequentially increased, or the width of the source electrodes and the width of the drain electrodes of the thin film transistors in different sub display areas are sequentially increased. Illustratively, the widths of the electrodes of the thin film transistors in the sub display area AA (n) to the sub display area AA (1) increase sequentially from the near end to the far end of the display area AA. Still taking the sub-display area AA (1) and the sub-display area AA (2) as an example, the width of the first electrode 30(1) of the thin film transistor in the pixel PX (1) of the sub-display area AA (1) may be set to be greater than the width of the first electrode 30(2) of the thin film transistor in the pixel PX (2) of the sub-display area AA (2); alternatively, the width of the second pole 40(1) of the thin film transistor in the pixel PX (1) of the sub-display area AA (1) is set to be larger than the width of the second pole 40(2) of the thin film transistor in the pixel PX (2) of the sub-display area AA (2); alternatively, the width of the first pole 30(1) of the thin film transistor in the pixel PX (1) of the sub-display area AA (1) is set to be larger than the width of the first pole 30(2) of the thin film transistor in the pixel PX (2) of the sub-display area AA (2), and the width of the second pole 40(1) of the thin film transistor in the pixel PX (1) of the sub-display area AA (1) is set to be larger than the width of the second pole 40(2) of the thin film transistor in the pixel PX (2) of the sub-display area AA (2). It should be noted that, when the widths of the source and the drain of the thin film transistor in different sub-display regions are sequentially increased, the distance between the source and the drain of the same thin film transistor can be adaptively adjusted to avoid affecting the operating performance of the thin film transistor. According to the embodiment of the invention, the widths of the electrodes of the thin film transistors in different sub-display areas are sequentially increased from the near end to the far end of the display area AA, so that the voltage drops of display signals generated on the pixel circuits of different sub-display areas are sequentially reduced from the near end to the far end of the display area AA, the voltage difference between two poles of the light emitting device at the far end and the near end is balanced, and the display brightness uniformity at the far end and the near end of the display area is improved.
Alternatively, the pixel PX further includes a signal line connected to the thin film transistor TFT, and a line width of the signal line at a distal end of the display panel is greater than a line width of the signal line at a proximal end. For example, the line widths of the signal lines in different sub-display regions may increase sequentially from the near end to the far end of the display region AA. For signal lines with the same length, the larger the line width of the signal line is, the smaller the resistance on the signal line is, the smaller the voltage drop generated by the display signal on the signal line is, and by setting the line width of the signal line positioned at the far end of the display area AA to be larger than the line width of the signal line positioned at the near end, the voltage drops generated by the display signal on the pixel circuits of different sub-display areas from the near end to the far end of the display area AA are sequentially reduced, so that the voltage difference between two poles of the light emitting device at the far end and the near end is equalized, and the display brightness uniformity at the far end and the near end of the display area is improved.
Referring to fig. 5, alternatively, on the basis of the above scheme, the signal line connected to the thin film transistor TFT includes at least one of the power line 50 and the data line 60.
Illustratively, the power line 50 may be a signal line for transmitting the first power signal ELVDD, the power line 50 is connected to the power source end in the bonding region, the power line 50 extends from the proximal end to the distal end of the display region AA from the bonding region, and by arranging the power lines 50 in the sub-display regions from the proximal end to the distal end of the display region AA, the line widths of the power lines 50 in the sub-display regions are sequentially increased, which helps to equalize the voltage drop of the first power signal ELVDD on the power line 50 in the sub-display regions, thereby providing the display luminance uniformity of the display regions.
Illustratively, the data line 60 is a signal line for transmitting a data voltage Vdata, the data line 60 may receive the data voltage Vdata through a driving chip bonded in the bonding region, the data line 60 extends from the proximal end of the display region AA to the distal end from the bonding region, and thus, like the power line 50, there is a voltage drop in the data voltage Vdata on the data line 60, and the voltage drop generated by the data voltage Vdata through each sub-display region increases sequentially from the proximal end to the distal end of the display region AA. In the prior art, the uniformity of the display brightness of the display area is poor, the display brightness of the near end of the display area is usually higher than that of the far end, the scheme is that the line widths of the data lines 60 in each sub-display area are sequentially increased from the near end to the far end of the display area AA, so that the equivalent resistance of the data line 60 in each sub-display area decreases sequentially from the near end to the far end of the display area AA, so that the voltage drop generated by the data voltage Vdata on the data line 60 in each sub-display region is sequentially reduced, for the same data voltage Vdata, the voltage drop of the data voltage Vdata received by the sub-display region at the near end is relatively large, and the voltage drop of the data voltage Vdata received by the sub-display region at the far end is relatively small, so that the display brightness of the sub-display region at the far end is improved, thereby equalizing the display brightness of the far end and the near end to improve the display brightness uniformity of the display area.
The embodiment of the invention also provides a brightness compensation method of the display panel, and the method can be suitable for the display panel provided by any embodiment of the invention. Fig. 7 is a flowchart illustrating a method for compensating brightness of a display panel according to an embodiment of the present invention. The embodiment is applicable to the case of compensating the brightness of the display panel, and the method may be performed by a brightness compensation apparatus of the display panel, where the apparatus may be implemented in a software and/or hardware manner, and the apparatus may be configured in an electronic device including the display panel, such as a server or a terminal device, where a typical terminal device includes a mobile terminal, specifically includes a mobile phone, a computer, or a tablet computer.
As shown in fig. 7, the method for compensating the brightness of the display panel specifically includes:
and S110, collecting a display image.
Exemplarily, fig. 8 is a schematic structural diagram of a luminance compensation apparatus of a display panel according to an embodiment of the present invention, and as shown in fig. 8, the luminance compensation apparatus of a display panel includes an image capture module 310, a compensation module 320, and a test pattern generator 330. The display device 200 includes a display panel 100 and a driving chip 110, and the image capturing module 310 may include a camera for capturing a display image of the display panel, where the display image may be a display image at a preset sampling gray scale. The preset sampling gray scale may include a plurality of gray scales, for example, the preset sampling gray scale includes 16 gray scales, 48 gray scales and 192 gray scales, the image acquisition module 310 may be configured to acquire the display image at each preset sampling gray scale, and transmit the display image at each preset sampling gray scale to the compensation module 320.
And S120, compensating the display brightness of each area of the display panel from the near end to the far end of the display panel so as to enable the display brightness of each area to be consistent.
Referring to fig. 4 and 8, the display area AA may be divided into at least two sub-display areas from the near end to the far end, and each sub-display area includes at least one row of pixels PX. The compensation module 320 may be disposed in a computer, and the compensation module 320 is connected to the driving chip 110 through a test Pattern Generator (PG) 330. The compensation module 320 may adjust the gamma data of each sub-display area of the display panel 100 based on a preset De-mura compensation algorithm until the display brightness of each sub-display area in the display image under the preset sampling gray scale is consistent, and the display brightness of each sub-display area can reach the target brightness corresponding to the preset sampling gray scale. After the display brightness adjustment is completed, the gamma data of each sub-display region can be determined as corresponding display brightness compensation data. Wherein, the display brightness compensation data of the near end and the far end of the display panel are different. Therefore, the display brightness can be compensated according to the display brightness difference between the near end and the far end of the display area, so that the overall display brightness uniformity of the display panel is improved.
Optionally, when the preset sampling gray scale may include a plurality of gray scales, for example, the preset sampling gray scale includes 16 gray scales, 48 gray scales and 192 gray scales, the display brightness compensation data of each sub-display area under each preset sampling gray scale may be respectively determined, and the display brightness compensation data of each sub-display area under other gray scales is determined in a linear interpolation manner, so as to compensate the display brightness of each gray scale.
And S130, storing the display brightness compensation data of each area.
After the adjustment of the display brightness is completed, the display brightness compensation data of each sub-display area can be stored, and the display brightness compensation data of each sub-display area is burned into the driving chip 110 through the test pattern generator 330. When the display panel normally works, the driving chip 110 can compensate the display brightness of each sub-display area according to the stored display brightness compensation data, so as to improve the display brightness uniformity of the display panel.
According to the technical scheme of the embodiment of the invention, the area close to the signal input end in the display panel is taken as the near end, the area far away from the signal input end in the display panel is taken as the far end, and the size of the thin film transistor in the pixel positioned at the far end is set to be larger than that of the thin film transistor in the pixel positioned at the near end, so that the voltage drop of the display signal generated on the pixel circuit positioned at the far end is smaller than that of the display signal generated on the pixel circuit positioned at the near end, the voltage difference of two poles of a light-emitting device at the far end and the near end is equalized, and the uniformity of the display brightness at the far end and the near end of the display area is improved. However, due to the compensation accuracy and other reasons, the display brightness uniformity of the display panel needs to be further improved, and on this basis, the display brightness of the display area from the near end to the far end is compensated, and the near end and the far end of the display area have different compensation data of the display brightness, so that the display brightness uniformity of the display panel can be further improved and the display effect can be further optimized.
On the basis of the above scheme, the implementation manner of step S120 may include multiple, and two of them are described below.
Optionally, in an embodiment, step S120 may include:
step one, determining the mura grade of each area of the display area from the near end to the far end of the display area.
Specifically, referring to fig. 4, the mura rating of each sub-display section from the near end to the far end of the display section can be determined separately. The mura level of the sub-display area may indicate a degree of display unevenness of the gray scale of the current sub-display area with respect to the gray scale of each sub-display area. For example, a lower mura level may indicate a lower degree of display unevenness of the current sub-display section, and a higher mura level may indicate a higher degree of display unevenness of the current sub-display section.
And step two, compensating the display brightness of each area according to the mura grade of each area so as to enable the display brightness of each area to be consistent.
For example, the display images at the preset sampling gray scale may include a display image of a white picture and a display image of R, G, B three-color components, and the gamma data of each sub-display area may be respectively adjusted for the display image of the white picture and the display image of R, G, B three-color components according to the mura level of each sub-display area, so that the display brightness of each sub-display area can reach the target display brightness corresponding to each display image, and the display brightness of each sub-display area can be consistent.
And step three, extracting the display brightness compensation data of each area.
After the display brightness adjustment is finished, the final display brightness compensation data of each sub-display area can be determined according to the gamma data of each sub-display area under different display images based on a preset De-mura algorithm.
Optionally, in another embodiment, step S120 may include:
step one, selecting a region to be compensated in a display region according to requirements.
Specifically, referring to fig. 1 or fig. 4, the area to be compensated may be an area with a preset data depth in the display area, where the area with the preset data depth may be an area with a larger difference between the display brightness of the display area and that of other areas, and the preset data depth may include the number of rows and columns of the pixels PX, and for example, if the display brightness of the first three rows and three columns of the pixels PX in the display area AA is larger than that of other areas, the area with the preset data depth may be an area where the first three rows and three columns of the pixels PX in the display area AA are located.
And step two, compensating the display brightness of the area to be compensated in the display area so as to enable the display brightness of each area to be consistent.
The display brightness of the display panel can be compensated more pertinently by selecting the area to be compensated for display brightness compensation, so that the uniformity of the display brightness is further improved.
Optionally, the display brightness compensation data includes a mapping relationship between the target gray scale and the original gray scale; accordingly, after step S130, the method for compensating brightness of a display panel further includes:
the method comprises the following steps of firstly, obtaining an original gray scale of an image to be displayed.
The original gray scale of the image to be displayed is the gray scale before compensation, and the target gray scale is the gray scale corresponding to the display brightness of the image to be displayed by compensating the display brightness of the image to be displayed so as to achieve the target display brightness. The mapping relationship between the target gray scale and the original gray scale can be represented as y ═ ax + b, where y is the target gray scale, x is the original gray scale, a is the compensation Gain (Gain), and b is the compensation value (Offset).
And step two, determining the target gray scale of the image to be displayed according to the mapping relation between the target gray scale and the original gray scale.
Fig. 9 is a schematic structural diagram of a driving module according to an embodiment of the present invention, and as shown in fig. 9, the driving module may be a driving module in a driving chip, and the driving module specifically includes: a first data conversion unit 410, a compensation unit 420, a second data conversion unit 430, a first storage unit 440, a second storage unit 450, a dithering/frame rate control unit 460, and a source driving unit 470.
Specifically, the driving module may acquire RGB display data of an image to be displayed through the first data conversion unit 410 and convert the RGB display data into corresponding color coordinate data. The first storage unit 440 may be a Flash Memory (Flash Memory), the second storage unit 450 may be a buffer (Register), the compensation gain a and the compensation value b may be stored in the first storage unit 440, and the compensation unit 420 may read the compensation gain a and the compensation value b stored in the first storage unit 440 through the second storage unit 450, so as to redetermine color coordinate data of an image to be displayed according to a mapping relationship y ═ ax + b between a target gray scale and an original gray scale, so as to implement conversion between the target gray scale and the original gray scale. The second data conversion unit 430 may convert the re-determined color coordinate data of the image to be displayed into corresponding RGB display data and transmit the data to the source driving unit 470.
And step three, controlling the display panel to display the image to be displayed according to the target gray scale.
The dithering/frame rate control unit (Dither/FRC)460 is used to perform dithering/frame rate control such that a smaller number of bits exhibits a display effect of a larger number of bits by spatial and temporal superposition. The source driving unit 470 may generate a data voltage of an image to be displayed according to the converted RGB display data under the control of the dithering/frame rate control unit 460, so as to drive the display panel to display the image to be displayed.
According to the scheme, after the display brightness of each region from the near end to the far end of the display region is compensated, the display panel is controlled to display the image to be displayed according to the mapping relation between the target gray scale and the original gray scale, the uniformity of the display brightness of the display panel is improved, and therefore the display effect is optimized.
The embodiment of the invention also provides a display device, and fig. 10 is a schematic structural diagram of the display device provided by the embodiment of the invention. Fig. 10 schematically shows a case where the display device 200 is a mobile phone, and in practical applications, the display device 200 may also be a device with a display function, such as a computer or a tablet computer. The display device provided by the embodiment of the present invention includes the display panel provided by any of the above embodiments of the present invention, and therefore, the display device provided by the embodiment of the present invention has the functional structure and the beneficial effects of the display panel provided by any of the above embodiments of the present invention, and details are not repeated herein.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A display panel, comprising:
the display panel comprises a signal input end, a display panel and a display control unit, wherein the area close to the signal input end in the display panel is a near end, and the area far away from the signal input end in the display panel is a far end;
a pixel including a thin film transistor; wherein the size of the thin film transistor at the far end is larger than that at the near end.
2. The display panel of claim 1, wherein from a proximal end to a distal end of the display panel, the display region of the display panel is divided into at least two sub-display regions, each sub-display region comprising at least one row of pixels;
from the near end to the far end of the display panel, the sizes of the thin film transistors in different sub-display areas are sequentially increased.
3. The display panel according to claim 2, wherein each of the sub-display regions includes a row of the pixels; the thin film transistors in the pixels in the same row are equal in size.
4. The display panel according to claim 2, wherein each of the sub-display sections includes at least two rows of the pixels; the thin film transistors in the same sub-display region are equal in size.
5. The display panel according to any one of claims 2 to 4, wherein the widths of the active layers of the thin film transistors in different sub-display regions increase sequentially from the near end to the far end of the display panel.
6. The display panel according to any one of claims 2 to 4, wherein the widths of the electrodes of the thin film transistors in different sub-display regions increase in order from the near end to the far end of the display panel.
7. The display panel according to claim 1, wherein the thin film transistor comprises at least one of a driving transistor, a light emission control transistor, and a data writing transistor.
8. The display panel according to claim 1, wherein the pixel further comprises a signal line connected to the thin film transistor, and a line width of the signal line gradually increases from a proximal end to a distal end of the display panel.
9. A method for compensating brightness of a display panel, the display panel comprising:
the display panel comprises a signal input end, a display panel and a display control unit, wherein the area close to the signal input end in the display panel is a near end, and the area far away from the signal input end in the display panel is a far end;
a pixel including a thin film transistor; wherein the size of the thin film transistor at the far end is larger than that at the near end;
the brightness compensation method of the display panel comprises the following steps:
compensating the display brightness of each area of the display panel from the near end to the far end of the display panel so as to enable the display brightness of each area to be consistent; wherein the display brightness compensation data of the near end and the far end of the display panel are different.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 8.
CN202111228474.8A 2021-10-21 2021-10-21 Display panel, brightness compensation method thereof and display device Pending CN113793562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111228474.8A CN113793562A (en) 2021-10-21 2021-10-21 Display panel, brightness compensation method thereof and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111228474.8A CN113793562A (en) 2021-10-21 2021-10-21 Display panel, brightness compensation method thereof and display device

Publications (1)

Publication Number Publication Date
CN113793562A true CN113793562A (en) 2021-12-14

Family

ID=79185024

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111228474.8A Pending CN113793562A (en) 2021-10-21 2021-10-21 Display panel, brightness compensation method thereof and display device

Country Status (1)

Country Link
CN (1) CN113793562A (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030014778A (en) * 2001-08-13 2003-02-20 엘지.필립스 엘시디 주식회사 Organic electroluminescence display
US20120119982A1 (en) * 2010-11-16 2012-05-17 Toshiba Mobile Display Co., Ltd. Liquid crystal display device
KR20120111675A (en) * 2011-04-01 2012-10-10 삼성디스플레이 주식회사 Organic light emitting display device, data driving apparatus for organic light emitting display device and driving method thereof
US20120287092A1 (en) * 2011-05-10 2012-11-15 Sony Corporation Display device and electronic apparatus
CN203324620U (en) * 2013-07-25 2013-12-04 合肥京东方光电科技有限公司 Array substrate and liquid crystal display device
US20150235599A1 (en) * 2014-02-17 2015-08-20 Samsung Display Co., Ltd. Liquid crystal display and method of manufacturing the same
US20150262529A1 (en) * 2014-03-14 2015-09-17 Samsung Display Co., Ltd. Organic light emitting display apparatus, and method of driving the same
KR20170036491A (en) * 2015-09-24 2017-04-03 엘지디스플레이 주식회사 Display device for improved brightness
CN110034132A (en) * 2019-06-12 2019-07-19 成都京东方光电科技有限公司 A kind of array substrate, display panel and display device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030014778A (en) * 2001-08-13 2003-02-20 엘지.필립스 엘시디 주식회사 Organic electroluminescence display
US20120119982A1 (en) * 2010-11-16 2012-05-17 Toshiba Mobile Display Co., Ltd. Liquid crystal display device
KR20120111675A (en) * 2011-04-01 2012-10-10 삼성디스플레이 주식회사 Organic light emitting display device, data driving apparatus for organic light emitting display device and driving method thereof
US20120287092A1 (en) * 2011-05-10 2012-11-15 Sony Corporation Display device and electronic apparatus
CN203324620U (en) * 2013-07-25 2013-12-04 合肥京东方光电科技有限公司 Array substrate and liquid crystal display device
US20150235599A1 (en) * 2014-02-17 2015-08-20 Samsung Display Co., Ltd. Liquid crystal display and method of manufacturing the same
US20150262529A1 (en) * 2014-03-14 2015-09-17 Samsung Display Co., Ltd. Organic light emitting display apparatus, and method of driving the same
KR20170036491A (en) * 2015-09-24 2017-04-03 엘지디스플레이 주식회사 Display device for improved brightness
CN110034132A (en) * 2019-06-12 2019-07-19 成都京东方光电科技有限公司 A kind of array substrate, display panel and display device

Similar Documents

Publication Publication Date Title
KR102565752B1 (en) Electroluminescent Display Device and Driving Device thereof
US7274345B2 (en) Electro-optical device and driving device thereof
US9620055B2 (en) Organic electroluminescent display device including gamma reference voltage generator and method of driving the same
KR101065321B1 (en) Organic light emitting display device and driving method thereof
CN102231260B (en) Active matrix electroluminescent display with data adjustment in response to power line voltage drop
US10861388B2 (en) Display panel and driving method thereof, display device
KR20190055304A (en) Display device
KR20080060886A (en) Driving method of oled display and driving device of the same
US10043438B2 (en) Display device and method of driving the same with pixel shifting compensation data
US11620933B2 (en) IR-drop compensation for a display panel including areas of different pixel layouts
US8154482B2 (en) Organic light emitting display and method for driving the same
KR20140124610A (en) Organic light emitting display device and driving method of the same
US11756482B2 (en) Light emitting display apparatus and driving method thereof
JP6593899B2 (en) Method and system for improving contrast ratio of OLED display panel
JP2018531425A6 (en) Method and system for improving contrast ratio of OLED display panel
CN115995197A (en) Display device and display driving method
US20100310094A1 (en) Display device and driving method thereof
CN111326108B (en) Organic light emitting display device for preventing distortion of reference voltage
CN104464591A (en) Image signal processing circuit, image signal processing method and display apparatus
JP2019045820A (en) Display device
KR20240102184A (en) Display device
KR20230091554A (en) Electroluminescent Display Device and Driving Device thereof
CN113793562A (en) Display panel, brightness compensation method thereof and display device
CN111599295B (en) Display device and peak brightness control method thereof
CN111341270B (en) Method for compensating brightness unevenness of display panel and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination