KR20170031271A

KR20170031271A - Method of manufacturing printed circuit board

Info

Publication number: KR20170031271A
Application number: KR1020150128023A
Authority: KR
Inventors: 조성수; 오정윤
Original assignee: 대덕전자 주식회사
Priority date: 2015-09-10
Filing date: 2015-09-10
Publication date: 2017-03-21

Abstract

In the present invention, the RCC or RCF is used instead of the conventional solder resist, the SR process is performed only on the ball surface before detaching the reproducible core, and the copper foil bump of the buried shape is formed on the C4 surface, So that a pattern can be formed and a thin circuit board can be manufactured.

Description

[0001] METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board, particularly an embedded trace substrate (ETS), and more particularly to an ETS substrate structure in which a solder resist is printed only on a ball side of an ETS substrate will be.

ETS method is used to increase the circuit density of printed circuit board. The ETS method is advantageous in miniaturizing the circuit pitch because the copper foil circuit is manufactured in a buried form in the insulating layer instead of forming the copper foil circuit on the surface of the insulating layer.

When a circuit is formed on both surfaces of a circuit board, the surface on which the chip is mounted is referred to as a chip side (also referred to as a "C4 side") and a surface to be bonded to the motherboard is referred to as a ball side. As the electrode spacing of the chip to be mounted becomes finer, the pad spacing to be formed on the chip surface must also be miniaturized.

In recent years, there has been a demand for a method of making a fine pattern on the C4 surface by making the solder resist only on the solder surface without printing solder resist on the C4 surface (chip surface), thereby reducing the thickness of the substrate as a whole . However, when a solder resist is printed only on one side of the substrate, a warpage problem occurs in which the substrate is warped.

A first object of the present invention is to provide a circuit board manufacturing technique in which fine patterns can be formed on the C4 surface and solder resist is coated only on the ball surface.

A second object of the present invention is to provide a circuit board substrate manufacturing technique which is simple in process and can reduce manufacturing cost, in addition to the first object.

A method of manufacturing a circuit board, comprising the steps of: (a) forming a first copper plating layer by coating a first plating mask transferred with a predetermined circuit pattern on a base copper foil of a surface of a digitizable material and performing copper plating; (c) peeling the first plating mask, laminating the second insulating layer and the second copper foil, and applying heat-pressure laminating; (d) coating a second plating mask transferred with a predetermined circuit pattern on the first copper foil and performing copper plating to form a second copper plating layer; (e) peeling the second plating mask and performing flash etching to etch the exposed second copper layer not covered by the second copper plating layer; (f) forming an opening exposing the third insulating layer by covering the third insulating layer and the third copper foil, and selectively etching the third copper foil according to a predetermined circuit pattern; (g) selectively exposing the inner surface of the second copper plating layer by removing the third insulating layer whose surface is exposed by the opening portion by dry or wet etching; (h) peeling off the third copper foil, separating the divertible core to obtain two upper and lower structures; (i) a base copper foil whose surface has been exposed by performing a flash etching is removed by etching, and on one side thereof, a chip side circuit formed of a first copper plating layer, and on the opposite side thereof, And forming a pad.

The present invention is advantageous in that a resin coated copper (RCC) foil or a resin coated film (RCF) is used instead of a solder resist, and a material having a relatively low CTE (coefficient of thermal expansion) and a high stiffness is used . Since only the ball side is subjected to the SR process, the present invention is in the form of a warpage cry, which is advantageous in terms of assembly. That is, since the substrate is bent in a convex shape due to a difference in thermal expansion coefficient, the substrate is flatly deformed by pressing with a jig.

The present invention is capable of C4 fine pattern and has a merit that costs are reduced as compared with the conventional ETS method. In addition, the method according to the present invention is advantageous in that the total thickness of the substrate is reduced since the SR process is performed only on the ball surface.

1A to 1J show a method of manufacturing a circuit board according to the present invention,

Hereinafter, a method of manufacturing a circuit board according to the present invention will be described in detail with reference to FIGS. 1A to 1J.

1A, a detachable core 100 having a thick copper foil 100b and a base copper foil 100c coated thereon as an adhesive is formed on a core 100a serving as a support, do. That is, the thick copper foil (also referred to as a carrier copper foil) 100b and the base copper foil 100c of the reference numeral 100c are adhered temporarily with an adhesive, and peeled off by a slight physical force .

(Not shown) is coated on the digitizable core 100, and a series of image operations such as photographing, development, etching, and the like are performed to transfer a predetermined circuit pattern to the dry film to produce a first plating mask do. When copper plating is performed in a state of covering the first plating mask, a copper foil circuit is formed of the first copper plating layer 110 on the base copper foil 100c as shown in Fig. 1B.

Referring to FIG. 1C, the second insulating layer 130 and the second copper foil 140 are laminated and laminated by heating and pressing. At this time, a prepreg (PPG) can be used as a preferred embodiment of the second insulating layer 130.

Next, a dry film (not shown) is coated, a series of image operations such as photographing, developing, etching, and the like are performed to transfer a predetermined circuit pattern onto the dry film to produce a second plating mask (not shown). When copper plating is performed in a state of covering the second plating mask, a copper foil circuit is formed of the second copper plating layer 150 on the second copper foil 140 as shown in Fig. 1D.

At this time, as a preferred embodiment of the present invention, a via hole for connecting the first copper plating layer 110 may be formed and the via hole may be filled with copper (Cu) in the copper plating process for forming the second copper plating layer 150 1d). Then, flash etching is performed to remove the second copper foil 140 not covered with the second copper plating layer 150.

Next, a resin coated copper (RCC) foil or a resin coated film (RCF) is squeezed on both sides of the substrate structure. RCC or RCF has a lower coefficient of thermal expansion (CTE) than conventional solder resists and has a higher Young's Modulus, resulting in stiffness compared to conventional solder resists. The RCC 160 is composed of a resin 160a and a copper foil 160b.

Referring to FIG. 1F, the copper foil of the RCC 160 is selectively etched to leave only a portion of the resin 160a to be used as a solder resist, and the remaining portion is removed to form a copper foil opening.

Referring to FIG. 1G, the resin 160a exposed by the opening is removed with a chemical solution, the residues are removed by proceeding with the desmearing process, and then the copper foil 160b serving as a mask is removed. As another embodiment of the present invention, a pattern transferred dry film mask is coated on the copper foil 160b of the RCC 160 and a blast process is performed to leave only the resin 160a to be used as a solder resist, It may be selectively etched away.

Figure 1h is a cross-sectional view of a resin selectively coated according to the present invention. 1H, the upper and lower structures are obtained by peeling the separator between the carrier copper foil 100b and the base copper foil 100c to separate the decorable core.

FIG. 1I is a view illustrating an example of a bottom structure of two structures. Referring to FIG. 1J, when the flash etching is performed, the exposed base copper foil 100c is peeled off and the chip surface (C4 surface) circuit 110 is exposed.

As a result, as shown in FIG. 1J, a chip surface circuit of a fine pattern to which the ETS technique is applied is formed on the C4 surface, and a ball pad 150 Is formed. Reference numeral 150 denotes a second copper plating layer serving as a pad on the surface of the solder ball. Reference numeral 110 denotes a first copper plating layer, which becomes a bump on the chip surface on which the chip is to be mounted.

Since the SR according to the present invention shown in FIG. 1J is covered only in the lower layer, the substrate is warped to warp through thermal expansion and contraction. Therefore, it is possible to flatly spread the jig by pressing it from above.

The foregoing has somewhat improved the features and technical advantages of the present invention in order to better understand the claims of the invention described below. Additional features and advantages that constitute the claims of the present invention will be described in detail below. It is to be appreciated by those skilled in the art that the disclosed concepts and specific embodiments of the invention can be used immediately as a basis for designing or modifying other structures to accomplish the invention and similar purposes.

In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures to accomplish the same purpose of the present invention. It will be apparent to those skilled in the art that various modifications, substitutions and alterations can be made hereto without departing from the spirit or scope of the invention as defined in the appended claims.

The present invention is advantageous in that a resin coated copper (RCC) foil or a resin coated film (RCF) is used instead of a solder resist, and a material having a relatively low CTE (coefficient of thermal expansion) and a high stiffness is used .

Since only the ball side is subjected to the SR process, the present invention is in the form of a warpage cry, which is advantageous in terms of assembly. That is, since the substrate is bent in a convex shape due to a difference in thermal expansion coefficient, the substrate is flatly deformed by pressing with a jig.

Claims

A method of manufacturing a circuit board,
(a) forming a first copper plating layer by coating a first plating mask transferred with a predetermined circuit pattern on a base copper foil on the surface of the digitizable material and performing copper plating;
(c) peeling the first plating mask, laminating the second insulating layer and the second copper foil, and applying heat-pressure laminating;
(d) coating a second plating mask transferred with a predetermined circuit pattern on the first copper foil and performing copper plating to form a second copper plating layer;
(e) peeling the second plating mask and performing flash etching to etch the exposed second copper layer not covered by the second copper plating layer;
(f) forming an opening exposing the third insulating layer by covering the third insulating layer and the third copper foil, and selectively etching the third copper foil according to a predetermined circuit pattern;
(g) selectively exposing the inner surface of the second copper plating layer by removing the third insulating layer whose surface is exposed by the opening portion by dry or wet etching;
(h) peeling off the third copper foil, separating the divertible cores to obtain two upper and lower structures;
(i) a base copper foil whose surface has been exposed by performing a flash etching is removed by etching, and on one side thereof, a chip side circuit formed of a first copper plating layer, and on the opposite side thereof, Forming a pad;
&Lt; / RTI >

The method of claim 1, wherein the third copper layer and the third insulating layer in step (f) are either RCC or RCF.

Insulating layer;
A first copper circuit embedded on the C4 surface of the insulating layer by an ETS method;
A second copper foil circuit formed on the opposite surface of the cross-section layer on the opposite side of the C4 surface in a protruding manner;
A resin layer covering the ball pad surface of the second copper circuit,
.